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| author | barthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-03-05 16:44:56 +0000 |
|---|---|---|
| committer | barthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-03-05 16:44:56 +0000 |
| commit | 690fd6364bd682ade14f27e86cb3821c84524d78 (patch) | |
| tree | 1e0c7dbc2c4d160f1e84934297b3df004f3a328c /os/hal/include | |
| parent | 3686d81be65b03fe5a9155d2006280354052404f (diff) | |
| download | ChibiOS-690fd6364bd682ade14f27e86cb3821c84524d78.tar.gz ChibiOS-690fd6364bd682ade14f27e86cb3821c84524d78.tar.bz2 ChibiOS-690fd6364bd682ade14f27e86cb3821c84524d78.zip | |
SDC. Code merged to fresh branch.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/sdc_dev2@4021 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/include')
| -rw-r--r-- | os/hal/include/sdc.h | 97 |
1 files changed, 96 insertions, 1 deletions
diff --git a/os/hal/include/sdc.h b/os/hal/include/sdc.h index 52bef66f0..9be833dd3 100644 --- a/os/hal/include/sdc.h +++ b/os/hal/include/sdc.h @@ -1,6 +1,6 @@ /*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012 Giovanni Di Sirio.
+ 2011 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
@@ -88,6 +88,27 @@ #define SDC_CMD_LOCK_UNLOCK 42
#define SDC_CMD_APP_CMD 55
+/**
+ * @brief Returning status.
+ */
+#define SDC_SUCCESS FALSE
+#define SDC_FAILED TRUE
+
+/**
+ * @name SDC bus error conditions
+ * @{
+ */
+#define SDC_NO_ERROR 0 /**< @brief No error. */
+#define SDC_CMD_CRC_ERROR 1 /**< @brief Command CRC error. */
+#define SDC_DATA_CRC_ERROR 2 /**< @brief Data CRC error. */
+#define SDC_DATA_TIMEOUT 4 /**< @brief Hardware write timeout.*/
+#define SDC_COMMAND_TIMEOUT 8 /**< @brief Hardware read timeout. */
+#define SDC_TX_UNDERRUN 16 /**< @brief TX buffer underrun. */
+#define SDC_RX_OVERRUN 32 /**< @brief RX buffer overrun. */
+#define SDC_STARTBIT_ERROR 64 /**< @brief Start bit not detected.*/
+#define SDC_OVERFLOW_ERROR 128 /**< @brief Card overflow error. */
+#define SDC_UNHANDLED_ERROR 0xFFFFFFFF
+
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
@@ -122,6 +143,20 @@ #if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
#define SDC_NICE_WAITING TRUE
#endif
+
+/**
+ * @brief Write timeout in milliseconds.
+ */
+#if !defined(SDC_WRITE_TIMEOUT_MS) || defined(__DOXYGEN__)
+#define SDC_WRITE_TIMEOUT_MS 250
+#endif
+
+/**
+ * @brief Write timeout in milliseconds.
+ */
+#if !defined(SDC_READ_TIMEOUT_MS) || defined(__DOXYGEN__)
+#define SDC_READ_TIMEOUT_MS 5
+#endif
/** @} */
/*===========================================================================*/
@@ -223,6 +258,66 @@ typedef enum { * @api
*/
#define sdcIsWriteProtected(sdcp) (sdc_lld_is_write_protected(sdcp))
+
+/**
+ * @brief Slice position of values in CSD register.
+ */
+/* CSD version 1.0 */
+#define SDC_CSD_20_CRC_SLICE 7,1
+#define SDC_CSD_20_FILE_FORMAT_SLICE 11,10
+#define SDC_CSD_20_TMP_WRITE_PROTECT_SLICE 12,12
+#define SDC_CSD_20_PERM_WRITE_PROTECT_SLICE 13,13
+#define SDC_CSD_20_COPY_SLICE 14,14
+#define SDC_CSD_20_FILE_FORMAT_GRP_SLICE 15,15
+#define SDC_CSD_20_WRITE_BL_PARTIAL_SLICE 21,21
+#define SDC_CSD_20_WRITE_BL_LEN_SLICE 25,12
+#define SDC_CSD_20_R2W_FACTOR_SLICE 28,26
+#define SDC_CSD_20_WP_GRP_ENABLE_SLICE 31,31
+#define SDC_CSD_20_WP_GRP_SIZE_SLICE 38,32
+#define SDC_CSD_20_ERASE_SECTOR_SIZE_SLICE 45,39
+#define SDC_CSD_20_ERASE_BLK_EN_SLICE 46,46
+#define SDC_CSD_20_C_SIZE_SLICE 69,48
+#define SDC_CSD_20_DSR_IMP_SLICE 76,76
+#define SDC_CSD_20_READ_BLK_MISALIGN_SLICE 77,77
+#define SDC_CSD_20_WRITE_BLK_MISALIGN_SLICE 78,78
+#define SDC_CSD_20_READ_BL_PARTIAL_SLICE 79,79
+#define SDC_CSD_20_READ_BL_LEN_SLICE 83,80
+#define SDC_CSD_20_CCC_SLICE 95,84
+#define SDC_CSD_20_TRANS_SPEED_SLICE 103,96
+#define SDC_CSD_20_NSAC_SLICE 111,104
+#define SDC_CSD_20_TAAC_SLICE 119,112
+#define SDC_CSD_20_STRUCTURE_SLICE 127,126
+
+/* CSD version 2.0 */
+#define SDC_CSD_10_CRC_SLICE SDC_CSD_20_CRC_SLICE
+#define SDC_CSD_10_FILE_FORMAT_SLICE SDC_CSD_20_FILE_FORMAT_SLICE
+#define SDC_CSD_10_TMP_WRITE_PROTECT_SLICE SDC_CSD_20_TMP_WRITE_PROTECT_SLICE
+#define SDC_CSD_10_PERM_WRITE_PROTECT_SLICE SDC_CSD_20_PERM_WRITE_PROTECT_SLICE
+#define SDC_CSD_10_COPY_SLICE SDC_CSD_20_COPY_SLICE
+#define SDC_CSD_10_FILE_FORMAT_GRP_SLICE SDC_CSD_20_FILE_FORMAT_GRP_SLICE
+#define SDC_CSD_10_WRITE_BL_PARTIAL_SLICE SDC_CSD_20_WRITE_BL_PARTIAL_SLICE
+#define SDC_CSD_10_WRITE_BL_LEN_SLICE SDC_CSD_20_WRITE_BL_LEN_SLICE
+#define SDC_CSD_10_R2W_FACTOR_SLICE SDC_CSD_20_R2W_FACTOR_SLICE
+#define SDC_CSD_10_WP_GRP_ENABLE_SLICE SDC_CSD_20_WP_GRP_ENABLE_SLICE
+#define SDC_CSD_10_WP_GRP_SIZE_SLICE SDC_CSD_20_WP_GRP_SIZE_SLICE
+#define SDC_CSD_10_ERASE_SECTOR_SIZE_SLICE SDC_CSD_20_ERASE_SECTOR_SIZE_SLICE
+#define SDC_CSD_10_ERASE_BLK_EN_SLICE SDC_CSD_20_ERASE_BLK_EN_SLICE
+#define SDC_CSD_10_C_SIZE_MULT_SLICE 49,47
+#define SDC_CSD_10_VDD_W_CURR_MAX_SLICE 52,50
+#define SDC_CSD_10_VDD_W_CURR_MIN_SLICE 55,53
+#define SDC_CSD_10_VDD_R_CURR_MAX_SLICE 58,56
+#define SDC_CSD_10_VDD_R_CURR_MIX_SLICE 61,59
+#define SDC_CSD_10_C_SIZE_SLICE 73,62
+#define SDC_CSD_10_DSR_IMP_SLICE SDC_CSD_20_DSR_IMP_SLICE
+#define SDC_CSD_10_READ_BLK_MISALIGN_SLICE SDC_CSD_20_READ_BLK_MISALIGN_SLICE
+#define SDC_CSD_10_WRITE_BLK_MISALIGN_SLICE SDC_CSD_20_WRITE_BLK_MISALIGN_SLICE
+#define SDC_CSD_10_READ_BL_PARTIAL_SLICE SDC_CSD_20_READ_BL_PARTIAL_SLICE
+#define SDC_CSD_10_READ_BL_LEN_SLICE 83, 80
+#define SDC_CSD_10_CCC_SLICE SDC_CSD_20_CCC_SLICE
+#define SDC_CSD_10_TRANS_SPEED_SLICE SDC_CSD_20_TRANS_SPEED_SLICE
+#define SDC_CSD_10_NSAC_SLICE SDC_CSD_20_NSAC_SLICE
+#define SDC_CSD_10_TAAC_SLICE SDC_CSD_20_TAAC_SLICE
+#define SDC_CSD_10_STRUCTURE_SLICE SDC_CSD_20_STRUCTURE_SLICE
/** @} */
/*===========================================================================*/
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