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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-08-17 13:23:41 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-08-17 13:23:41 +0000 |
| commit | 4e26a3b42cb49974f63d1b8727d7b1d1830c9c81 (patch) | |
| tree | 12c7970c2a76583baff5108acedd0d4cc395abf7 /os/hal/include | |
| parent | 8b45c58317683148179c9964e67c8f7d0683257b (diff) | |
| download | ChibiOS-4e26a3b42cb49974f63d1b8727d7b1d1830c9c81.tar.gz ChibiOS-4e26a3b42cb49974f63d1b8727d7b1d1830c9c81.tar.bz2 ChibiOS-4e26a3b42cb49974f63d1b8727d7b1d1830c9c81.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2133 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/include')
| -rw-r--r-- | os/hal/include/i2c.h | 45 |
1 files changed, 43 insertions, 2 deletions
diff --git a/os/hal/include/i2c.h b/os/hal/include/i2c.h index 3ee38a52e..1ffba8a3e 100644 --- a/os/hal/include/i2c.h +++ b/os/hal/include/i2c.h @@ -60,9 +60,10 @@ typedef enum { I2C_UNINIT = 0, /**< @brief Not initialized. */
I2C_STOP = 1, /**< @brief Stopped. */
I2C_READY = 2, /**< @brief Ready. */
- I2C_MREADY = 3, /**< @brief START sent. */
+ I2C_MREADY = 3, /**< @brief START and address sent. */
I2C_MTRANSMIT = 4, /**< @brief Master transmitting. */
I2C_MRECEIVE = 5, /**< @brief Master receiving. */
+ I2C_MERROR = 6 /**< @brief Error condition. */
} i2cstate_t;
#include "i2c_lld.h"
@@ -71,6 +72,43 @@ typedef enum { /* Driver macros. */
/*===========================================================================*/
+/**
+ * @brief Read mode. + */
+#define I2C_READ 1
+
+/**
+ * @brief Write mode. + */
+#define I2C_WRITE 0
+
+/**
+ * @brief Seven bits addresses header builder.
+ *
+ * @param[in] addr seven bits address value
+ * @param[in] rw read/write flag
+ *
+ * @return A 16 bit value representing the header, the most
+ * significant byte is always zero.
+ */
+#define I2C_ADDR7(addr, rw) (uint16_t)((addr) << 1 | (rw))
+
+
+/**
+ * @brief Ten bits addresses header builder.
+ *
+ * @param[in] addr ten bits address value
+ * @param[in] rw read/write flag
+ *
+ * @return A 16 bit value representing the header, the most
+ * significant byte is the first one to be transmitted.
+ */
+#define I2C_ADDR10(addr, rw) \
+ (uint16_t)(0xF000 | \
+ (((addr) & 0x0300) << 1) | \
+ (((rw) << 8)) | \
+ ((addr) & 0x00FF))
+
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
@@ -82,8 +120,11 @@ extern "C" { void i2cObjectInit(I2CDriver *i2cp);
void i2cStart(I2CDriver *i2cp, const I2CConfig *config);
void i2cStop(I2CDriver *i2cp);
- void i2cMasterStartI(I2CDriver *i2cp, i2ccallback_t callback);
+ void i2cMasterStartI(I2CDriver *i2cp,
+ uint16_t header,
+ i2ccallback_t callback);
void i2cMasterStopI(I2CDriver *i2cp, i2ccallback_t callback);
+ void i2cMasterRestartI(I2CDriver *i2cp, i2ccallback_t callback);
void i2cMasterTransmitI(I2CDriver *i2cp, size_t n, const uint8_t *txbuf,
i2ccallback_t callback);
void i2cMasterReceiveI(I2CDriver *i2cp, size_t n, uint8_t *rxbuf,
|