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| author | Rocco Marco Guglielmi <roccomarco.guglielmi@live.com> | 2016-05-05 08:25:04 +0000 |
|---|---|---|
| committer | Rocco Marco Guglielmi <roccomarco.guglielmi@live.com> | 2016-05-05 08:25:04 +0000 |
| commit | 35db3cabcee5cad864f20255fbdb77d0f229bea5 (patch) | |
| tree | 02037ce9b84bae593b554ca0704316b9927f4c29 /os/hal/boards | |
| parent | 2ceb952a73aecfefd85ee72824ef2a8ef0b8ac6b (diff) | |
| download | ChibiOS-35db3cabcee5cad864f20255fbdb77d0f229bea5.tar.gz ChibiOS-35db3cabcee5cad864f20255fbdb77d0f229bea5.tar.bz2 ChibiOS-35db3cabcee5cad864f20255fbdb77d0f229bea5.zip | |
Fixed wrong USART 2 configuration in STM32 Nucleo32 L011K4 boards file
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9417 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/boards')
| -rw-r--r-- | os/hal/boards/ST_NUCLEO32_L011K4/board.h | 8 | ||||
| -rw-r--r-- | os/hal/boards/ST_NUCLEO32_L011K4/cfg/board.chcfg | 4 |
2 files changed, 6 insertions, 6 deletions
diff --git a/os/hal/boards/ST_NUCLEO32_L011K4/board.h b/os/hal/boards/ST_NUCLEO32_L011K4/board.h index 48e755da1..dc6a32d74 100644 --- a/os/hal/boards/ST_NUCLEO32_L011K4/board.h +++ b/os/hal/boards/ST_NUCLEO32_L011K4/board.h @@ -219,7 +219,7 @@ *
* PA0 - ARD_A0 (input pullup).
* PA1 - ARD_A1 (input pullup).
- * PA2 - VCP_TX (alternate 1).
+ * PA2 - VCP_TX (alternate 4).
* PA3 - ARD_A2 (input pullup).
* PA4 - ARD_A3 (input pullup).
* PA5 - ARD_A4 (input pullup).
@@ -232,7 +232,7 @@ * PA12 - ARD_D2 (input pullup).
* PA13 - SWDIO (alternate 0).
* PA14 - SWCLK (alternate 0).
- * PA15 - VCP_RX (alternate 1).
+ * PA15 - VCP_RX (alternate 4).
*/
#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_ARD_A0) | \
PIN_MODE_INPUT(GPIOA_ARD_A1) | \
@@ -316,7 +316,7 @@ PIN_ODR_HIGH(GPIOA_VCP_RX))
#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_ARD_A0, 0) | \
PIN_AFIO_AF(GPIOA_ARD_A1, 0) | \
- PIN_AFIO_AF(GPIOA_VCP_TX, 1) | \
+ PIN_AFIO_AF(GPIOA_VCP_TX, 4) | \
PIN_AFIO_AF(GPIOA_ARD_A2, 0) | \
PIN_AFIO_AF(GPIOA_ARD_A3, 0) | \
PIN_AFIO_AF(GPIOA_ARD_A4, 0) | \
@@ -329,7 +329,7 @@ PIN_AFIO_AF(GPIOA_ARD_D2, 0) | \
PIN_AFIO_AF(GPIOA_SWDIO, 0) | \
PIN_AFIO_AF(GPIOA_SWCLK, 0) | \
- PIN_AFIO_AF(GPIOA_VCP_RX, 1))
+ PIN_AFIO_AF(GPIOA_VCP_RX, 4))
/*
* GPIOB setup:
diff --git a/os/hal/boards/ST_NUCLEO32_L011K4/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO32_L011K4/cfg/board.chcfg index 76ec398b2..6dc5d2e2b 100644 --- a/os/hal/boards/ST_NUCLEO32_L011K4/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO32_L011K4/cfg/board.chcfg @@ -39,7 +39,7 @@ Speed="High" Resistor="Floating" Mode="Alternate" - Alternate="1" /> + Alternate="4" /> <pin3 ID="ARD_A2" Type="PushPull" @@ -143,7 +143,7 @@ Speed="Maximum" Resistor="Floating" Mode="Alternate" - Alternate="1" /> + Alternate="4" /> </GPIOA> <GPIOB> <pin0 |