Regenerated board files using latest templates.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7581 35acf78f-673a-0410-8e92-d51de3d6d3f4

1 files changed, 28 insertions, 11 deletions

diff --git a/os/hal/boards/ST_STM32F429I_DISCOVERY/board.c b/os/hal/boards/ST_STM32F429I_DISCOVERY/board.c
index 54113e913..6eb610254 100644
--- a/os/hal/boards/ST_STM32F429I_DISCOVERY/board.c
+++ b/os/hal/boards/ST_STM32F429I_DISCOVERY/board.c
@@ -1,5 +1,5 @@
 /*

-    ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio

+    ChibiOS - Copyright (C) 2006-2014 Giovanni Di Sirio

 

     Licensed under the Apache License, Version 2.0 (the "License");

     you may not use this file except in compliance with the License.

@@ -22,26 +22,43 @@
  * @details Digital I/O ports static configuration as defined in @p board.h.

  *          This variable is used by the HAL when initializing the PAL driver.

  */

-const PALConfig pal_default_config =

-{

+const PALConfig pal_default_config = {

+#if STM32_HAS_GPIOA

   {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,

    VAL_GPIOA_ODR,   VAL_GPIOA_AFRL,   VAL_GPIOA_AFRH},

+#endif

+#if STM32_HAS_GPIOB

   {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,

    VAL_GPIOB_ODR,   VAL_GPIOB_AFRL,   VAL_GPIOB_AFRH},

+#endif

+#if STM32_HAS_GPIOC

   {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,

    VAL_GPIOC_ODR,   VAL_GPIOC_AFRL,   VAL_GPIOC_AFRH},

+#endif

+#if STM32_HAS_GPIOD

   {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,

    VAL_GPIOD_ODR,   VAL_GPIOD_AFRL,   VAL_GPIOD_AFRH},

+#endif

+#if STM32_HAS_GPIOE

   {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,

    VAL_GPIOE_ODR,   VAL_GPIOE_AFRL,   VAL_GPIOE_AFRH},

+#endif

+#if STM32_HAS_GPIOF

   {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,

    VAL_GPIOF_ODR,   VAL_GPIOF_AFRL,   VAL_GPIOF_AFRH},

+#endif

+#if STM32_HAS_GPIOG

   {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,

    VAL_GPIOG_ODR,   VAL_GPIOG_AFRL,   VAL_GPIOG_AFRH},

+#endif

+#if STM32_HAS_GPIOH

   {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,

    VAL_GPIOH_ODR,   VAL_GPIOH_AFRL,   VAL_GPIOH_AFRH},

+#endif

+#if STM32_HAS_GPIOI

   {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,

    VAL_GPIOI_ODR,   VAL_GPIOI_AFRL,   VAL_GPIOI_AFRH}

+#endif

 };

 #endif

 

@@ -59,21 +76,21 @@ void __early_init(void) {
 /**

  * @brief   SDC card detection.

  */

-bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) {

+bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {

 

   (void)sdcp;

   /* TODO: Fill the implementation.*/

-  return TRUE;

+  return true;

 }

 

 /**

  * @brief   SDC card write protection detection.

  */

-bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) {

+bool sdc_lld_is_write_protected(SDCDriver *sdcp) {

 

   (void)sdcp;

   /* TODO: Fill the implementation.*/

-  return FALSE;

+  return false;

 }

 #endif /* HAL_USE_SDC */

 

@@ -81,21 +98,21 @@ bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) {
 /**

  * @brief   MMC_SPI card detection.

  */

-bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {

+bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {

 

   (void)mmcp;

   /* TODO: Fill the implementation.*/

-  return TRUE;

+  return true;

 }

 

 /**

  * @brief   MMC_SPI card write protection detection.

  */

-bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {

+bool mmc_lld_is_write_protected(MMCDriver *mmcp) {

 

   (void)mmcp;

   /* TODO: Fill the implementation.*/

-  return FALSE;

+  return false;

 }

 #endif