Added command line board files generation tool. Regenerated all board files automatically.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11104 35acf78f-673a-0410-8e92-d51de3d6d3f4

4 files changed, 175 insertions, 16 deletions

diff --git a/os/hal/boards/ST_STM32F401C_DISCOVERY/board.c b/os/hal/boards/ST_STM32F401C_DISCOVERY/board.c
index 65b74d0c6..5ee0873d7 100644
--- a/os/hal/boards/ST_STM32F401C_DISCOVERY/board.c
+++ b/os/hal/boards/ST_STM32F401C_DISCOVERY/board.c
@@ -1,5 +1,5 @@
 /*

-    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio

+    ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio

 

     Licensed under the Apache License, Version 2.0 (the "License");

     you may not use this file except in compliance with the License.

@@ -20,14 +20,76 @@
  */

 

 #include "hal.h"

+#include "stm32_gpio.h"

+

+/*===========================================================================*/

+/* Driver local definitions.                                                 */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver exported variables.                                                */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver local variables and types.                                         */

+/*===========================================================================*/

+

+/**

+ * @brief   Type of STM32 GPIO port setup.

+ */

+typedef struct {

+  uint32_t              moder;

+  uint32_t              otyper;

+  uint32_t              ospeedr;

+  uint32_t              pupdr;

+  uint32_t              odr;

+  uint32_t              afrl;

+  uint32_t              afrh;

+} gpio_setup_t;

+

+/**

+ * @brief   Type of STM32 GPIO initialization data.

+ */

+typedef struct {

+#if STM32_HAS_GPIOA || defined(__DOXYGEN__)

+  gpio_setup_t          PAData;

+#endif

+#if STM32_HAS_GPIOB || defined(__DOXYGEN__)

+  gpio_setup_t          PBData;

+#endif

+#if STM32_HAS_GPIOC || defined(__DOXYGEN__)

+  gpio_setup_t          PCData;

+#endif

+#if STM32_HAS_GPIOD || defined(__DOXYGEN__)

+  gpio_setup_t          PDData;

+#endif

+#if STM32_HAS_GPIOE || defined(__DOXYGEN__)

+  gpio_setup_t          PEData;

+#endif

+#if STM32_HAS_GPIOF || defined(__DOXYGEN__)

+  gpio_setup_t          PFData;

+#endif

+#if STM32_HAS_GPIOG || defined(__DOXYGEN__)

+  gpio_setup_t          PGData;

+#endif

+#if STM32_HAS_GPIOH || defined(__DOXYGEN__)

+  gpio_setup_t          PHData;

+#endif

+#if STM32_HAS_GPIOI || defined(__DOXYGEN__)

+  gpio_setup_t          PIData;

+#endif

+#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)

+  gpio_setup_t          PJData;

+#endif

+#if STM32_HAS_GPIOK || defined(__DOXYGEN__)

+  gpio_setup_t          PKData;

+#endif

+} gpio_config_t;

 

-#if HAL_USE_PAL || defined(__DOXYGEN__)

 /**

- * @brief   PAL setup.

- * @details Digital I/O ports static configuration as defined in @p board.h.

- *          This variable is used by the HAL when initializing the PAL driver.

+ * @brief   STM32 GPIO static initialization data.

  */

-const PALConfig pal_default_config = {

+static const gpio_config_t gpio_default_config = {

 #if STM32_HAS_GPIOA

   {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,

    VAL_GPIOA_ODR,   VAL_GPIOA_AFRL,   VAL_GPIOA_AFRH},

@@ -73,15 +135,81 @@ const PALConfig pal_default_config = {
    VAL_GPIOK_ODR,   VAL_GPIOK_AFRL,   VAL_GPIOK_AFRH}

 #endif

 };

+

+/*===========================================================================*/

+/* Driver local functions.                                                   */

+/*===========================================================================*/

+

+static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {

+

+  gpiop->OTYPER  = config->otyper;

+  gpiop->OSPEEDR = config->ospeedr;

+  gpiop->PUPDR   = config->pupdr;

+  gpiop->ODR     = config->odr;

+  gpiop->AFRL    = config->afrl;

+  gpiop->AFRH    = config->afrh;

+  gpiop->MODER   = config->moder;

+}

+

+static void stm32_gpio_init(void) {

+

+  /* Enabling GPIO-related clocks, the mask comes from the

+     registry header file.*/

+  rccResetAHB1(STM32_GPIO_EN_MASK);

+  rccEnableAHB1(STM32_GPIO_EN_MASK, true);

+

+  /* Initializing all the defined GPIO ports.*/

+#if STM32_HAS_GPIOA

+  gpio_init(GPIOA, &gpio_default_config.PAData);

+#endif

+#if STM32_HAS_GPIOB

+  gpio_init(GPIOB, &gpio_default_config.PBData);

+#endif

+#if STM32_HAS_GPIOC

+  gpio_init(GPIOC, &gpio_default_config.PCData);

+#endif

+#if STM32_HAS_GPIOD

+  gpio_init(GPIOD, &gpio_default_config.PDData);

+#endif

+#if STM32_HAS_GPIOE

+  gpio_init(GPIOE, &gpio_default_config.PEData);

+#endif

+#if STM32_HAS_GPIOF

+  gpio_init(GPIOF, &gpio_default_config.PFData);

+#endif

+#if STM32_HAS_GPIOG

+  gpio_init(GPIOG, &gpio_default_config.PGData);

+#endif

+#if STM32_HAS_GPIOH

+  gpio_init(GPIOH, &gpio_default_config.PHData);

+#endif

+#if STM32_HAS_GPIOI

+  gpio_init(GPIOI, &gpio_default_config.PIData);

+#endif

+#if STM32_HAS_GPIOJ

+  gpio_init(GPIOJ, &gpio_default_config.PJData);

 #endif

+#if STM32_HAS_GPIOK

+  gpio_init(GPIOK, &gpio_default_config.PKData);

+#endif

+}

+

+/*===========================================================================*/

+/* Driver interrupt handlers.                                                */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver exported functions.                                                */

+/*===========================================================================*/

 

 /**

  * @brief   Early initialization code.

- * @details This initialization must be performed just after stack setup

- *          and before any other initialization.

+ * @details GPIO ports and system clocks are initialized before everything

+ *          else.

  */

 void __early_init(void) {

 

+  stm32_gpio_init();

   stm32_clock_init();

 }

 

@@ -134,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
  * @todo    Add your board-specific code, if any.

  */

 void boardInit(void) {

+

 }

diff --git a/os/hal/boards/ST_STM32F401C_DISCOVERY/board.h b/os/hal/boards/ST_STM32F401C_DISCOVERY/board.h
index 74cb5c8d0..90d6e9565 100644
--- a/os/hal/boards/ST_STM32F401C_DISCOVERY/board.h
+++ b/os/hal/boards/ST_STM32F401C_DISCOVERY/board.h
@@ -1,5 +1,5 @@
 /*

-    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio

+    ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio

 

     Licensed under the Apache License, Version 2.0 (the "License");

     you may not use this file except in compliance with the License.

@@ -22,6 +22,10 @@
 #ifndef BOARD_H

 #define BOARD_H

 

+/*===========================================================================*/

+/* Driver constants.                                                         */

+/*===========================================================================*/

+

 /*

  * Setup for STMicroelectronics STM32F401C-Discovery board.

  */

@@ -226,12 +230,10 @@
 #define LINE_OTG_FS_DP              PAL_LINE(GPIOA, 12U)

 #define LINE_SWDIO                  PAL_LINE(GPIOA, 13U)

 #define LINE_SWCLK                  PAL_LINE(GPIOA, 14U)

-

 #define LINE_SWO                    PAL_LINE(GPIOB, 3U)

 #define LINE_LSM303DLHC_SCL         PAL_LINE(GPIOB, 6U)

 #define LINE_LSM303DLHC_SDA         PAL_LINE(GPIOB, 9U)

 #define LINE_MP45DT02_CLK_IN        PAL_LINE(GPIOB, 10U)

-

 #define LINE_OTG_FS_POWER_ON        PAL_LINE(GPIOC, 0U)

 #define LINE_CS43L22_AIN4x          PAL_LINE(GPIOC, 3U)

 #define LINE_MP45DT02_PDM_OUT       PAL_LINE(GPIOC, 3U)

@@ -240,26 +242,36 @@
 #define LINE_CS43L22_SDIN           PAL_LINE(GPIOC, 12U)

 #define LINE_OSC32_IN               PAL_LINE(GPIOC, 14U)

 #define LINE_OSC32_OUT              PAL_LINE(GPIOC, 15U)

-

 #define LINE_CS43L22_RESET          PAL_LINE(GPIOD, 4U)

 #define LINE_OverCurrent            PAL_LINE(GPIOD, 5U)

 #define LINE_LED4                   PAL_LINE(GPIOD, 12U)

 #define LINE_LED3                   PAL_LINE(GPIOD, 13U)

 #define LINE_LED5                   PAL_LINE(GPIOD, 14U)

 #define LINE_LED6                   PAL_LINE(GPIOD, 15U)

-

 #define LINE_L3GD20_INT1            PAL_LINE(GPIOE, 0U)

 #define LINE_L3GD20_INT2            PAL_LINE(GPIOE, 1U)

 #define LINE_LSM303DLHC_DRDY        PAL_LINE(GPIOE, 2U)

 #define LINE_L3GD20_CS              PAL_LINE(GPIOE, 3U)

 #define LINE_LSM303DLHC_INT1        PAL_LINE(GPIOE, 4U)

 #define LINE_LSM303DLHC_INT2        PAL_LINE(GPIOE, 5U)

+#define LINE_OSC_IN                 PAL_LINE(GPIOH, 0U)

+#define LINE_OSC_OUT                PAL_LINE(GPIOH, 1U)

 

+/*===========================================================================*/

+/* Driver pre-compile time settings.                                         */

+/*===========================================================================*/

 

+/*===========================================================================*/

+/* Derived constants and error checks.                                       */

+/*===========================================================================*/

 

-#define LINE_OSC_IN                 PAL_LINE(GPIOH, 0U)

-#define LINE_OSC_OUT                PAL_LINE(GPIOH, 1U)

+/*===========================================================================*/

+/* Driver data structures and types.                                         */

+/*===========================================================================*/

 

+/*===========================================================================*/

+/* Driver macros.                                                            */

+/*===========================================================================*/

 

 /*

  * I/O ports initial setup, this configuration is established soon after reset

@@ -1336,6 +1348,9 @@
                                      PIN_AFIO_AF(GPIOI_PIN14, 0U) |         \

                                      PIN_AFIO_AF(GPIOI_PIN15, 0U))

 

+/*===========================================================================*/

+/* External declarations.                                                    */

+/*===========================================================================*/

 

 #if !defined(_FROM_ASM_)

 #ifdef __cplusplus

diff --git a/os/hal/boards/ST_STM32F401C_DISCOVERY/cfg/board.chcfg b/os/hal/boards/ST_STM32F401C_DISCOVERY/cfg/board.chcfg
index ae64e0e91..ee8ff704d 100644
--- a/os/hal/boards/ST_STM32F401C_DISCOVERY/cfg/board.chcfg
+++ b/os/hal/boards/ST_STM32F401C_DISCOVERY/cfg/board.chcfg
@@ -6,7 +6,7 @@
   <configuration_settings>

     <templates_path>resources/gencfg/processors/boards/stm32f4xx/templates</templates_path>

     <output_path>..</output_path>

-    <hal_version>3.0.x</hal_version>

+    <hal_version>5.0.x</hal_version>

   </configuration_settings>

   <board_name>STMicroelectronics STM32F401C-Discovery</board_name>

   <board_id>ST_STM32F401C_DISCOVERY</board_id>

diff --git a/os/hal/boards/ST_STM32F401C_DISCOVERY/cfg/board.fmpp b/os/hal/boards/ST_STM32F401C_DISCOVERY/cfg/board.fmpp
new file mode 100644
index 000000000..41754c141
--- /dev/null
+++ b/os/hal/boards/ST_STM32F401C_DISCOVERY/cfg/board.fmpp
@@ -0,0 +1,15 @@
+sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f4xx/templates
+outputRoot: ..
+dataRoot: .
+
+freemarkerLinks: {
+    lib: ../../../../../tools/ftl/libs
+}
+
+data : {
+  doc1:xml (
+    board.chcfg
+    {
+    }
+  )
+}