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| author | utzig <utzig@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-11-09 12:00:31 +0000 |
|---|---|---|
| committer | utzig <utzig@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-11-09 12:00:31 +0000 |
| commit | 1c954dfc6db6d7e71b94c4110d7b11e1c4e32e37 (patch) | |
| tree | 7f27ec9ae37a343debcb2b4099c7a42137609d34 /os/ext/CMSIS | |
| parent | ceb9e5e6e8901f7ba4b31116a7d3da2f4d270b15 (diff) | |
| download | ChibiOS-1c954dfc6db6d7e71b94c4110d7b11e1c4e32e37.tar.gz ChibiOS-1c954dfc6db6d7e71b94c4110d7b11e1c4e32e37.tar.bz2 ChibiOS-1c954dfc6db6d7e71b94c4110d7b11e1c4e32e37.zip | |
[KINETIS] Fixed typos (TMP -> TPM)
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7497 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/ext/CMSIS')
| -rw-r--r-- | os/ext/CMSIS/KINETIS/kl25z.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/os/ext/CMSIS/KINETIS/kl25z.h b/os/ext/CMSIS/KINETIS/kl25z.h index 514f7abae..4cb53d3d3 100644 --- a/os/ext/CMSIS/KINETIS/kl25z.h +++ b/os/ext/CMSIS/KINETIS/kl25z.h @@ -56,9 +56,9 @@ typedef enum IRQn UART2_IRQn = 14, ADC0_IRQn = 15, CMP0_IRQn = 16, - TMP0_IRQn = 17, - TMP1_IRQn = 18, - TMP2_IRQn = 19, + TPM0_IRQn = 17, + TPM1_IRQn = 18, + TPM2_IRQn = 19, RTC0_IRQn = 20, RTC1_IRQn = 21, PIT_IRQn = 22, @@ -458,8 +458,8 @@ typedef struct #define SIM_SCGC6_DAC0 ((uint32_t)0x80000000) /*!< DAC0 Clock Gate Control */ #define SIM_SCGC6_RTC ((uint32_t)0x20000000) /*!< RTC Access Control */ #define SIM_SCGC6_ADC0 ((uint32_t)0x08000000) /*!< ADC0 Clock Gate Control */ -#define SIM_SCGC6_TMP2 ((uint32_t)0x04000000) /*!< TPM2 Clock Gate Control */ -#define SIM_SCGC6_TMP1 ((uint32_t)0x02000000) /*!< TPM1 Clock Gate Control */ +#define SIM_SCGC6_TPM2 ((uint32_t)0x04000000) /*!< TPM2 Clock Gate Control */ +#define SIM_SCGC6_TPM1 ((uint32_t)0x02000000) /*!< TPM1 Clock Gate Control */ #define SIM_SCGC6_TPM0 ((uint32_t)0x01000000) /*!< TPM0 Clock Gate Control */ #define SIM_SCGC6_PIT ((uint32_t)0x00800000) /*!< PIT Clock Gate Control */ #define SIM_SCGC6_DMAMUX ((uint32_t)0x00000002) /*!< DMA Mux Clock Gate Control */ |