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author | Giovanni Di Sirio <gdisirio@gmail.com> | 2016-05-08 09:14:40 +0000 |
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committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2016-05-08 09:14:40 +0000 |
commit | cc298608cc0d83dfbcce87c7c805f5107fecd7a6 (patch) | |
tree | fac3de0b08bd1b93b8bd8e022348eb33dff111ec /os/ex/Micron/n25q128.h | |
parent | 2c33cd5ebc6f6dbfa5ae6d64a070fd2b3d1b799a (diff) | |
download | ChibiOS-cc298608cc0d83dfbcce87c7c805f5107fecd7a6.tar.gz ChibiOS-cc298608cc0d83dfbcce87c7c805f5107fecd7a6.tar.bz2 ChibiOS-cc298608cc0d83dfbcce87c7c805f5107fecd7a6.zip |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9449 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/ex/Micron/n25q128.h')
-rw-r--r-- | os/ex/Micron/n25q128.h | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/os/ex/Micron/n25q128.h b/os/ex/Micron/n25q128.h index bdc500463..b86cfefc7 100644 --- a/os/ex/Micron/n25q128.h +++ b/os/ex/Micron/n25q128.h @@ -67,6 +67,24 @@ #define N25Q128_CMD_PROGRAM_OTP_ARRAY 0x42 /** @} */ +/** + * @name Status register bits + * @{ + */ +#define N25Q128_STS_BUSY 0x80U +#define N25Q128_STS_ERASE_SUSPEND 0x40U +#define N25Q128_STS_ERASE_ERROR 0x20U +#define N25Q128_STS_PROGRAM_ERROR 0x10U +#define N25Q128_STS_VPP_ERROR 0x08U +#define N25Q128_STS_PROGRAM_SUSPEND 0x04U +#define N25Q128_STS_PROTECTION_ERROR 0x02U +#define N25Q128_STS_RESERVED 0x01U +#define N25Q128_STS_ALL_ERRORS (N25Q128_STS_ERASE_ERROR | \ + N25Q128_STS_PROGRAM_ERROR | \ + N25Q128_STS_VPP_ERROR | \ + N25Q128_STS_PROTECTION_ERROR) +/** @} */ + /*===========================================================================*/ /* Driver pre-compile time settings. */ /*===========================================================================*/ @@ -84,6 +102,18 @@ #if !defined(N25Q128_SHARED_SPI) || defined(__DOXYGEN__) #define N25Q128_SHARED_SPI TRUE #endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the flash waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also when the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(N25Q128_NICE_WAITING) || defined(__DOXYGEN__) +#define N25Q128_NICE_WAITING TRUE +#endif /** @} */ /*===========================================================================*/ |