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authoredolomb <none@example.com>2018-01-10 17:00:26 +0000
committeredolomb <none@example.com>2018-01-10 17:00:26 +0000
commit77196a43a80c235b8b3bc9a1b93fbf52882223c6 (patch)
treeef2fe0b15583e7c385996e751328235476ffb9c1 /os/common
parentad34d8b512f5cd0c951d4f54760cb88f7d60fe89 (diff)
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PORT_SUPPORTS_RT for Cortex-A5 and Cortex-A9
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11255 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/common')
-rw-r--r--os/common/ports/ARM/chcore.h25
1 files changed, 24 insertions, 1 deletions
diff --git a/os/common/ports/ARM/chcore.h b/os/common/ports/ARM/chcore.h
index 3aa31eedc..926fc1045 100644
--- a/os/common/ports/ARM/chcore.h
+++ b/os/common/ports/ARM/chcore.h
@@ -39,7 +39,7 @@
/**
* @brief This port supports a realtime counter.
*/
-#define PORT_SUPPORTS_RT FALSE
+#define PORT_SUPPORTS_RT TRUE
/**
* @brief Natural alignment constant.
@@ -535,6 +535,29 @@ static inline void port_enable(void) {
}
/**
+ * @brief Returns the current value of the realtime counter.
+ *
+ * @return The realtime counter value.
+ */
+static inline rtcnt_t port_rt_get_counter_value(void) {
+
+#if ((ARM_CORE == ARM_CORE_CORTEX_A5) || (ARM_CORE == ARM_CORE_CORTEX_A9) || defined(__DOXYGEN__))
+
+ rtcnt_t cyc;
+
+ __asm volatile("mrc p15, 0, %[p0], c9, c13, 0" : [p0] "=r" (cyc) :);
+
+ return cyc;
+#else
+/*
+ * TODO develop same function for ARM_CORE_CORTEX_A8
+ */
+ return 0;
+
+#endif
+}
+
+/**
* @brief Enters an architecture-dependent IRQ-waiting mode.
* @details The function is meant to return when an interrupt becomes pending.
* The simplest implementation is an empty function or macro but this