git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6482 35acf78f-673a-0410-8e92-d51de3d6d3f4

8 files changed, 661 insertions, 7 deletions

diff --git a/os/common/ports/ARMCMx/compilers/GCC/rules.mk b/os/common/ports/ARMCMx/compilers/GCC/rules.mk
index 056708f93..06299400c 100644
--- a/os/common/ports/ARMCMx/compilers/GCC/rules.mk
+++ b/os/common/ports/ARMCMx/compilers/GCC/rules.mk
@@ -12,6 +12,9 @@ CPPOPT = $(USE_CPPOPT)
 # Garbage collection

 ifeq ($(USE_LINK_GC),yes)

   OPT += -ffunction-sections -fdata-sections -fno-common

+  LDOPT := --gc-sections

+else

+  LDOPT :=

 endif

 

 # Link time optimizations

@@ -29,13 +32,6 @@ else
   DADEFS += -DCORTEX_USE_FPU=FALSE

 endif

 

-# Garbage collection

-ifeq ($(USE_LINK_GC),yes)

-  LDOPT := --gc-sections

-else

-  LDOPT :=

-endif

-

 # Process stack size

 ifeq ($(USE_PROCESS_STACKSIZE),)

   LDOPT := $(LDOPT),--defsym=__process_stack_size__=0x400

diff --git a/os/common/ports/PPC/compilers/GCC/crt0.s b/os/common/ports/PPC/compilers/GCC/crt0.s
new file mode 100644
index 000000000..07e870451
--- /dev/null
+++ b/os/common/ports/PPC/compilers/GCC/crt0.s
@@ -0,0 +1,126 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,

+                 2011,2012,2013 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @file    PPC/crt0.s

+ * @brief   Generic PowerPC startup file for ChibiOS/RT.

+ *

+ * @addtogroup PPC_CORE

+ * @{

+ */

+

+#if !defined(__DOXYGEN__)

+

+        .section    .crt0, "ax"

+        .align		2

+        .globl      _boot_address

+        .type       _boot_address, @function

+_boot_address:

+        /*

+         * Stack setup.

+         */

+        lis         %r1, __process_stack_end__@h

+        ori         %r1, %r1, __process_stack_end__@l

+        li          %r0, 0

+        stwu        %r0, -8(%r1)

+        /*

+         * Small sections registers initialization.

+         */

+        lis         %r2, __sdata2_start__@h

+        ori         %r2, %r2, __sdata2_start__@l

+        lis         %r13, __sdata_start__@h

+        ori         %r13, %r13, __sdata_start__@l

+        /*

+         * Early initialization.

+         */

+        bl          __early_init

+        /*

+         * BSS clearing.

+         */

+        lis         %r4, __bss_start__@h

+        ori         %r4, %r4, __bss_start__@l

+        lis         %r5, __bss_end__@h

+        ori         %r5, %r5, __bss_end__@l

+        li          %r7, 0

+.bssloop:

+        cmpl        cr0, %r4, %r5

+        bge         cr0, .bssend

+        stw         %r7, 0(%r4)

+        addi        %r4, %r4, 4

+        b           .bssloop

+.bssend:

+        /*

+         * DATA initialization.

+         */

+        lis         %r4, __romdata_start__@h

+        ori         %r4, %r4, __romdata_start__@l

+        lis         %r5, __data_start__@h

+        ori         %r5, %r5, __data_start__@l

+        lis         %r6, __data_end__@h

+        ori         %r6, %r6, __data_end__@l

+.dataloop:

+        cmpl        cr0, %r5, %r6

+        bge         cr0, .dataend

+        lwz         %r7, 0(%r4)

+        addi        %r4, %r4, 4

+        stw         %r7, 0(%r5)

+        addi        %r5, %r5, 4

+        b           .dataloop

+.dataend:

+        /*

+         * Late initialization.

+         */

+        bl          __late_init

+        /*

+         * Main program invocation.

+         */

+        bl          main

+        b           _main_exit_handler

+

+        /*

+         * Default main exit code, infinite loop.

+         */

+        .weak       _main_exit_handler

+        .globl      _main_exit_handler

+        .type       _main_exit_handler, @function

+_main_exit_handler:

+        b           _main_exit_handler

+

+        /*

+         * Default early initialization code, none.

+         */

+        .weak       __early_init

+        .globl      __early_init

+        .type       __early_init, @function

+__early_init:

+        blr

+

+        /*

+         * Default late initialization code, none.

+         */

+        .weak       __late_init

+        .globl      __late_init

+        .type       __late_init, @function

+__late_init:

+        blr

+

+#endif /* !defined(__DOXYGEN__) */

+

+/** @} */

diff --git a/os/common/ports/PPC/compilers/GCC/ld/SPC56EL54_LSM.ld b/os/common/ports/PPC/compilers/GCC/ld/SPC56EL54_LSM.ld
new file mode 100644
index 000000000..5a0847c34
--- /dev/null
+++ b/os/common/ports/PPC/compilers/GCC/ld/SPC56EL54_LSM.ld
@@ -0,0 +1,30 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,

+                 2011,2012,2013 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/*

+ * SPC56EL54 memory setup in LSM mode.

+ */

+MEMORY

+{

+    flash     : org = 0x00000000, len = 768k

+    ram       : org = 0x40000000, len = 128k

+}

+

+INCLUDE rules_z4.ld

diff --git a/os/common/ports/PPC/compilers/GCC/ld/SPC56EL60_LSM.ld b/os/common/ports/PPC/compilers/GCC/ld/SPC56EL60_LSM.ld
new file mode 100644
index 000000000..fbd13a1c3
--- /dev/null
+++ b/os/common/ports/PPC/compilers/GCC/ld/SPC56EL60_LSM.ld
@@ -0,0 +1,30 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,

+                 2011,2012,2013 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/*

+ * SPC56EL60 memory setup in LSM mode.

+ */

+MEMORY

+{

+    flash     : org = 0x00000000, len = 1M

+    ram       : org = 0x40000000, len = 128k

+}

+

+INCLUDE rules_z4.ld

diff --git a/os/common/ports/PPC/compilers/GCC/ld/SPC56EL70_LSM.ld b/os/common/ports/PPC/compilers/GCC/ld/SPC56EL70_LSM.ld
new file mode 100644
index 000000000..db466a1bb
--- /dev/null
+++ b/os/common/ports/PPC/compilers/GCC/ld/SPC56EL70_LSM.ld
@@ -0,0 +1,30 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,

+                 2011,2012,2013 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/*

+ * SPC56EL70 memory setup in LSM mode.

+ */

+MEMORY

+{

+    flash     : org = 0x00000000, len = 2M

+    ram       : org = 0x40000000, len = 192k

+}

+

+INCLUDE rules_z4.ld

diff --git a/os/common/ports/PPC/compilers/GCC/rules.mk b/os/common/ports/PPC/compilers/GCC/rules.mk
new file mode 100644
index 000000000..0d799d8dc
--- /dev/null
+++ b/os/common/ports/PPC/compilers/GCC/rules.mk
@@ -0,0 +1,209 @@
+# PPC makefile scripts and rules.

+

+# Automatic compiler options

+OPT = $(USE_OPT)

+COPT = $(USE_COPT)

+CPPOPT = $(USE_CPPOPT)

+

+# Garbage collection

+ifeq ($(USE_LINK_GC),yes)

+  OPT += -ffunction-sections -fdata-sections -fno-common

+  LDOPT := --gc-sections

+else

+  LDOPT :=

+endif

+

+# Link time optimizations

+ifeq ($(USE_LTO),yes)

+  OPT += -flto

+endif

+

+# VLE option handling.

+ifeq ($(USE_VLE),yes)

+  DDEFS += -DPPC_USE_VLE=1

+  DADEFS += -DPPC_USE_VLE=1

+  MCU += -mvle

+else

+  DDEFS += -DPPC_USE_VLE=0

+  DADEFS += -DPPC_USE_VLE=0

+endif

+

+# Process stack size

+ifeq ($(USE_PROCESS_STACKSIZE),)

+  LDOPT := $(LDOPT),--defsym=__process_stack_size__=0x400

+else

+  LDOPT := $(LDOPT),--defsym=__process_stack_size__=$(USE_PROCESS_STACKSIZE)

+endif

+

+# Exceptions stack size

+ifeq ($(USE_EXCEPTIONS_STACKSIZE),)

+  LDOPT := $(LDOPT),--defsym=__main_stack_size__=0x400

+else

+  LDOPT := $(LDOPT),--defsym=__main_stack_size__=$(USE_EXCEPTIONS_STACKSIZE)

+endif

+

+# Output directory and files

+ifeq ($(BUILDDIR),)

+  BUILDDIR = build

+endif

+ifeq ($(BUILDDIR),.)

+  BUILDDIR = build

+endif

+OUTFILES = $(BUILDDIR)/$(PROJECT).elf $(BUILDDIR)/$(PROJECT).hex \

+           $(BUILDDIR)/$(PROJECT).mot $(BUILDDIR)/$(PROJECT).bin \

+           $(BUILDDIR)/$(PROJECT).dmp

+

+# Source files groups and paths

+SRC	      = $(CSRC)$(CPPSRC)

+SRCPATHS  = $(sort $(dir $(ASMXSRC)) $(dir $(ASMSRC)) $(dir $(SRC)))

+

+# Various directories

+OBJDIR    = $(BUILDDIR)/obj

+LSTDIR    = $(BUILDDIR)/lst

+

+# Object files groups

+COBJS     = $(addprefix $(OBJDIR)/, $(notdir $(CSRC:.c=.o)))

+CPPOBJS   = $(addprefix $(OBJDIR)/, $(notdir $(CPPSRC:.cpp=.o)))

+ASMOBJS   = $(addprefix $(OBJDIR)/, $(notdir $(ASMSRC:.s=.o)))

+ASMXOBJS  = $(addprefix $(OBJDIR)/, $(notdir $(ASMXSRC:.S=.o)))

+OBJS	  = $(ASMXOBJS) $(ASMOBJS) $(COBJS) $(CPPOBJS)

+

+# Paths

+IINCDIR = $(patsubst %,-I%,$(INCDIR) $(DINCDIR) $(UINCDIR))

+LLIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR))

+

+# Macros

+DEFS    = $(DDEFS) $(UDEFS)

+ADEFS   = $(DADEFS) $(UADEFS)

+

+# Libs

+LIBS    = $(DLIBS) $(ULIBS)

+

+# Various settings

+MCFLAGS   = -mcpu=$(MCU)

+ODFLAGS	  = -x --syms

+ASFLAGS   = $(MCFLAGS) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.s=.lst)) $(ADEFS)

+ASXFLAGS  = $(MCFLAGS) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.S=.lst)) $(ADEFS)

+CFLAGS    = $(MCFLAGS) $(OPT) $(COPT) $(CWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.c=.lst)) $(DEFS)

+CPPFLAGS  = $(MCFLAGS) $(OPT) $(CPPOPT) $(CPPWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.cpp=.lst)) $(DEFS)

+LDFLAGS   = $(MCFLAGS) $(OPT) -nostartfiles $(LLIBDIR) -Wl,-Map=$(BUILDDIR)/$(PROJECT).map,--cref,--no-warn-mismatch,--library-path=$(RULESPATH),--script=$(LDSCRIPT),$(LDOPT)

+

+# Generate dependency information

+CFLAGS   += -MD -MP -MF .dep/$(@F).d

+CPPFLAGS += -MD -MP -MF .dep/$(@F).d

+

+# Paths where to search for sources

+VPATH     = $(SRCPATHS)

+

+#

+# Makefile rules

+#

+

+all: $(OBJS) $(OUTFILES) MAKE_ALL_RULE_HOOK

+

+MAKE_ALL_RULE_HOOK:

+

+$(OBJS): | $(BUILDDIR)

+

+$(BUILDDIR) $(OBJDIR) $(LSTDIR):

+ifneq ($(USE_VERBOSE_COMPILE),yes)

+	@echo Compiler Options

+	@echo $(CC) -c $(CFLAGS) -I. $(IINCDIR) main.c -o main.o

+	@echo

+endif

+	mkdir -p $(OBJDIR)

+	mkdir -p $(LSTDIR)

+

+$(CPPOBJS) : $(OBJDIR)/%.o : %.cpp Makefile

+ifeq ($(USE_VERBOSE_COMPILE),yes)

+	@echo

+	$(CPPC) -c $(CPPFLAGS) -I. $(IINCDIR) $< -o $@

+else

+	@echo Compiling $(<F)

+	@$(CPPC) -c $(CPPFLAGS) -I. $(IINCDIR) $< -o $@

+endif

+

+$(COBJS) : $(OBJDIR)/%.o : %.c Makefile

+ifeq ($(USE_VERBOSE_COMPILE),yes)

+	@echo

+	$(CC) -c $(CFLAGS) -I. $(IINCDIR) $< -o $@

+else

+	@echo Compiling $(<F)

+	@$(CC) -c $(CFLAGS) -I. $(IINCDIR) $< -o $@

+endif

+

+$(ASMOBJS) : $(OBJDIR)/%.o : %.s Makefile

+ifeq ($(USE_VERBOSE_COMPILE),yes)

+	@echo

+	$(AS) -c $(ASFLAGS) -I. $(IINCDIR) $< -o $@

+else

+	@echo Compiling $(<F)

+	@$(AS) -c $(ASFLAGS) -I. $(IINCDIR) $< -o $@

+endif

+

+$(ASMXOBJS) : $(OBJDIR)/%.o : %.S Makefile

+ifeq ($(USE_VERBOSE_COMPILE),yes)

+	@echo 

+	$(CC) -c $(ASXFLAGS) -I. $(IINCDIR) $< -o $@

+else

+	@echo Compiling $(<F)

+	@$(CC) -c $(ASXFLAGS) -I. $(IINCDIR) $< -o $@

+endif

+

+%.elf: $(OBJS) $(LDSCRIPT)

+ifeq ($(USE_VERBOSE_COMPILE),yes)

+	@echo

+	$(LD) $(OBJS) $(LDFLAGS) $(LIBS) -o $@

+else

+	@echo Linking $@

+	@$(LD) $(OBJS) $(LDFLAGS) $(LIBS) -o $@

+endif

+

+%.hex: %.elf $(LDSCRIPT)

+ifeq ($(USE_VERBOSE_COMPILE),yes)

+	$(HEX) $< $@

+else

+	@echo Creating $@

+	@$(HEX) $< $@

+endif

+

+%.mot: %.elf $(LDSCRIPT)

+ifeq ($(USE_VERBOSE_COMPILE),yes)

+	$(MOT) $< $@

+else

+	@echo Creating $@

+	@$(MOT) $< $@

+endif

+

+%.bin: %.elf $(LDSCRIPT)

+ifeq ($(USE_VERBOSE_COMPILE),yes)

+	$(BIN) $< $@

+else

+	@echo Creating $@

+	@$(BIN) $< $@

+endif

+

+%.dmp: %.elf $(LDSCRIPT)

+ifeq ($(USE_VERBOSE_COMPILE),yes)

+	$(OD) $(ODFLAGS) $< > $@

+else

+	@echo Creating $@

+	@$(OD) $(ODFLAGS) $< > $@

+	@echo

+	@$(SZ) $<

+	@echo

+	@echo Done

+endif

+

+clean:

+	@echo Cleaning

+	-rm -fR .dep $(BUILDDIR)

+	@echo

+	@echo Done

+

+#

+# Include the dependency files, should be the last of the makefile

+#

+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)

+

+# *** EOF ***

diff --git a/os/common/ports/PPC/compilers/GCC/rules_z4.ld b/os/common/ports/PPC/compilers/GCC/rules_z4.ld
new file mode 100644
index 000000000..72932c6fb
--- /dev/null
+++ b/os/common/ports/PPC/compilers/GCC/rules_z4.ld
@@ -0,0 +1,161 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,

+                 2011,2012,2013 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+__ram_size__            = LENGTH(ram);

+__ram_start__           = ORIGIN(ram);

+__ram_end__             = ORIGIN(ram) + LENGTH(ram);

+

+ENTRY(_reset_address)

+

+SECTIONS

+{

+    . = ORIGIN(flash);

+    .boot0 : ALIGN(16) SUBALIGN(16)

+    {

+        . += ${conf.instance.runtime_settings.load_address[0]?trim};

+        . = ALIGN(0x10000);

+        __ivpr_base__ = .;

+        KEEP(*(.boot))

+    } > flash

+

+    .boot1 : ALIGN(16) SUBALIGN(16)

+    {

+        KEEP(*(.handlers))

+        KEEP(*(.crt0))

+        . = ALIGN(0x800);

+        KEEP(*(.vectors))

+    } > flash

+

+    constructors : ALIGN(4) SUBALIGN(4)

+    {

+        PROVIDE(__init_array_start = .);

+        KEEP(*(SORT(.init_array.*)))

+        KEEP(*(.init_array))

+        PROVIDE(__init_array_end = .);

+    } > flash

+

+    destructors : ALIGN(4) SUBALIGN(4)

+    {

+        PROVIDE(__fini_array_start = .);

+        KEEP(*(.fini_array))

+        KEEP(*(SORT(.fini_array.*)))

+        PROVIDE(__fini_array_end = .);

+    } > flash

+

+    .text_vle : ALIGN(16) SUBALIGN(16)

+    {

+        *(.text_vle)

+        *(.text_vle.*)

+        *(.gnu.linkonce.t_vle.*)

+    } > flash

+

+    .text : ALIGN(16) SUBALIGN(16)

+    {

+        *(.text)

+        *(.text.*)

+        *(.gnu.linkonce.t.*)

+    } > flash

+

+    .rodata : ALIGN(16) SUBALIGN(16)

+    {

+        *(.glue_7t)

+        *(.glue_7)

+        *(.gcc*)

+        *(.rodata)

+        *(.rodata.*)

+        *(.rodata1)

+    } > flash

+

+    .sdata2 : ALIGN(16) SUBALIGN(16)

+    {

+        __sdata2_start__ = . + 0x8000;

+        *(.sdata2)

+        *(.sdata2.*)

+        *(.gnu.linkonce.s2.*)

+        *(.sbss2)

+        *(.sbss2.*)

+        *(.gnu.linkonce.sb2.*)

+    } > flash

+

+    .eh_frame_hdr :

+    {

+        *(.eh_frame_hdr)

+    } > flash

+

+    .eh_frame : ONLY_IF_RO

+    {

+        *(.eh_frame)

+    } > flash

+

+    .romdata : ALIGN(16) SUBALIGN(16)

+    {

+        __romdata_start__ = .;

+    } > flash

+

+    .stacks : ALIGN(16) SUBALIGN(16)

+    {

+        . = ALIGN(8);

+        __irq_stack_base__ = .;

+        . += __irq_stack_size__;

+        . = ALIGN(8);

+        __irq_stack_end__ = .;

+        __process_stack_base__ = .;

+        __main_thread_stack_base__ = .;

+        . += __process_stack_size__;

+        . = ALIGN(8);

+        __process_stack_end__ = .;

+        __main_thread_stack_end__ = .;

+    } > ram

+

+    .data : AT(__romdata_start__)

+    {

+        . = ALIGN(4);

+        __data_start__ = .;

+        *(.data)

+        *(.data.*)

+        *(.gnu.linkonce.d.*)

+        __sdata_start__ = . + 0x8000;

+        *(.sdata)

+        *(.sdata.*)

+        *(.gnu.linkonce.s.*)

+        __data_end__ = .;

+    } > ram

+

+    .sbss :

+    {

+        __bss_start__ = .;

+        *(.sbss)

+        *(.sbss.*)

+        *(.gnu.linkonce.sb.*)

+        *(.scommon)

+    } > ram

+

+    .bss :

+    {

+        *(.bss)

+        *(.bss.*)

+        *(.gnu.linkonce.b.*)

+        *(COMMON)

+        __bss_end__ = .;

+    } > ram

+

+    __heap_base__   = __bss_end__;

+    __heap_end__    = __ram_end__;

+}

diff --git a/os/common/ports/PPC/devices/SPC56ELxx/ppcparams.h b/os/common/ports/PPC/devices/SPC56ELxx/ppcparams.h
new file mode 100644
index 000000000..c09b0b875
--- /dev/null
+++ b/os/common/ports/PPC/devices/SPC56ELxx/ppcparams.h
@@ -0,0 +1,72 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,

+                 2011,2012,2013 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @file    SPC56ELxx/ppcparams.h

+ * @brief   PowerPC parameters for the SPC56ELxx.

+ *

+ * @defgroup PPC_SPC56ELxx SPC56ELxx Specific Parameters

+ * @ingroup PPC_SPECIFIC

+ * @details This file contains the PowerPC specific parameters for the

+ *          SPC56ELxx platform.

+ * @{

+ */

+

+#ifndef _PPCPARAMS_H_

+#define _PPCPARAMS_H_

+

+/**

+ * @brief   PPC core model.

+ */

+#define PPC_VARIANT                 PPC_VARIANT_e200z4

+

+/**

+ * @brief   Number of writable bits in IVPR register.

+ */

+#define PPC_IVPR_BITS               16

+

+/**

+ * @brief   IVORx registers support.

+ */

+#define PPC_SUPPORTS_IVORS          TRUE

+

+/**

+ * @brief   Book E instruction set support.

+ */

+#define PPC_SUPPORTS_BOOKE          TRUE

+

+/**

+ * @brief   VLE instruction set support.

+ */

+#define PPC_SUPPORTS_VLE            TRUE

+

+/**

+ * @brief   Supports VLS Load/Store Multiple Volatile instructions.

+ */

+#define PPC_SUPPORTS_VLE_MULTI      TRUE

+

+/**

+ * @brief   Supports the decrementer timer.

+ */

+#define PPC_SUPPORTS_DECREMENTER    TRUE

+

+#endif /* _PPCPARAMS_H_ */

+

+/** @} */