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authoredolomb <none@example.com>2017-08-28 13:27:23 +0000
committeredolomb <none@example.com>2017-08-28 13:27:23 +0000
commit76867afdb24af679a31186e1ed1186ffb012c058 (patch)
tree65987e4650fb90043dd788f215b89a2822a56eb5 /os/common/startup
parent6fb2ba26c4433050a5cf79a33514955091540078 (diff)
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Added DMA Peripheral Interface Number
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10500 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/common/startup')
-rw-r--r--os/common/startup/ARM/devices/SAMA5D2/sama5d2x.h61
1 files changed, 61 insertions, 0 deletions
diff --git a/os/common/startup/ARM/devices/SAMA5D2/sama5d2x.h b/os/common/startup/ARM/devices/SAMA5D2/sama5d2x.h
index c5543ca0a..5d5e3b997 100644
--- a/os/common/startup/ARM/devices/SAMA5D2/sama5d2x.h
+++ b/os/common/startup/ARM/devices/SAMA5D2/sama5d2x.h
@@ -167,6 +167,67 @@
#define ID_PERIPH_COUNT (79) /**< \brief Number of peripheral IDs */
+/* XDMA Peripheral Interface Number */
+
+#define PERID_TWIHS0_TX 0
+#define PERID_TWIHS0_RX 1
+#define PERID_TWIHS1_TX 2
+#define PERID_TWIHS1_RX 3
+#define PERID_QSPI0_TX 4
+#define PERID_QSPI0_RX 5
+#define PERID_SPI0_TX 6
+#define PERID_SPI0_RX 7
+#define PERID_SPI1_TX 8
+#define PERID_SPI1_RX 9
+#define PERID_PWM_TX 10
+#define PERID_PWM_RX 0xff
+#define PERID_FLEXCOM0_TX 11
+#define PERID_FLEXCOM0_RX 12
+#define PERID_FLEXCOM1_TX 13
+#define PERID_FLEXCOM1_RX 14
+#define PERID_FLEXCOM2_TX 15
+#define PERID_FLEXCOM2_RX 16
+#define PERID_FLEXCOM3_TX 17
+#define PERID_FLEXCOM3_RX 18
+#define PERID_FLEXCOM4_TX 19
+#define PERID_FLEXCOM4_RX 20
+#define PERID_SSC0_TX 21
+#define PERID_SSC0_RX 22
+#define PERID_SSC1_TX 23
+#define PERID_SSC1_RX 24
+#define PERID_ADC_TX 0xff
+#define PERID_ADC_RX 25
+#define PERID_AES_TX 26
+#define PERID_AES_RX 27
+#define PERID_TDES_TX 28
+#define PERID_TDES_RX 29
+#define PERID_SHA_TX 30
+#define PERID_SHA_RX 0xff
+#define PERID_I2SC0_TX 31
+#define PERID_I2SC0_RX 32
+#define PERID_I2SC1_TX 33
+#define PERID_I2SC1_RX 34
+#define PERID_UART0_TX 35
+#define PERID_UART0_RX 36
+#define PERID_UART1_TX 37
+#define PERID_UART1_RX 38
+#define PERID_UART2_TX 39
+#define PERID_UART2_RX 40
+#define PERID_UART3_TX 41
+#define PERID_UART3_RX 42
+#define PERID_UART4_TX 43
+#define PERID_UART4_RX 44
+#define PERID_TC0_TX 0xff
+#define PERID_TC0_RX 45
+#define PERID_TC1_TX 0xff
+#define PERID_TC1_RX 46
+#define PERID_CLASSD_TX 47
+#define PERID_CLASSD_RX 0xff
+#define PERID_QSPI1_TX 48
+#define PERID_QSPI1_RX 49
+#define PERID_PDMIC_TX 0xff
+#define PERID_PDMIC_RX 50
+
#define ID_SAIC_FIQ_MSK (1 << (ID_SAIC_FIQ & 0x1F))
#define ID_ARM_PMU_MSK (1 << (ID_ARM_PMU & 0x1F))
#define ID_PIT_MSK (1 << (ID_PIT & 0x1F))