Initial STM32H7 stuff.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11145 35acf78f-673a-0410-8e92-d51de3d6d3f4

3 files changed, 237 insertions, 0 deletions

diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32H743xI.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32H743xI.ld
new file mode 100755
index 000000000..56e1d29ae
--- /dev/null
+++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32H743xI.ld
@@ -0,0 +1,132 @@
+/*

+    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+/*

+ * ST32F746xG generic setup.

+ * 

+ * RAM0 - Data, Heap.

+ * RAM3 - Main Stack, Process Stack, BSS, NOCACHE, ETH.

+ *

+ * Notes:

+ * BSS is placed in DTCM RAM in order to simplify DMA buffers management.

+ */

+MEMORY

+{

+    flash0  : org = 0x08000000, len = 2M        /* Flash bank1+bank2 */

+    flash1  : org = 0x08000000, len = 1M        /* Flash bank 1 */

+    flash2  : org = 0x08100000, len = 1M        /* Flash bank 2 */

+    flash3  : org = 0x00000000, len = 0

+    flash4  : org = 0x00000000, len = 0

+    flash5  : org = 0x00000000, len = 0

+    flash6  : org = 0x00000000, len = 0

+    flash7  : org = 0x00000000, len = 0

+    ram0    : org = 0x24000000, len = 512k      /* AXI SRAM */

+    ram1    : org = 0x30000000, len = 288k      /* AHB SRAM1+SRAM2+SRAM3 */

+    ram2    : org = 0x38000000, len = 64k       /* AHB SRAM4 */

+    ram3    : org = 0x20000000, len = 128k      /* DTCM-RAM */

+    ram4    : org = 0x00000000, len = 64k       /* ITCM-RAM */

+    ram5    : org = 0x38800000, len = 4k        /* BCKP SRAM */

+    ram6    : org = 0x00000000, len = 0

+    ram7    : org = 0x00000000, len = 0

+}

+

+/* For each data/text section two region are defined, a virtual region

+   and a load region (_LMA suffix).*/

+

+/* Flash region to be used for exception vectors.*/

+REGION_ALIAS("VECTORS_FLASH", flash1);

+REGION_ALIAS("VECTORS_FLASH_LMA", flash0);

+

+/* Flash region to be used for constructors and destructors.*/

+REGION_ALIAS("XTORS_FLASH", flash1);

+REGION_ALIAS("XTORS_FLASH_LMA", flash0);

+

+/* Flash region to be used for code text.*/

+REGION_ALIAS("TEXT_FLASH", flash1);

+REGION_ALIAS("TEXT_FLASH_LMA", flash0);

+

+/* Flash region to be used for read only data.*/

+REGION_ALIAS("RODATA_FLASH", flash0);

+REGION_ALIAS("RODATA_FLASH_LMA", flash0);

+

+/* Flash region to be used for various.*/

+REGION_ALIAS("VARIOUS_FLASH", flash1);

+REGION_ALIAS("VARIOUS_FLASH_LMA", flash0);

+

+/* Flash region to be used for RAM(n) initialization data.*/

+REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0);

+

+/* RAM region to be used for Main stack. This stack accommodates the processing

+   of all exceptions and interrupts.*/

+REGION_ALIAS("MAIN_STACK_RAM", ram3);

+

+/* RAM region to be used for the process stack. This is the stack used by

+   the main() function.*/

+REGION_ALIAS("PROCESS_STACK_RAM", ram3);

+

+/* RAM region to be used for data segment.*/

+REGION_ALIAS("DATA_RAM", ram0);

+REGION_ALIAS("DATA_RAM_LMA", flash0);

+

+/* RAM region to be used for BSS segment.*/

+REGION_ALIAS("BSS_RAM", ram3);

+

+/* RAM region to be used for the default heap.*/

+REGION_ALIAS("HEAP_RAM", ram0);

+

+/* Stack rules inclusion.*/

+INCLUDE rules_stacks.ld

+

+/*===========================================================================*/

+/* Custom sections for STM32F7xx.                                            */

+/*===========================================================================*/

+

+/* RAM region to be used for nocache segment.*/

+REGION_ALIAS("NOCACHE_RAM", ram3);

+

+/* RAM region to be used for eth segment.*/

+REGION_ALIAS("ETH_RAM", ram3);

+

+SECTIONS

+{

+    /* Special section for non cache-able areas.*/

+    .nocache (NOLOAD) : ALIGN(4)

+    {

+        __nocache_base__ = .;

+        *(.nocache)

+        *(.nocache.*)

+        *(.bss.__nocache_*)

+        . = ALIGN(4);

+        __nocache_end__ = .;

+    } > NOCACHE_RAM

+

+    /* Special section for Ethernet DMA non cache-able areas.*/

+    .eth (NOLOAD) : ALIGN(4)

+    {

+        __eth_base__ = .;

+        *(.eth)

+        *(.eth.*)

+        *(.bss.__eth_*)

+        . = ALIGN(4);

+        __eth_end__ = .;

+    } > ETH_RAM

+}

+

+/* Code rules inclusion.*/

+INCLUDE rules_code.ld

+

+/* Data rules inclusion.*/

+INCLUDE rules_data.ld

diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32h7xx.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32h7xx.mk
new file mode 100644
index 000000000..c01646cc3
--- /dev/null
+++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32h7xx.mk
@@ -0,0 +1,17 @@
+# List of the ChibiOS generic STM32H7xx startup and CMSIS files.

+STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \

+             $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c

+          

+STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S

+

+STARTUPINC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \

+             $(CHIBIOS)/os/common/startup/ARMCMx/devices/STM32H7xx \

+             $(CHIBIOS)/os/common/ext/ARM/CMSIS/Core/Include \

+             $(CHIBIOS)/os/common/ext/ST/STM32H7xx

+

+STARTUPLD  = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/ld

+

+# Shared variables

+ALLXASMSRC += $(STARTUPASM)

+ALLCSRC    += $(STARTUPSRC)

+ALLINC     += $(STARTUPINC)

diff --git a/os/common/startup/ARMCMx/devices/STM32H7xx/cmparams.h b/os/common/startup/ARMCMx/devices/STM32H7xx/cmparams.h
new file mode 100644
index 000000000..014db3a23
--- /dev/null
+++ b/os/common/startup/ARMCMx/devices/STM32H7xx/cmparams.h
@@ -0,0 +1,88 @@
+/*

+    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+/**

+ * @file    STM32H7xx/cmparams.h

+ * @brief   ARM Cortex-M7 parameters for the STM32F4xx.

+ *

+ * @defgroup ARMCMx_STM32H7xx STM32H7xx Specific Parameters

+ * @ingroup ARMCMx_SPECIFIC

+ * @details This file contains the Cortex-M7 specific parameters for the

+ *          STM32H7xx platform.

+ * @{

+ */

+

+#ifndef CMPARAMS_H

+#define CMPARAMS_H

+

+/**

+ * @brief   Cortex core model.

+ */

+#define CORTEX_MODEL            7

+

+/**

+ * @brief   Floating Point unit presence.

+ */

+#define CORTEX_HAS_FPU          1

+

+/**

+ * @brief   Number of bits in priority masks.

+ */

+#define CORTEX_PRIORITY_BITS    4

+

+/**

+ * @brief   Number of interrupt vectors.

+ * @note    This number does not include the 16 system vectors and must be

+ *          rounded to a multiple of 8.

+ */

+#define CORTEX_NUM_VECTORS      152

+

+/* The following code is not processed when the file is included from an

+   asm module.*/

+#if !defined(_FROM_ASM_)

+

+/* If the device type is not externally defined, for example from the Makefile,

+   then a file named board.h is included. This file must contain a device

+   definition compatible with the vendor include file.*/

+#if !defined(STM32H743xx) && !defined(STM32H753xx)

+#include "board.h"

+#endif

+

+/* Including the device CMSIS header. Note, we are not using the definitions

+   from this header because we need this file to be usable also from

+   assembler source files. We verify that the info matches instead.*/

+#include "stm32h7xx.h"

+

+/*lint -save -e9029 [10.4] Signedness comes from external files, it is

+  unpredictable but gives no problems.*/

+#if CORTEX_MODEL != __CORTEX_M

+#error "CMSIS __CORTEX_M mismatch"

+#endif

+

+#if CORTEX_HAS_FPU != __FPU_PRESENT

+#error "CMSIS __FPU_PRESENT mismatch"

+#endif

+

+#if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS

+#error "CMSIS __NVIC_PRIO_BITS mismatch"

+#endif

+/*lint -restore*/

+

+#endif /* !defined(_FROM_ASM_) */

+

+#endif /* CMPARAMS_H */

+

+/** @} */