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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2014-07-24 07:29:41 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2014-07-24 07:29:41 +0000
commitdd1dc109735e94d6f88c239b4e2b4f084f0534b1 (patch)
treee41009d1869cfee3172a56c2d0021c402ca1a494 /os/common/ports
parent37de072555e10227bafa83dd3f14d1cf0341d7c9 (diff)
downloadChibiOS-dd1dc109735e94d6f88c239b4e2b4f084f0534b1.tar.gz
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7064 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/common/ports')
-rw-r--r--os/common/ports/e200/compilers/GCC/vectors.h64
-rw-r--r--os/common/ports/e200/devices/SPC560BCxx/intc.h92
-rw-r--r--os/common/ports/e200/devices/SPC560BCxx/ppcparams.h16
-rw-r--r--os/common/ports/e200/devices/SPC560Bxx/intc.h92
-rw-r--r--os/common/ports/e200/devices/SPC560Bxx/ppcparams.h16
-rw-r--r--os/common/ports/e200/devices/SPC560Dxx/intc.h92
-rw-r--r--os/common/ports/e200/devices/SPC560Dxx/ppcparams.h16
-rw-r--r--os/common/ports/e200/devices/SPC560Pxx/intc.h92
-rw-r--r--os/common/ports/e200/devices/SPC560Pxx/ppcparams.h16
-rw-r--r--os/common/ports/e200/devices/SPC563Mxx/intc.h92
-rw-r--r--os/common/ports/e200/devices/SPC563Mxx/ppcparams.h16
-rw-r--r--os/common/ports/e200/devices/SPC564Axx/intc.h92
-rw-r--r--os/common/ports/e200/devices/SPC564Axx/ppcparams.h16
-rw-r--r--os/common/ports/e200/devices/SPC56ECxx/intc.h94
-rw-r--r--os/common/ports/e200/devices/SPC56ECxx/ppcparams.h16
-rw-r--r--os/common/ports/e200/devices/SPC56ELxx/intc.h92
-rw-r--r--os/common/ports/e200/devices/SPC56ELxx/ppcparams.h16
17 files changed, 778 insertions, 152 deletions
diff --git a/os/common/ports/e200/compilers/GCC/vectors.h b/os/common/ports/e200/compilers/GCC/vectors.h
index e1693a66e..8a6da0dbf 100644
--- a/os/common/ports/e200/compilers/GCC/vectors.h
+++ b/os/common/ports/e200/compilers/GCC/vectors.h
@@ -35,18 +35,6 @@
/* Module constants. */
/*===========================================================================*/
-#if PPC_INTC_TYPE == 0
-#define INTC_IACKR_ADDR (PPC_INTC_BASE + 0x10)
-#define INTC_EOIR_ADDR (PPC_INTC_BASE + 0x18)
-
-#elif PPC_INTC_TYPE == 1
-#define INTC_IACKR_ADDR (PPC_INTC_BASE + 0x20)
-#define INTC_EOIR_ADDR (PPC_INTC_BASE + 0x30)
-
-#else
-#error "unknown INTC type"
-#endif
-
/*===========================================================================*/
/* Module pre-compile time settings. */
/*===========================================================================*/
@@ -63,40 +51,6 @@
/* Module macros. */
/*===========================================================================*/
-/* The following code is not processed when the file is included from an
- asm module.*/
-#if !defined(_FROM_ASM_)
-
-/**
- * @name INTC-related macros
- * @{
- */
-#if PPC_INTC_TYPE == 0
-#define INTC_BCR (*((volatile uint32_t *)(PPC_INTC_BASE + 0)))
-#define INTC_CPR(n) (*((volatile uint32_t *)(PPC_INTC_BASE + 8 + ((n) * sizeof (uint32_t)))))
-#define INTC_IACKR(n) (*((volatile uint32_t *)(PPC_INTC_BASE + 0x10 + ((n) * sizeof (uint32_t)))))
-#define INTC_EOIR(n) (*((volatile uint32_t *)(PPC_INTC_BASE + 0x18 + ((n) * sizeof (uint32_t)))))
-#define INTC_PSR(n) (*((volatile uint8_t *)(PPC_INTC_BASE + 0x40 + ((n) * sizeof (uint8_t)))))
-
-#elif PPC_INTC_TYPE == 1
-#define INTC_BCR (*((volatile uint32_t *)(PPC_INTC_BASE + 0)))
-#define INTC_MPROT (*((volatile uint32_t *)(PPC_INTC_BASE + 4)))
-#define INTC_CPR(n) (*((volatile uint32_t *)(PPC_INTC_BASE + 0x10 + ((n) * sizeof (uint32_t)))))
-#define INTC_IACKR(n) (*((volatile uint32_t *)(PPC_INTC_BASE + 0x20 + ((n) * sizeof (uint32_t)))))
-#define INTC_EOIR(n) (*((volatile uint32_t *)(PPC_INTC_BASE + 0x30 + ((n) * sizeof (uint32_t)))))
-#define INTC_PSR(n) (*((volatile uint16_t *)(PPC_INTC_BASE + 0x60 + ((n) * sizeof (uint16_t)))))
-
-#else
-#error "unknown INTC type"
-#endif
-
-/**
- * @brief PSR register content helper
- */
-#define INTC_PSR_ENABLE(cores, prio) ((uint32_t)(cores) | (uint32_t)(prio))
-
-#endif /* !defined(_FROM_ASM_) */
-
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
@@ -123,24 +77,6 @@ extern "C" {
/* Module inline functions. */
/*===========================================================================*/
-/* The following code is not processed when the file is included from an
- asm module.*/
-#if !defined(_FROM_ASM_)
-
-static inline void intc_init(void) {
- unsigned i;
-
- /* INTC initialization, software vector mode, 4 bytes vectors, starting
- at priority 0.*/
- INTC_BCR = 0;
- for (i = 0; i < PPC_CORE_NUMBER; i++) {
- INTC_CPR(i) = 0;
- INTC_IACKR(i) = (uint32_t)_vectors;
- }
-}
-
-#endif /* !defined(_FROM_ASM_) */
-
#endif /* _VECTORS_H_ */
/** @} */
diff --git a/os/common/ports/e200/devices/SPC560BCxx/intc.h b/os/common/ports/e200/devices/SPC560BCxx/intc.h
new file mode 100644
index 000000000..a4843b0dd
--- /dev/null
+++ b/os/common/ports/e200/devices/SPC560BCxx/intc.h
@@ -0,0 +1,92 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011,2012,2013 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file SPC560BCxx/intc.h
+ * @brief SPC560BCxx INTC module header.
+ *
+ * @addtogroup INTC
+ * @{
+ */
+
+#ifndef _INTC_H_
+#define _INTC_H_
+
+/*===========================================================================*/
+/* Module constants. */
+/*===========================================================================*/
+
+/**
+ * @name INTC addresses
+ * @{
+ */
+#define INTC_BASE 0xFFF48000
+#define INTC_IACKR_ADDR (INTC_BASE + 0x10)
+#define INTC_EOIR_ADDR (INTC_BASE + 0x18)
+/** @} */
+
+/*===========================================================================*/
+/* Module pre-compile time settings. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Derived constants and error checks. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module data structures and types. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module macros. */
+/*===========================================================================*/
+
+/**
+ * @name INTC-related macros
+ * @{
+ */
+#define INTC_BCR (*((volatile uint32_t *)(INTC_BASE + 0)))
+#define INTC_CPR(n) (*((volatile uint32_t *)(INTC_BASE + 8 + ((n) * sizeof (uint32_t)))))
+#define INTC_IACKR(n) (*((volatile uint32_t *)(INTC_BASE + 0x10 + ((n) * sizeof (uint32_t)))))
+#define INTC_EOIR(n) (*((volatile uint32_t *)(INTC_BASE + 0x18 + ((n) * sizeof (uint32_t)))))
+#define INTC_PSR(n) (*((volatile uint8_t *)(INTC_BASE + 0x40 + ((n) * sizeof (uint8_t)))))
+/** @} */
+
+/**
+ * @brief Core selection macros for PSR register.
+ */
+#define INTC_PSR_CORE0 0x00
+
+/**
+ * @brief PSR register content helper
+ */
+#define INTC_PSR_ENABLE(cores, prio) ((uint32_t)(cores) | (uint32_t)(prio))
+
+/*===========================================================================*/
+/* External declarations. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module inline functions. */
+/*===========================================================================*/
+
+#endif /* _INTC_H_ */
+
+/** @} */
diff --git a/os/common/ports/e200/devices/SPC560BCxx/ppcparams.h b/os/common/ports/e200/devices/SPC560BCxx/ppcparams.h
index 6bda168c6..db0d73ee3 100644
--- a/os/common/ports/e200/devices/SPC560BCxx/ppcparams.h
+++ b/os/common/ports/e200/devices/SPC560BCxx/ppcparams.h
@@ -33,6 +33,11 @@
#define _PPCPARAMS_H_
/**
+ * @brief Family identification macro.
+ */
+#define PPC_SPC560BCxx
+
+/**
* @brief PPC core model.
*/
#define PPC_VARIANT PPC_VARIANT_e200z0
@@ -77,17 +82,6 @@
*/
#define PPC_NUM_VECTORS 217
-/**
- * @brief Memory address of the INTC controller.
- */
-#define PPC_INTC_BASE 0xFFF48000
-
-/**
- * @brief Type of the INTC controller.
- * @note 0=SPC56x, 1=SPC57x.
- */
-#define PPC_INTC_TYPE 0
-
#endif /* _PPCPARAMS_H_ */
/** @} */
diff --git a/os/common/ports/e200/devices/SPC560Bxx/intc.h b/os/common/ports/e200/devices/SPC560Bxx/intc.h
new file mode 100644
index 000000000..e0a57c7e5
--- /dev/null
+++ b/os/common/ports/e200/devices/SPC560Bxx/intc.h
@@ -0,0 +1,92 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011,2012,2013 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file SPC560Bxx/intc.h
+ * @brief SPC560Bxx INTC module header.
+ *
+ * @addtogroup INTC
+ * @{
+ */
+
+#ifndef _INTC_H_
+#define _INTC_H_
+
+/*===========================================================================*/
+/* Module constants. */
+/*===========================================================================*/
+
+/**
+ * @name INTC addresses
+ * @{
+ */
+#define INTC_BASE 0xFFF48000
+#define INTC_IACKR_ADDR (INTC_BASE + 0x10)
+#define INTC_EOIR_ADDR (INTC_BASE + 0x18)
+/** @} */
+
+/*===========================================================================*/
+/* Module pre-compile time settings. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Derived constants and error checks. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module data structures and types. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module macros. */
+/*===========================================================================*/
+
+/**
+ * @name INTC-related macros
+ * @{
+ */
+#define INTC_BCR (*((volatile uint32_t *)(INTC_BASE + 0)))
+#define INTC_CPR(n) (*((volatile uint32_t *)(INTC_BASE + 8 + ((n) * sizeof (uint32_t)))))
+#define INTC_IACKR(n) (*((volatile uint32_t *)(INTC_BASE + 0x10 + ((n) * sizeof (uint32_t)))))
+#define INTC_EOIR(n) (*((volatile uint32_t *)(INTC_BASE + 0x18 + ((n) * sizeof (uint32_t)))))
+#define INTC_PSR(n) (*((volatile uint8_t *)(INTC_BASE + 0x40 + ((n) * sizeof (uint8_t)))))
+/** @} */
+
+/**
+ * @brief Core selection macros for PSR register.
+ */
+#define INTC_PSR_CORE0 0x00
+
+/**
+ * @brief PSR register content helper
+ */
+#define INTC_PSR_ENABLE(cores, prio) ((uint32_t)(cores) | (uint32_t)(prio))
+
+/*===========================================================================*/
+/* External declarations. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module inline functions. */
+/*===========================================================================*/
+
+#endif /* _INTC_H_ */
+
+/** @} */
diff --git a/os/common/ports/e200/devices/SPC560Bxx/ppcparams.h b/os/common/ports/e200/devices/SPC560Bxx/ppcparams.h
index c7fd78626..e66c44338 100644
--- a/os/common/ports/e200/devices/SPC560Bxx/ppcparams.h
+++ b/os/common/ports/e200/devices/SPC560Bxx/ppcparams.h
@@ -33,6 +33,11 @@
#define _PPCPARAMS_H_
/**
+ * @brief Family identification macro.
+ */
+#define PPC_SPC560Bxx
+
+/**
* @brief PPC core model.
*/
#define PPC_VARIANT PPC_VARIANT_e200z0
@@ -77,17 +82,6 @@
*/
#define PPC_NUM_VECTORS 234
-/**
- * @brief Memory address of the INTC controller.
- */
-#define PPC_INTC_BASE 0xFFF48000
-
-/**
- * @brief Type of the INTC controller.
- * @note 0=SPC56x, 1=SPC57x.
- */
-#define PPC_INTC_TYPE 0
-
#endif /* _PPCPARAMS_H_ */
/** @} */
diff --git a/os/common/ports/e200/devices/SPC560Dxx/intc.h b/os/common/ports/e200/devices/SPC560Dxx/intc.h
new file mode 100644
index 000000000..39dc6cb7e
--- /dev/null
+++ b/os/common/ports/e200/devices/SPC560Dxx/intc.h
@@ -0,0 +1,92 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011,2012,2013 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file SPC560Dxx/intc.h
+ * @brief SPC560Dxx INTC module header.
+ *
+ * @addtogroup INTC
+ * @{
+ */
+
+#ifndef _INTC_H_
+#define _INTC_H_
+
+/*===========================================================================*/
+/* Module constants. */
+/*===========================================================================*/
+
+/**
+ * @name INTC addresses
+ * @{
+ */
+#define INTC_BASE 0xFFF48000
+#define INTC_IACKR_ADDR (INTC_BASE + 0x10)
+#define INTC_EOIR_ADDR (INTC_BASE + 0x18)
+/** @} */
+
+/*===========================================================================*/
+/* Module pre-compile time settings. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Derived constants and error checks. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module data structures and types. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module macros. */
+/*===========================================================================*/
+
+/**
+ * @name INTC-related macros
+ * @{
+ */
+#define INTC_BCR (*((volatile uint32_t *)(INTC_BASE + 0)))
+#define INTC_CPR(n) (*((volatile uint32_t *)(INTC_BASE + 8 + ((n) * sizeof (uint32_t)))))
+#define INTC_IACKR(n) (*((volatile uint32_t *)(INTC_BASE + 0x10 + ((n) * sizeof (uint32_t)))))
+#define INTC_EOIR(n) (*((volatile uint32_t *)(INTC_BASE + 0x18 + ((n) * sizeof (uint32_t)))))
+#define INTC_PSR(n) (*((volatile uint8_t *)(INTC_BASE + 0x40 + ((n) * sizeof (uint8_t)))))
+/** @} */
+
+/**
+ * @brief Core selection macros for PSR register.
+ */
+#define INTC_PSR_CORE0 0x00
+
+/**
+ * @brief PSR register content helper
+ */
+#define INTC_PSR_ENABLE(cores, prio) ((uint32_t)(cores) | (uint32_t)(prio))
+
+/*===========================================================================*/
+/* External declarations. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module inline functions. */
+/*===========================================================================*/
+
+#endif /* _INTC_H_ */
+
+/** @} */
diff --git a/os/common/ports/e200/devices/SPC560Dxx/ppcparams.h b/os/common/ports/e200/devices/SPC560Dxx/ppcparams.h
index 0e973b691..c395d0427 100644
--- a/os/common/ports/e200/devices/SPC560Dxx/ppcparams.h
+++ b/os/common/ports/e200/devices/SPC560Dxx/ppcparams.h
@@ -33,6 +33,11 @@
#define _PPCPARAMS_H_
/**
+ * @brief Family identification macro.
+ */
+#define PPC_SPC560Dxx
+
+/**
* @brief PPC core model.
*/
#define PPC_VARIANT PPC_VARIANT_e200z0
@@ -77,17 +82,6 @@
*/
#define PPC_NUM_VECTORS 155
-/**
- * @brief Memory address of the INTC controller.
- */
-#define PPC_INTC_BASE 0xFFF48000
-
-/**
- * @brief Type of the INTC controller.
- * @note 0=SPC56x, 1=SPC57x.
- */
-#define PPC_INTC_TYPE 0
-
#endif /* _PPCPARAMS_H_ */
/** @} */
diff --git a/os/common/ports/e200/devices/SPC560Pxx/intc.h b/os/common/ports/e200/devices/SPC560Pxx/intc.h
new file mode 100644
index 000000000..03b716fb8
--- /dev/null
+++ b/os/common/ports/e200/devices/SPC560Pxx/intc.h
@@ -0,0 +1,92 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011,2012,2013 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file SPC560Pxx/intc.h
+ * @brief SPC560Pxx INTC module header.
+ *
+ * @addtogroup INTC
+ * @{
+ */
+
+#ifndef _INTC_H_
+#define _INTC_H_
+
+/*===========================================================================*/
+/* Module constants. */
+/*===========================================================================*/
+
+/**
+ * @name INTC addresses
+ * @{
+ */
+#define INTC_BASE 0xFFF48000
+#define INTC_IACKR_ADDR (INTC_BASE + 0x10)
+#define INTC_EOIR_ADDR (INTC_BASE + 0x18)
+/** @} */
+
+/*===========================================================================*/
+/* Module pre-compile time settings. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Derived constants and error checks. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module data structures and types. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module macros. */
+/*===========================================================================*/
+
+/**
+ * @name INTC-related macros
+ * @{
+ */
+#define INTC_BCR (*((volatile uint32_t *)(INTC_BASE + 0)))
+#define INTC_CPR(n) (*((volatile uint32_t *)(INTC_BASE + 8 + ((n) * sizeof (uint32_t)))))
+#define INTC_IACKR(n) (*((volatile uint32_t *)(INTC_BASE + 0x10 + ((n) * sizeof (uint32_t)))))
+#define INTC_EOIR(n) (*((volatile uint32_t *)(INTC_BASE + 0x18 + ((n) * sizeof (uint32_t)))))
+#define INTC_PSR(n) (*((volatile uint8_t *)(INTC_BASE + 0x40 + ((n) * sizeof (uint8_t)))))
+/** @} */
+
+/**
+ * @brief Core selection macros for PSR register.
+ */
+#define INTC_PSR_CORE0 0x00
+
+/**
+ * @brief PSR register content helper
+ */
+#define INTC_PSR_ENABLE(cores, prio) ((uint32_t)(cores) | (uint32_t)(prio))
+
+/*===========================================================================*/
+/* External declarations. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module inline functions. */
+/*===========================================================================*/
+
+#endif /* _INTC_H_ */
+
+/** @} */
diff --git a/os/common/ports/e200/devices/SPC560Pxx/ppcparams.h b/os/common/ports/e200/devices/SPC560Pxx/ppcparams.h
index 2b5327a55..6efb4c266 100644
--- a/os/common/ports/e200/devices/SPC560Pxx/ppcparams.h
+++ b/os/common/ports/e200/devices/SPC560Pxx/ppcparams.h
@@ -33,6 +33,11 @@
#define _PPCPARAMS_H_
/**
+ * @brief Family identification macro.
+ */
+#define PPC_SPC560Pxx
+
+/**
* @brief PPC core model.
*/
#define PPC_VARIANT PPC_VARIANT_e200z0
@@ -77,17 +82,6 @@
*/
#define PPC_NUM_VECTORS 261
-/**
- * @brief Memory address of the INTC controller.
- */
-#define PPC_INTC_BASE 0xFFF48000
-
-/**
- * @brief Type of the INTC controller.
- * @note 0=SPC56x, 1=SPC57x.
- */
-#define PPC_INTC_TYPE 0
-
#endif /* _PPCPARAMS_H_ */
/** @} */
diff --git a/os/common/ports/e200/devices/SPC563Mxx/intc.h b/os/common/ports/e200/devices/SPC563Mxx/intc.h
new file mode 100644
index 000000000..67ac3bc29
--- /dev/null
+++ b/os/common/ports/e200/devices/SPC563Mxx/intc.h
@@ -0,0 +1,92 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011,2012,2013 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file SPC563Mxx/intc.h
+ * @brief SPC563Mxx INTC module header.
+ *
+ * @addtogroup INTC
+ * @{
+ */
+
+#ifndef _INTC_H_
+#define _INTC_H_
+
+/*===========================================================================*/
+/* Module constants. */
+/*===========================================================================*/
+
+/**
+ * @name INTC addresses
+ * @{
+ */
+#define INTC_BASE 0xFFF48000
+#define INTC_IACKR_ADDR (INTC_BASE + 0x10)
+#define INTC_EOIR_ADDR (INTC_BASE + 0x18)
+/** @} */
+
+/*===========================================================================*/
+/* Module pre-compile time settings. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Derived constants and error checks. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module data structures and types. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module macros. */
+/*===========================================================================*/
+
+/**
+ * @name INTC-related macros
+ * @{
+ */
+#define INTC_BCR (*((volatile uint32_t *)(INTC_BASE + 0)))
+#define INTC_CPR(n) (*((volatile uint32_t *)(INTC_BASE + 8 + ((n) * sizeof (uint32_t)))))
+#define INTC_IACKR(n) (*((volatile uint32_t *)(INTC_BASE + 0x10 + ((n) * sizeof (uint32_t)))))
+#define INTC_EOIR(n) (*((volatile uint32_t *)(INTC_BASE + 0x18 + ((n) * sizeof (uint32_t)))))
+#define INTC_PSR(n) (*((volatile uint8_t *)(INTC_BASE + 0x40 + ((n) * sizeof (uint8_t)))))
+/** @} */
+
+/**
+ * @brief Core selection macros for PSR register.
+ */
+#define INTC_PSR_CORE0 0x00
+
+/**
+ * @brief PSR register content helper
+ */
+#define INTC_PSR_ENABLE(cores, prio) ((uint32_t)(cores) | (uint32_t)(prio))
+
+/*===========================================================================*/
+/* External declarations. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module inline functions. */
+/*===========================================================================*/
+
+#endif /* _INTC_H_ */
+
+/** @} */
diff --git a/os/common/ports/e200/devices/SPC563Mxx/ppcparams.h b/os/common/ports/e200/devices/SPC563Mxx/ppcparams.h
index 65ebb3d4e..72e4c58ad 100644
--- a/os/common/ports/e200/devices/SPC563Mxx/ppcparams.h
+++ b/os/common/ports/e200/devices/SPC563Mxx/ppcparams.h
@@ -33,6 +33,11 @@
#define _PPCPARAMS_H_
/**
+ * @brief Family identification macro.
+ */
+#define PPC_SPC563Mxx
+
+/**
* @brief PPC core model.
*/
#define PPC_VARIANT PPC_VARIANT_e200z3
@@ -77,17 +82,6 @@
*/
#define PPC_NUM_VECTORS 360
-/**
- * @brief Memory address of the INTC controller.
- */
-#define PPC_INTC_BASE 0xFFF48000
-
-/**
- * @brief Type of the INTC controller.
- * @note 0=SPC56x, 1=SPC57x.
- */
-#define PPC_INTC_TYPE 0
-
#endif /* _PPCPARAMS_H_ */
/** @} */
diff --git a/os/common/ports/e200/devices/SPC564Axx/intc.h b/os/common/ports/e200/devices/SPC564Axx/intc.h
new file mode 100644
index 000000000..5c4aac211
--- /dev/null
+++ b/os/common/ports/e200/devices/SPC564Axx/intc.h
@@ -0,0 +1,92 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011,2012,2013 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file SPC564Axx/intc.h
+ * @brief SPC564Axx INTC module header.
+ *
+ * @addtogroup INTC
+ * @{
+ */
+
+#ifndef _INTC_H_
+#define _INTC_H_
+
+/*===========================================================================*/
+/* Module constants. */
+/*===========================================================================*/
+
+/**
+ * @name INTC addresses
+ * @{
+ */
+#define INTC_BASE 0xFFF48000
+#define INTC_IACKR_ADDR (INTC_BASE + 0x10)
+#define INTC_EOIR_ADDR (INTC_BASE + 0x18)
+/** @} */
+
+/*===========================================================================*/
+/* Module pre-compile time settings. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Derived constants and error checks. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module data structures and types. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module macros. */
+/*===========================================================================*/
+
+/**
+ * @name INTC-related macros
+ * @{
+ */
+#define INTC_BCR (*((volatile uint32_t *)(INTC_BASE + 0)))
+#define INTC_CPR(n) (*((volatile uint32_t *)(INTC_BASE + 8 + ((n) * sizeof (uint32_t)))))
+#define INTC_IACKR(n) (*((volatile uint32_t *)(INTC_BASE + 0x10 + ((n) * sizeof (uint32_t)))))
+#define INTC_EOIR(n) (*((volatile uint32_t *)(INTC_BASE + 0x18 + ((n) * sizeof (uint32_t)))))
+#define INTC_PSR(n) (*((volatile uint8_t *)(INTC_BASE + 0x40 + ((n) * sizeof (uint8_t)))))
+/** @} */
+
+/**
+ * @brief Core selection macros for PSR register.
+ */
+#define INTC_PSR_CORE0 0x00
+
+/**
+ * @brief PSR register content helper
+ */
+#define INTC_PSR_ENABLE(cores, prio) ((uint32_t)(cores) | (uint32_t)(prio))
+
+/*===========================================================================*/
+/* External declarations. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module inline functions. */
+/*===========================================================================*/
+
+#endif /* _INTC_H_ */
+
+/** @} */
diff --git a/os/common/ports/e200/devices/SPC564Axx/ppcparams.h b/os/common/ports/e200/devices/SPC564Axx/ppcparams.h
index a4cdb1aca..ab89dded6 100644
--- a/os/common/ports/e200/devices/SPC564Axx/ppcparams.h
+++ b/os/common/ports/e200/devices/SPC564Axx/ppcparams.h
@@ -33,6 +33,11 @@
#define _PPCPARAMS_H_
/**
+ * @brief Family identification macro.
+ */
+#define PPC_SPC564Axx
+
+/**
* @brief PPC core model.
*/
#define PPC_VARIANT PPC_VARIANT_e200z4
@@ -77,17 +82,6 @@
*/
#define PPC_NUM_VECTORS 486
-/**
- * @brief Memory address of the INTC controller.
- */
-#define PPC_INTC_BASE 0xFFF48000
-
-/**
- * @brief Type of the INTC controller.
- * @note 0=SPC56x, 1=SPC57x.
- */
-#define PPC_INTC_TYPE 0
-
#endif /* _PPCPARAMS_H_ */
/** @} */
diff --git a/os/common/ports/e200/devices/SPC56ECxx/intc.h b/os/common/ports/e200/devices/SPC56ECxx/intc.h
new file mode 100644
index 000000000..602a566e0
--- /dev/null
+++ b/os/common/ports/e200/devices/SPC56ECxx/intc.h
@@ -0,0 +1,94 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011,2012,2013 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file SPC56ECxx/intc.h
+ * @brief SPC56ECxx INTC module header.
+ *
+ * @addtogroup INTC
+ * @{
+ */
+
+#ifndef _INTC_H_
+#define _INTC_H_
+
+/*===========================================================================*/
+/* Module constants. */
+/*===========================================================================*/
+
+/**
+ * @name INTC addresses
+ * @{
+ */
+#define INTC_BASE 0xFFF48000
+#define INTC_IACKR_ADDR (INTC_BASE + 0x10)
+#define INTC_EOIR_ADDR (INTC_BASE + 0x18)
+/** @} */
+
+/*===========================================================================*/
+/* Module pre-compile time settings. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Derived constants and error checks. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module data structures and types. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module macros. */
+/*===========================================================================*/
+
+/**
+ * @name INTC-related macros
+ * @{
+ */
+#define INTC_BCR (*((volatile uint32_t *)(INTC_BASE + 0)))
+#define INTC_CPR(n) (*((volatile uint32_t *)(INTC_BASE + 8 + ((n) * sizeof (uint32_t)))))
+#define INTC_IACKR(n) (*((volatile uint32_t *)(INTC_BASE + 0x10 + ((n) * sizeof (uint32_t)))))
+#define INTC_EOIR(n) (*((volatile uint32_t *)(INTC_BASE + 0x18 + ((n) * sizeof (uint32_t)))))
+#define INTC_PSR(n) (*((volatile uint8_t *)(INTC_BASE + 0x40 + ((n) * sizeof (uint8_t)))))
+/** @} */
+
+/**
+ * @brief Core selection macros for PSR register.
+ */
+#define INTC_PSR_CORE0 0x00
+#define INTC_PSR_CORE1 0xC0
+#define INTC_PSR_CORES01 0x40
+
+/**
+ * @brief PSR register content helper
+ */
+#define INTC_PSR_ENABLE(cores, prio) ((uint32_t)(cores) | (uint32_t)(prio))
+
+/*===========================================================================*/
+/* External declarations. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module inline functions. */
+/*===========================================================================*/
+
+#endif /* _INTC_H_ */
+
+/** @} */
diff --git a/os/common/ports/e200/devices/SPC56ECxx/ppcparams.h b/os/common/ports/e200/devices/SPC56ECxx/ppcparams.h
index 6987bd603..808a5e01c 100644
--- a/os/common/ports/e200/devices/SPC56ECxx/ppcparams.h
+++ b/os/common/ports/e200/devices/SPC56ECxx/ppcparams.h
@@ -33,6 +33,11 @@
#define _PPCPARAMS_H_
/**
+ * @brief Family identification macro.
+ */
+#define PPC_SPC56ECxx
+
+/**
* @brief PPC core model.
*/
#define PPC_VARIANT PPC_VARIANT_e200z4
@@ -77,17 +82,6 @@
*/
#define PPC_NUM_VECTORS 279
-/**
- * @brief Memory address of the INTC controller.
- */
-#define PPC_INTC_BASE 0xFFF48000
-
-/**
- * @brief Type of the INTC controller.
- * @note 0=SPC56x, 1=SPC57x.
- */
-#define PPC_INTC_TYPE 0
-
#endif /* _PPCPARAMS_H_ */
/** @} */
diff --git a/os/common/ports/e200/devices/SPC56ELxx/intc.h b/os/common/ports/e200/devices/SPC56ELxx/intc.h
new file mode 100644
index 000000000..12d652363
--- /dev/null
+++ b/os/common/ports/e200/devices/SPC56ELxx/intc.h
@@ -0,0 +1,92 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011,2012,2013 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file SPC56ELxx/intc.h
+ * @brief SPC56ELxx INTC module header.
+ *
+ * @addtogroup INTC
+ * @{
+ */
+
+#ifndef _INTC_H_
+#define _INTC_H_
+
+/*===========================================================================*/
+/* Module constants. */
+/*===========================================================================*/
+
+/**
+ * @name INTC addresses
+ * @{
+ */
+#define INTC_BASE 0xFFF48000
+#define INTC_IACKR_ADDR (INTC_BASE + 0x10)
+#define INTC_EOIR_ADDR (INTC_BASE + 0x18)
+/** @} */
+
+/*===========================================================================*/
+/* Module pre-compile time settings. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Derived constants and error checks. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module data structures and types. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module macros. */
+/*===========================================================================*/
+
+/**
+ * @name INTC-related macros
+ * @{
+ */
+#define INTC_BCR (*((volatile uint32_t *)(INTC_BASE + 0)))
+#define INTC_CPR(n) (*((volatile uint32_t *)(INTC_BASE + 8 + ((n) * sizeof (uint32_t)))))
+#define INTC_IACKR(n) (*((volatile uint32_t *)(INTC_BASE + 0x10 + ((n) * sizeof (uint32_t)))))
+#define INTC_EOIR(n) (*((volatile uint32_t *)(INTC_BASE + 0x18 + ((n) * sizeof (uint32_t)))))
+#define INTC_PSR(n) (*((volatile uint8_t *)(INTC_BASE + 0x40 + ((n) * sizeof (uint8_t)))))
+/** @} */
+
+/**
+ * @brief Core selection macros for PSR register.
+ */
+#define INTC_PSR_CORE0 0x00
+
+/**
+ * @brief PSR register content helper
+ */
+#define INTC_PSR_ENABLE(cores, prio) ((uint32_t)(cores) | (uint32_t)(prio))
+
+/*===========================================================================*/
+/* External declarations. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module inline functions. */
+/*===========================================================================*/
+
+#endif /* _INTC_H_ */
+
+/** @} */
diff --git a/os/common/ports/e200/devices/SPC56ELxx/ppcparams.h b/os/common/ports/e200/devices/SPC56ELxx/ppcparams.h
index 6cb905582..c0b2f7336 100644
--- a/os/common/ports/e200/devices/SPC56ELxx/ppcparams.h
+++ b/os/common/ports/e200/devices/SPC56ELxx/ppcparams.h
@@ -33,6 +33,11 @@
#define _PPCPARAMS_H_
/**
+ * @brief Family identification macro.
+ */
+#define PPC_SPC56ELxx
+
+/**
* @brief PPC core model.
*/
#define PPC_VARIANT PPC_VARIANT_e200z4
@@ -77,17 +82,6 @@
*/
#define PPC_NUM_VECTORS 256
-/**
- * @brief Memory address of the INTC controller.
- */
-#define PPC_INTC_BASE 0xFFF48000
-
-/**
- * @brief Type of the INTC controller.
- * @note 0=SPC56x, 1=SPC57x.
- */
-#define PPC_INTC_TYPE 0
-
#endif /* _PPCPARAMS_H_ */
/** @} */