diff options
| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2017-02-07 12:01:07 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2017-02-07 12:01:07 +0000 |
| commit | a457644a0437ce7f2e9d72cdcd29f9dfb8a25b88 (patch) | |
| tree | ee59a8ed2df719d289ce48a484c20e4ed1aeeb85 /os/common/ports/e200 | |
| parent | 6e5e2aa9acbbf646746913a940faf8c6beb5d0e8 (diff) | |
| download | ChibiOS-a457644a0437ce7f2e9d72cdcd29f9dfb8a25b88.tar.gz ChibiOS-a457644a0437ce7f2e9d72cdcd29f9dfb8a25b88.tar.bz2 ChibiOS-a457644a0437ce7f2e9d72cdcd29f9dfb8a25b88.zip | |
Split support for HighTec and plain GCC in e200 support.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10095 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/common/ports/e200')
| -rw-r--r-- | os/common/ports/e200/compilers/GCC/chcoreasm.S | 48 | ||||
| -rw-r--r-- | os/common/ports/e200/compilers/GCC/ivor.S | 232 | ||||
| -rwxr-xr-x | os/common/ports/e200/compilers/HighTec/chcoreasm.S | 115 | ||||
| -rwxr-xr-x | os/common/ports/e200/compilers/HighTec/chtypes.h | 115 | ||||
| -rwxr-xr-x | os/common/ports/e200/compilers/HighTec/ivor.S | 259 | ||||
| -rwxr-xr-x | os/common/ports/e200/compilers/HighTec/mk/port.mk | 8 |
6 files changed, 637 insertions, 140 deletions
diff --git a/os/common/ports/e200/compilers/GCC/chcoreasm.S b/os/common/ports/e200/compilers/GCC/chcoreasm.S index a4016f1ea..e031eb801 100644 --- a/os/common/ports/e200/compilers/GCC/chcoreasm.S +++ b/os/common/ports/e200/compilers/GCC/chcoreasm.S @@ -69,44 +69,44 @@ .globl _port_switch
.type _port_switch, @function
_port_switch:
- subi %sp, %sp, 80
- mflr %r0
- stw %r0, 84(%sp)
- mfcr %r0
- stw %r0, 0(%sp)
- stmw %r14, 4(%sp)
-
- stw %sp, 12(%r4)
- lwz %sp, 12(%r3)
-
- lmw %r14, 4(%sp)
- lwz %r0, 0(%sp)
- mtcr %r0
- lwz %r0, 84(%sp)
- mtlr %r0
- addi %sp, %sp, 80
- blr
+ e_subi sp, sp, 80
+ mflr r0
+ e_stw r0, 84(sp)
+ mfcr r0
+ se_stw r0, 0(sp)
+ e_stmw r14, 4(sp)
+
+ se_stw sp, 12(r4)
+ se_lwz sp, 12(r3)
+
+ e_lmw r14, 4(sp)
+ se_lwz r0, 0(sp)
+ mtcr r0
+ e_lwz r0, 84(sp)
+ mtlr r0
+ e_addi sp, sp, 80
+ se_blr
.align 2
.globl _port_thread_start
.type _port_thread_start, @function
_port_thread_start:
#if CH_DBG_SYSTEM_STATE_CHECK
- bl _dbg_check_unlock
+ e_bl _dbg_check_unlock
#endif
#if CH_DBG_STATISTICS
- bl _stats_stop_measure_crit_thd
+ e_bl _stats_stop_measure_crit_thd
#endif
wrteei 1
- mr %r3, %r31
- mtctr %r30
- bctrl
+ mr r3, r31
+ mtctr r30
+ se_bctrl
#if defined(_CHIBIOS_RT_CONF_)
- li %r0, 0
+ li r0, 0
bl chThdExit
#endif
#if defined(_CHIBIOS_NIL_CONF_)
- se_li %r0, 0
+ se_li r0, 0
e_bl chSysHalt
#endif
diff --git a/os/common/ports/e200/compilers/GCC/ivor.S b/os/common/ports/e200/compilers/GCC/ivor.S index 53f84f96c..980c17ade 100644 --- a/os/common/ports/e200/compilers/GCC/ivor.S +++ b/os/common/ports/e200/compilers/GCC/ivor.S @@ -54,53 +54,53 @@ .type _IVOR10, @function
_IVOR10:
/* Saving the external context (port_extctx structure).*/
- stwu %sp, -80(%sp)
+ stwu sp, -80(sp)
#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
- e_stmvsrrw 8(%sp) /* Saves PC, MSR. */
- e_stmvsprw 16(%sp) /* Saves CR, LR, CTR, XER. */
- e_stmvgprw 32(%sp) /* Saves GPR0, GPR3...GPR12. */
+ e_stmvsrrw 8(sp) /* Saves PC, MSR. */
+ e_stmvsprw 16(sp) /* Saves CR, LR, CTR, XER. */
+ e_stmvgprw 32(sp) /* Saves GPR0, GPR3...GPR12. */
#else /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
- stw %r0, 32(%sp) /* Saves GPR0. */
- mfSRR0 %r0
- stw %r0, 8(%sp) /* Saves PC. */
- mfSRR1 %r0
- stw %r0, 12(%sp) /* Saves MSR. */
- mfCR %r0
- stw %r0, 16(%sp) /* Saves CR. */
- mfLR %r0
- stw %r0, 20(%sp) /* Saves LR. */
- mfCTR %r0
- stw %r0, 24(%sp) /* Saves CTR. */
- mfXER %r0
- stw %r0, 28(%sp) /* Saves XER. */
- stw %r3, 36(%sp) /* Saves GPR3...GPR12. */
- stw %r4, 40(%sp)
- stw %r5, 44(%sp)
- stw %r6, 48(%sp)
- stw %r7, 52(%sp)
- stw %r8, 56(%sp)
- stw %r9, 60(%sp)
- stw %r10, 64(%sp)
- stw %r11, 68(%sp)
- stw %r12, 72(%sp)
+ se_stw r0, 32(sp) /* Saves GPR0. */
+ mfSRR0 r0
+ se_stw r0, 8(sp) /* Saves PC. */
+ mfSRR1 r0
+ se_stw r0, 12(sp) /* Saves MSR. */
+ mfCR r0
+ se_stw r0, 16(sp) /* Saves CR. */
+ mfLR r0
+ se_stw r0, 20(sp) /* Saves LR. */
+ mfCTR r0
+ se_stw r0, 24(sp) /* Saves CTR. */
+ mfXER r0
+ se_stw r0, 28(sp) /* Saves XER. */
+ se_stw r3, 36(sp) /* Saves GPR3...GPR12. */
+ se_stw r4, 40(sp)
+ se_stw r5, 44(sp)
+ se_stw r6, 48(sp)
+ se_stw r7, 52(sp)
+ e_stw r8, 56(sp)
+ e_stw r9, 60(sp)
+ e_stw r10, 64(sp)
+ e_stw r11, 68(sp)
+ e_stw r12, 72(sp)
#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
/* Increasing the SPGR0 register.*/
- mfspr %r0, 272
- eaddi %r0, %r0, 1
- mtspr 272, %r0
+ mfspr r0, 272
+ eaddi r0, r0, 1
+ mtspr 272, r0
/* Reset DIE bit in TSR register.*/
- lis %r3, 0x0800 /* DIS bit mask. */
- mtspr 336, %r3 /* TSR register. */
+ lis r3, 0x0800 /* DIS bit mask. */
+ mtspr 336, r3 /* TSR register. */
/* Restoring pre-IRQ MSR register value.*/
- mfSRR1 %r0
+ mfSRR1 r0
#if !PPC_USE_IRQ_PREEMPTION
/* No preemption, keeping EE disabled.*/
- se_bclri %r0, 16 /* EE = bit 16. */
+ se_bclri r0, 16 /* EE = bit 16. */
#endif
- mtMSR %r0
+ mtMSR r0
#if CH_DBG_SYSTEM_STATE_CHECK
bl _dbg_check_enter_isr
@@ -130,59 +130,59 @@ _IVOR10: .type _IVOR4, @function
_IVOR4:
/* Saving the external context (port_extctx structure).*/
- stwu %sp, -80(%sp)
+ e_stwu sp, -80(sp)
#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
- e_stmvsrrw 8(%sp) /* Saves PC, MSR. */
- e_stmvsprw 16(%sp) /* Saves CR, LR, CTR, XER. */
- e_stmvgprw 32(%sp) /* Saves GPR0, GPR3...GPR12. */
+ e_stmvsrrw 8(sp) /* Saves PC, MSR. */
+ e_stmvsprw 16(sp) /* Saves CR, LR, CTR, XER. */
+ e_stmvgprw 32(sp) /* Saves GPR0, GPR3...GPR12. */
#else /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
- stw %r0, 32(%sp) /* Saves GPR0. */
- mfSRR0 %r0
- stw %r0, 8(%sp) /* Saves PC. */
- mfSRR1 %r0
- stw %r0, 12(%sp) /* Saves MSR. */
- mfCR %r0
- stw %r0, 16(%sp) /* Saves CR. */
- mfLR %r0
- stw %r0, 20(%sp) /* Saves LR. */
- mfCTR %r0
- stw %r0, 24(%sp) /* Saves CTR. */
- mfXER %r0
- stw %r0, 28(%sp) /* Saves XER. */
- stw %r3, 36(%sp) /* Saves GPR3...GPR12. */
- stw %r4, 40(%sp)
- stw %r5, 44(%sp)
- stw %r6, 48(%sp)
- stw %r7, 52(%sp)
- stw %r8, 56(%sp)
- stw %r9, 60(%sp)
- stw %r10, 64(%sp)
- stw %r11, 68(%sp)
- stw %r12, 72(%sp)
+ se_stw r0, 32(sp) /* Saves GPR0. */
+ mfSRR0 r0
+ se_stw r0, 8(sp) /* Saves PC. */
+ mfSRR1 r0
+ se_stw r0, 12(sp) /* Saves MSR. */
+ mfCR r0
+ se_stw r0, 16(sp) /* Saves CR. */
+ mfLR r0
+ se_stw r0, 20(sp) /* Saves LR. */
+ mfCTR r0
+ se_stw r0, 24(sp) /* Saves CTR. */
+ mfXER r0
+ se_stw r0, 28(sp) /* Saves XER. */
+ se_stw r3, 36(sp) /* Saves GPR3...GPR12. */
+ se_stw r4, 40(sp)
+ se_stw r5, 44(sp)
+ se_stw r6, 48(sp)
+ se_stw r7, 52(sp)
+ e_stw r8, 56(sp)
+ e_stw r9, 60(sp)
+ e_stw r10, 64(sp)
+ e_stw r11, 68(sp)
+ e_stw r12, 72(sp)
#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
/* Increasing the SPGR0 register.*/
- mfspr %r0, 272
- eaddi %r0, %r0, 1
- mtspr 272, %r0
+ mfspr r0, 272
+ se_addi r0, 1
+ mtspr 272, r0
/* Software vector address from the INTC register.*/
- lis %r3, INTC_IACKR_ADDR@h
- ori %r3, %r3, INTC_IACKR_ADDR@l /* IACKR register address. */
- lwz %r3, 0(%r3) /* IACKR register value. */
- lwz %r3, 0(%r3)
- mtCTR %r3 /* Software handler address. */
+ e_lis r3, INTC_IACKR_ADDR@h
+ e_or2i r3, INTC_IACKR_ADDR@l /* IACKR register address. */
+ e_lwz r3, 0(r3) /* IACKR register value. */
+ e_lwz r3, 0(r3)
+ mtCTR r3 /* Software handler address. */
/* Restoring pre-IRQ MSR register value.*/
- mfSRR1 %r0
+ mfSRR1 r0
#if !PPC_USE_IRQ_PREEMPTION
/* No preemption, keeping EE disabled.*/
- se_bclri %r0, 16 /* EE = bit 16. */
+ se_bclri r0, 16 /* EE = bit 16. */
#endif
- mtMSR %r0
+ mtMSR r0
/* Exectes the software handler.*/
- bctrl
+ se_bctrl
#if PPC_USE_IRQ_PREEMPTION
/* Prevents preemption again.*/
@@ -191,68 +191,68 @@ _IVOR4: /* Informs the INTC that the interrupt has been served.*/
mbar 0
- lis %r3, INTC_EOIR_ADDR@h
- ori %r3, %r3, INTC_EOIR_ADDR@l
- stw %r3, 0(%r3) /* Writing any value should do. */
+ e_lis r3, INTC_EOIR_ADDR@h
+ e_or2i r3, INTC_EOIR_ADDR@l
+ se_stw r3, 0(r3) /* Writing any value should do. */
/* Common IVOR epilogue code, context restore.*/
.globl _ivor_exit
_ivor_exit:
/* Decreasing the SPGR0 register.*/
- mfspr %r0, 272
- eaddi %r0, %r0, -1
- mtspr 272, %r0
+ mfspr r0, 272
+ se_subi r0, 1
+ mtspr 272, r0
#if CH_DBG_STATISTICS
- bl _stats_start_measure_crit_thd
+ e_bl _stats_start_measure_crit_thd
#endif
#if CH_DBG_SYSTEM_STATE_CHECK
- bl _dbg_check_lock
+ e_bl _dbg_check_lock
#endif
- bl chSchIsPreemptionRequired
- cmpli cr0, %r3, 0
- beq cr0, .noresch
- bl chSchDoReschedule
+ e_bl chSchIsPreemptionRequired
+ se_cmpl r3, 0
+ se_beq .noresch
+ e_bl chSchDoReschedule
.noresch:
#if CH_DBG_SYSTEM_STATE_CHECK
- bl _dbg_check_unlock
+ e_bl _dbg_check_unlock
#endif
#if CH_DBG_STATISTICS
- bl _stats_stop_measure_crit_thd
+ e_bl _stats_stop_measure_crit_thd
#endif
/* Restoring the external context.*/
#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
- e_lmvgprw 32(%sp) /* Restores GPR0, GPR3...GPR12. */
- e_lmvsprw 16(%sp) /* Restores CR, LR, CTR, XER. */
- e_lmvsrrw 8(%sp) /* Restores PC, MSR. */
+ e_lmvgprw 32(sp) /* Restores GPR0, GPR3...GPR12. */
+ e_lmvsprw 16(sp) /* Restores CR, LR, CTR, XER. */
+ e_lmvsrrw 8(sp) /* Restores PC, MSR. */
#else /*!(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
- lwz %r3, 36(%sp) /* Restores GPR3...GPR12. */
- lwz %r4, 40(%sp)
- lwz %r5, 44(%sp)
- lwz %r6, 48(%sp)
- lwz %r7, 52(%sp)
- lwz %r8, 56(%sp)
- lwz %r9, 60(%sp)
- lwz %r10, 64(%sp)
- lwz %r11, 68(%sp)
- lwz %r12, 72(%sp)
- lwz %r0, 8(%sp)
- mtSRR0 %r0 /* Restores PC. */
- lwz %r0, 12(%sp)
- mtSRR1 %r0 /* Restores MSR. */
- lwz %r0, 16(%sp)
- mtCR %r0 /* Restores CR. */
- lwz %r0, 20(%sp)
- mtLR %r0 /* Restores LR. */
- lwz %r0, 24(%sp)
- mtCTR %r0 /* Restores CTR. */
- lwz %r0, 28(%sp)
- mtXER %r0 /* Restores XER. */
- lwz %r0, 32(%sp) /* Restores GPR0. */
+ se_lwz r3, 36(sp) /* Restores GPR3...GPR12. */
+ se_lwz r4, 40(sp)
+ se_lwz r5, 44(sp)
+ se_lwz r6, 48(sp)
+ se_lwz r7, 52(sp)
+ e_lwz r8, 56(sp)
+ e_lwz r9, 60(sp)
+ e_lwz r10, 64(sp)
+ e_lwz r11, 68(sp)
+ e_lwz r12, 72(sp)
+ se_lwz r0, 8(sp)
+ mtSRR0 r0 /* Restores PC. */
+ se_lwz r0, 12(sp)
+ mtSRR1 r0 /* Restores MSR. */
+ se_lwz r0, 16(sp)
+ mtCR r0 /* Restores CR. */
+ se_lwz r0, 20(sp)
+ mtLR r0 /* Restores LR. */
+ se_lwz r0, 24(sp)
+ mtCTR r0 /* Restores CTR. */
+ se_lwz r0, 28(sp)
+ mtXER r0 /* Restores XER. */
+ se_lwz r0, 32(sp) /* Restores GPR0. */
#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
- addi %sp, %sp, 80 /* Back to the previous frame. */
- rfi
+ e_addi sp, sp, 80 /* Back to the previous frame. */
+ se_rfi
#endif /* !defined(__DOXYGEN__) */
diff --git a/os/common/ports/e200/compilers/HighTec/chcoreasm.S b/os/common/ports/e200/compilers/HighTec/chcoreasm.S new file mode 100755 index 000000000..a4016f1ea --- /dev/null +++ b/os/common/ports/e200/compilers/HighTec/chcoreasm.S @@ -0,0 +1,115 @@ +/*
+ ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio.
+
+ This file is part of ChibiOS.
+
+ ChibiOS is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file e200/compilers/GCC/chcoreasm.s
+ * @brief Power Architecture port low level code.
+ *
+ * @addtogroup PPC_GCC_CORE
+ * @{
+ */
+
+/*===========================================================================*/
+/* Module constants. */
+/*===========================================================================*/
+
+#if !defined(FALSE) || defined(__DOXYGEN__)
+#define FALSE 0
+#endif
+
+#if !defined(TRUE) || defined(__DOXYGEN__)
+#define TRUE 1
+#endif
+
+/*===========================================================================*/
+/* Code section. */
+/*===========================================================================*/
+
+#define _FROM_ASM_
+#include "chlicense.h"
+#include "chconf.h"
+#include "chcore.h"
+
+#if !defined(__DOXYGEN__)
+
+/*
+ * RTOS-specific context offset.
+ */
+#if defined(_CHIBIOS_RT_CONF_)
+#define CONTEXT_OFFSET 12
+#elif defined(_CHIBIOS_NIL_CONF_)
+#define CONTEXT_OFFSET 0
+#else
+#error "invalid chconf.h"
+#endif
+
+#if PPC_USE_VLE == TRUE
+ .section .text_vle, "ax"
+#else
+ .section .text, "ax"
+#endif
+
+ .align 2
+ .globl _port_switch
+ .type _port_switch, @function
+_port_switch:
+ subi %sp, %sp, 80
+ mflr %r0
+ stw %r0, 84(%sp)
+ mfcr %r0
+ stw %r0, 0(%sp)
+ stmw %r14, 4(%sp)
+
+ stw %sp, 12(%r4)
+ lwz %sp, 12(%r3)
+
+ lmw %r14, 4(%sp)
+ lwz %r0, 0(%sp)
+ mtcr %r0
+ lwz %r0, 84(%sp)
+ mtlr %r0
+ addi %sp, %sp, 80
+ blr
+
+ .align 2
+ .globl _port_thread_start
+ .type _port_thread_start, @function
+_port_thread_start:
+#if CH_DBG_SYSTEM_STATE_CHECK
+ bl _dbg_check_unlock
+#endif
+#if CH_DBG_STATISTICS
+ bl _stats_stop_measure_crit_thd
+#endif
+ wrteei 1
+ mr %r3, %r31
+ mtctr %r30
+ bctrl
+#if defined(_CHIBIOS_RT_CONF_)
+ li %r0, 0
+ bl chThdExit
+#endif
+#if defined(_CHIBIOS_NIL_CONF_)
+ se_li %r0, 0
+ e_bl chSysHalt
+#endif
+
+#endif /* !defined(__DOXYGEN__) */
+
+/** @} */
diff --git a/os/common/ports/e200/compilers/HighTec/chtypes.h b/os/common/ports/e200/compilers/HighTec/chtypes.h new file mode 100755 index 000000000..20a601e93 --- /dev/null +++ b/os/common/ports/e200/compilers/HighTec/chtypes.h @@ -0,0 +1,115 @@ +/*
+ ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio.
+
+ This file is part of ChibiOS.
+
+ ChibiOS is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file e200/compilers/GCC/chtypes.h
+ * @brief Power e200 port system types.
+ *
+ * @addtogroup PPC_GCC_CORE
+ * @{
+ */
+
+#ifndef CHTYPES_H
+#define CHTYPES_H
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdbool.h>
+
+/**
+ * @name Common constants
+ */
+/**
+ * @brief Generic 'false' boolean constant.
+ */
+#if !defined(FALSE) || defined(__DOXYGEN__)
+#define FALSE 0
+#endif
+
+/**
+ * @brief Generic 'true' boolean constant.
+ */
+#if !defined(TRUE) || defined(__DOXYGEN__)
+#define TRUE 1
+#endif
+/** @} */
+
+/**
+ * @name Kernel types
+ * @{
+ */
+typedef uint32_t rtcnt_t; /**< Realtime counter. */
+typedef uint64_t rttime_t; /**< Realtime accumulator. */
+typedef uint32_t syssts_t; /**< System status word. */
+typedef uint8_t tmode_t; /**< Thread flags. */
+typedef uint8_t tstate_t; /**< Thread state. */
+typedef uint8_t trefs_t; /**< Thread references counter. */
+typedef uint8_t tslices_t; /**< Thread time slices counter.*/
+typedef uint32_t tprio_t; /**< Thread priority. */
+typedef int32_t msg_t; /**< Inter-thread message. */
+typedef int32_t eventid_t; /**< Numeric event identifier. */
+typedef uint32_t eventmask_t; /**< Mask of event identifiers. */
+typedef uint32_t eventflags_t; /**< Mask of event flags. */
+typedef int32_t cnt_t; /**< Generic signed counter. */
+typedef uint32_t ucnt_t; /**< Generic unsigned counter. */
+/** @} */
+
+/**
+ * @brief ROM constant modifier.
+ * @note It is set to use the "const" keyword in this port.
+ */
+#define ROMCONST const
+
+/**
+ * @brief Makes functions not inlineable.
+ * @note If the compiler does not support such attribute then some
+ * time-dependent services could be degraded.
+ */
+#define NOINLINE __attribute__((noinline))
+
+/**
+ * @brief Optimized thread function declaration macro.
+ */
+#define PORT_THD_FUNCTION(tname, arg) void tname(void *arg)
+
+/**
+ * @brief Packed variable specifier.
+ */
+#define PACKED_VAR __attribute__((packed))
+
+/**
+ * @brief Memory alignment enforcement for variables.
+ */
+#define ALIGNED_VAR(n) __attribute__((aligned(n)))
+
+/**
+ * @brief Size of a pointer.
+ * @note To be used where the sizeof operator cannot be used, preprocessor
+ * expressions for example.
+ */
+#define SIZEOF_PTR 4
+
+/**
+ * @brief True if alignment is low-high in current architecture.
+ */
+#define REVERSE_ORDER 0
+
+#endif /* CHTYPES_H */
+
+/** @} */
diff --git a/os/common/ports/e200/compilers/HighTec/ivor.S b/os/common/ports/e200/compilers/HighTec/ivor.S new file mode 100755 index 000000000..53f84f96c --- /dev/null +++ b/os/common/ports/e200/compilers/HighTec/ivor.S @@ -0,0 +1,259 @@ +/*
+ ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio.
+
+ This file is part of ChibiOS.
+
+ ChibiOS is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file ivor.s
+ * @brief Kernel ISRs.
+ *
+ * @addtogroup PPC_CORE
+ * @{
+ */
+
+#if !defined(FALSE) || defined(__DOXYGEN__)
+#define FALSE 0
+#endif
+
+#if !defined(TRUE) || defined(__DOXYGEN__)
+#define TRUE 1
+#endif
+
+/*
+ * Imports the PPC configuration headers.
+ */
+#define _FROM_ASM_
+#include "chlicense.h"
+#include "chconf.h"
+#include "chcore.h"
+
+#if !defined(__DOXYGEN__)
+
+ .section .handlers, "ax"
+
+#if PPC_SUPPORTS_DECREMENTER
+ /*
+ * _IVOR10 handler (Book-E decrementer).
+ */
+ .align 4
+ .globl _IVOR10
+ .type _IVOR10, @function
+_IVOR10:
+ /* Saving the external context (port_extctx structure).*/
+ stwu %sp, -80(%sp)
+#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
+ e_stmvsrrw 8(%sp) /* Saves PC, MSR. */
+ e_stmvsprw 16(%sp) /* Saves CR, LR, CTR, XER. */
+ e_stmvgprw 32(%sp) /* Saves GPR0, GPR3...GPR12. */
+#else /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
+ stw %r0, 32(%sp) /* Saves GPR0. */
+ mfSRR0 %r0
+ stw %r0, 8(%sp) /* Saves PC. */
+ mfSRR1 %r0
+ stw %r0, 12(%sp) /* Saves MSR. */
+ mfCR %r0
+ stw %r0, 16(%sp) /* Saves CR. */
+ mfLR %r0
+ stw %r0, 20(%sp) /* Saves LR. */
+ mfCTR %r0
+ stw %r0, 24(%sp) /* Saves CTR. */
+ mfXER %r0
+ stw %r0, 28(%sp) /* Saves XER. */
+ stw %r3, 36(%sp) /* Saves GPR3...GPR12. */
+ stw %r4, 40(%sp)
+ stw %r5, 44(%sp)
+ stw %r6, 48(%sp)
+ stw %r7, 52(%sp)
+ stw %r8, 56(%sp)
+ stw %r9, 60(%sp)
+ stw %r10, 64(%sp)
+ stw %r11, 68(%sp)
+ stw %r12, 72(%sp)
+#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
+
+ /* Increasing the SPGR0 register.*/
+ mfspr %r0, 272
+ eaddi %r0, %r0, 1
+ mtspr 272, %r0
+
+ /* Reset DIE bit in TSR register.*/
+ lis %r3, 0x0800 /* DIS bit mask. */
+ mtspr 336, %r3 /* TSR register. */
+
+ /* Restoring pre-IRQ MSR register value.*/
+ mfSRR1 %r0
+#if !PPC_USE_IRQ_PREEMPTION
+ /* No preemption, keeping EE disabled.*/
+ se_bclri %r0, 16 /* EE = bit 16. */
+#endif
+ mtMSR %r0
+
+#if CH_DBG_SYSTEM_STATE_CHECK
+ bl _dbg_check_enter_isr
+ bl _dbg_check_lock_from_isr
+#endif
+ /* System tick handler invocation.*/
+ bl chSysTimerHandlerI
+#if CH_DBG_SYSTEM_STATE_CHECK
+ bl _dbg_check_unlock_from_isr
+ bl _dbg_check_leave_isr
+#endif
+
+#if PPC_USE_IRQ_PREEMPTION
+ /* Prevents preemption again.*/
+ wrteei 0
+#endif
+
+ /* Jumps to the common IVOR epilogue code.*/
+ b _ivor_exit
+#endif /* PPC_SUPPORTS_DECREMENTER */
+
+ /*
+ * _IVOR4 handler (Book-E external interrupt).
+ */
+ .align 4
+ .globl _IVOR4
+ .type _IVOR4, @function
+_IVOR4:
+ /* Saving the external context (port_extctx structure).*/
+ stwu %sp, -80(%sp)
+#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
+ e_stmvsrrw 8(%sp) /* Saves PC, MSR. */
+ e_stmvsprw 16(%sp) /* Saves CR, LR, CTR, XER. */
+ e_stmvgprw 32(%sp) /* Saves GPR0, GPR3...GPR12. */
+#else /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
+ stw %r0, 32(%sp) /* Saves GPR0. */
+ mfSRR0 %r0
+ stw %r0, 8(%sp) /* Saves PC. */
+ mfSRR1 %r0
+ stw %r0, 12(%sp) /* Saves MSR. */
+ mfCR %r0
+ stw %r0, 16(%sp) /* Saves CR. */
+ mfLR %r0
+ stw %r0, 20(%sp) /* Saves LR. */
+ mfCTR %r0
+ stw %r0, 24(%sp) /* Saves CTR. */
+ mfXER %r0
+ stw %r0, 28(%sp) /* Saves XER. */
+ stw %r3, 36(%sp) /* Saves GPR3...GPR12. */
+ stw %r4, 40(%sp)
+ stw %r5, 44(%sp)
+ stw %r6, 48(%sp)
+ stw %r7, 52(%sp)
+ stw %r8, 56(%sp)
+ stw %r9, 60(%sp)
+ stw %r10, 64(%sp)
+ stw %r11, 68(%sp)
+ stw %r12, 72(%sp)
+#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
+
+ /* Increasing the SPGR0 register.*/
+ mfspr %r0, 272
+ eaddi %r0, %r0, 1
+ mtspr 272, %r0
+
+ /* Software vector address from the INTC register.*/
+ lis %r3, INTC_IACKR_ADDR@h
+ ori %r3, %r3, INTC_IACKR_ADDR@l /* IACKR register address. */
+ lwz %r3, 0(%r3) /* IACKR register value. */
+ lwz %r3, 0(%r3)
+ mtCTR %r3 /* Software handler address. */
+
+ /* Restoring pre-IRQ MSR register value.*/
+ mfSRR1 %r0
+#if !PPC_USE_IRQ_PREEMPTION
+ /* No preemption, keeping EE disabled.*/
+ se_bclri %r0, 16 /* EE = bit 16. */
+#endif
+ mtMSR %r0
+
+ /* Exectes the software handler.*/
+ bctrl
+
+#if PPC_USE_IRQ_PREEMPTION
+ /* Prevents preemption again.*/
+ wrteei 0
+#endif
+
+ /* Informs the INTC that the interrupt has been served.*/
+ mbar 0
+ lis %r3, INTC_EOIR_ADDR@h
+ ori %r3, %r3, INTC_EOIR_ADDR@l
+ stw %r3, 0(%r3) /* Writing any value should do. */
+
+ /* Common IVOR epilogue code, context restore.*/
+ .globl _ivor_exit
+_ivor_exit:
+ /* Decreasing the SPGR0 register.*/
+ mfspr %r0, 272
+ eaddi %r0, %r0, -1
+ mtspr 272, %r0
+
+#if CH_DBG_STATISTICS
+ bl _stats_start_measure_crit_thd
+#endif
+#if CH_DBG_SYSTEM_STATE_CHECK
+ bl _dbg_check_lock
+#endif
+ bl chSchIsPreemptionRequired
+ cmpli cr0, %r3, 0
+ beq cr0, .noresch
+ bl chSchDoReschedule
+.noresch:
+#if CH_DBG_SYSTEM_STATE_CHECK
+ bl _dbg_check_unlock
+#endif
+#if CH_DBG_STATISTICS
+ bl _stats_stop_measure_crit_thd
+#endif
+
+ /* Restoring the external context.*/
+#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
+ e_lmvgprw 32(%sp) /* Restores GPR0, GPR3...GPR12. */
+ e_lmvsprw 16(%sp) /* Restores CR, LR, CTR, XER. */
+ e_lmvsrrw 8(%sp) /* Restores PC, MSR. */
+#else /*!(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
+ lwz %r3, 36(%sp) /* Restores GPR3...GPR12. */
+ lwz %r4, 40(%sp)
+ lwz %r5, 44(%sp)
+ lwz %r6, 48(%sp)
+ lwz %r7, 52(%sp)
+ lwz %r8, 56(%sp)
+ lwz %r9, 60(%sp)
+ lwz %r10, 64(%sp)
+ lwz %r11, 68(%sp)
+ lwz %r12, 72(%sp)
+ lwz %r0, 8(%sp)
+ mtSRR0 %r0 /* Restores PC. */
+ lwz %r0, 12(%sp)
+ mtSRR1 %r0 /* Restores MSR. */
+ lwz %r0, 16(%sp)
+ mtCR %r0 /* Restores CR. */
+ lwz %r0, 20(%sp)
+ mtLR %r0 /* Restores LR. */
+ lwz %r0, 24(%sp)
+ mtCTR %r0 /* Restores CTR. */
+ lwz %r0, 28(%sp)
+ mtXER %r0 /* Restores XER. */
+ lwz %r0, 32(%sp) /* Restores GPR0. */
+#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
+ addi %sp, %sp, 80 /* Back to the previous frame. */
+ rfi
+
+#endif /* !defined(__DOXYGEN__) */
+
+/** @} */
diff --git a/os/common/ports/e200/compilers/HighTec/mk/port.mk b/os/common/ports/e200/compilers/HighTec/mk/port.mk new file mode 100755 index 000000000..51704e91f --- /dev/null +++ b/os/common/ports/e200/compilers/HighTec/mk/port.mk @@ -0,0 +1,8 @@ +# List of the ChibiOS/RT e200 generic port files.
+PORTSRC = $(CHIBIOS)/os/common/ports/e200/chcore.c
+
+PORTASM = $(CHIBIOS)/os/common/ports/e200/compilers/HighTec/ivor.S \
+ $(CHIBIOS)/os/common/ports/e200/compilers/HighTec/chcoreasm.S
+
+PORTINC = $(CHIBIOS)/os/common/ports/e200 \
+ $(CHIBIOS)/os/common/ports/e200/compilers/HighTec
|