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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-01-29 11:22:07 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-01-29 11:22:07 +0000 |
| commit | 0ae68612204c3d474b26cfee94122b5a3139d9bb (patch) | |
| tree | ec531b2c95c24f6bf5d525885bb0a57099d1893b /os/common/ports/ARMCMx | |
| parent | 6cb1afbda0359bc1d15f398b862b522ccf9c4307 (diff) | |
| download | ChibiOS-0ae68612204c3d474b26cfee94122b5a3139d9bb.tar.gz ChibiOS-0ae68612204c3d474b26cfee94122b5a3139d9bb.tar.bz2 ChibiOS-0ae68612204c3d474b26cfee94122b5a3139d9bb.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6655 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/common/ports/ARMCMx')
| -rw-r--r-- | os/common/ports/ARMCMx/compilers/IAR/cstartup.s | 68 | ||||
| -rw-r--r-- | os/common/ports/ARMCMx/compilers/RVCT/cstartup.s | 121 |
2 files changed, 189 insertions, 0 deletions
diff --git a/os/common/ports/ARMCMx/compilers/IAR/cstartup.s b/os/common/ports/ARMCMx/compilers/IAR/cstartup.s new file mode 100644 index 000000000..3ee52d0a1 --- /dev/null +++ b/os/common/ports/ARMCMx/compilers/IAR/cstartup.s @@ -0,0 +1,68 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011,2012,2013 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+ MODULE ?cstartup
+
+CONTROL_MODE_PRIVILEGED SET 0
+CONTROL_MODE_UNPRIVILEGED SET 1
+CONTROL_USE_MSP SET 0
+CONTROL_USE_PSP SET 2
+
+ AAPCS INTERWORK, VFP_COMPATIBLE, ROPI
+ PRESERVE8
+
+ SECTION .intvec:CODE:NOROOT(3)
+
+ SECTION CSTACK:DATA:NOROOT(3)
+ PUBLIC __main_thread_stack_base__
+__main_thread_stack_base__:
+ PUBLIC __heap_end__
+__heap_end__:
+
+ SECTION SYSHEAP:DATA:NOROOT(3)
+ PUBLIC __heap_base__
+__heap_base__:
+
+ PUBLIC __iar_program_start
+ EXTERN __vector_table
+ EXTWEAK __iar_init_core
+ EXTWEAK __iar_init_vfp
+ EXTERN __cmain
+
+ SECTION .text:CODE:REORDER(2)
+ REQUIRE __vector_table
+ THUMB
+__iar_program_start:
+ cpsid i
+ ldr r0, =SFE(CSTACK)
+ msr PSP, r0
+ movs r0, #CONTROL_MODE_PRIVILEGED | CONTROL_USE_PSP
+ msr CONTROL, r0
+ isb
+ bl __early_init
+ bl __iar_init_core
+ bl __iar_init_vfp
+ b __cmain
+
+ PUBWEAK __early_init
+__early_init:
+ bx lr
+
+ END
diff --git a/os/common/ports/ARMCMx/compilers/RVCT/cstartup.s b/os/common/ports/ARMCMx/compilers/RVCT/cstartup.s new file mode 100644 index 000000000..e0c6b85ee --- /dev/null +++ b/os/common/ports/ARMCMx/compilers/RVCT/cstartup.s @@ -0,0 +1,121 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011,2012,2013 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+;/* <<< Use Configuration Wizard in Context Menu >>> */
+
+;// <h> Main Stack Configuration (IRQ Stack)
+;// <o> Main Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;// </h>
+main_stack_size EQU 0x00000400
+
+;// <h> Process Stack Configuration
+;// <o> Process Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;// </h>
+proc_stack_size EQU 0x00000400
+
+;// <h> C-runtime heap size
+;// <o> C-runtime heap size (in Bytes) <0x0-0xFFFFFFFF:8>
+;// </h>
+heap_size EQU 0x00000400
+
+ AREA MSTACK, NOINIT, READWRITE, ALIGN=3
+main_stack_mem SPACE main_stack_size
+ EXPORT __initial_msp
+__initial_msp
+
+ AREA CSTACK, NOINIT, READWRITE, ALIGN=3
+__main_thread_stack_base__
+ EXPORT __main_thread_stack_base__
+proc_stack_mem SPACE proc_stack_size
+ EXPORT __initial_sp
+__initial_sp
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE heap_size
+__heap_limit
+
+CONTROL_MODE_PRIVILEGED EQU 0
+CONTROL_MODE_UNPRIVILEGED EQU 1
+CONTROL_USE_MSP EQU 0
+CONTROL_USE_PSP EQU 2
+
+ PRESERVE8
+ THUMB
+
+ AREA |.text|, CODE, READONLY
+
+/*
+ * Reset handler.
+ */
+ IMPORT __main
+ EXPORT Reset_Handler
+Reset_Handler PROC
+ cpsid i
+ ldr r0, =__initial_sp
+ msr PSP, r0
+ movs r0, #CONTROL_MODE_PRIVILEGED :OR: CONTROL_USE_PSP
+ msr CONTROL, r0
+ isb
+ bl __early_init
+
+ IF {CPU} = "Cortex-M4.fp"
+ LDR R0, =0xE000ED88 ; Enable CP10,CP11
+ LDR R1, [R0]
+ ORR R1, R1, #(0xF << 20)
+ STR R1, [R0]
+ ENDIF
+
+ ldr r0, =__main
+ bx r0
+ ENDP
+
+__early_init PROC
+ EXPORT __early_init [WEAK]
+ bx lr
+ ENDP
+
+ ALIGN
+
+/*
+ * User Initial Stack & Heap.
+ */
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+__user_initial_stackheap
+ ldr r0, =Heap_Mem
+ ldr r1, =(proc_stack_mem + proc_stack_size)
+ ldr r2, =(Heap_Mem + heap_size)
+ ldr r3, =proc_stack_mem
+ bx lr
+
+ ALIGN
+
+ ENDIF
+
+ END
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