Tree reorganization.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8899 35acf78f-673a-0410-8e92-d51de3d6d3f4

3 files changed, 390 insertions, 0 deletions

diff --git a/os/common/ports/ARMCMx/compilers/IAR/chcoreasm_v6m.s b/os/common/ports/ARMCMx/compilers/IAR/chcoreasm_v6m.s
new file mode 100644
index 000000000..ad2820dfa
--- /dev/null
+++ b/os/common/ports/ARMCMx/compilers/IAR/chcoreasm_v6m.s
@@ -0,0 +1,142 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio.

+

+    This file is part of ChibiOS.

+

+    ChibiOS is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @file    compilers/IAR/chcoreasm_v6m.s

+ * @brief   ARMv6-M architecture port low level code.

+ *

+ * @addtogroup ARMCMx_IAR_CORE

+ * @{

+ */

+

+#if !defined(FALSE) || defined(__DOXYGEN__)

+#define FALSE   0

+#endif

+

+#if !defined(TRUE) || defined(__DOXYGEN__)

+#define TRUE    1

+#endif

+

+#define _FROM_ASM_

+#include "chconf.h"

+#include "chcore.h"

+

+#if !defined(__DOXYGEN__)

+

+                MODULE  ?chcoreasm_v6m

+

+                AAPCS INTERWORK, VFP_COMPATIBLE

+                PRESERVE8

+

+CONTEXT_OFFSET  SET     12

+SCB_ICSR        SET     0xE000ED04

+

+                SECTION .text:CODE:NOROOT(2)

+

+                EXTERN  chThdExit

+                EXTERN  chSchDoReschedule

+#if CH_DBG_STATISTICS

+                EXTERN   _stats_start_measure_crit_thd

+                EXTERN   _stats_stop_measure_crit_thd

+#endif

+#if CH_DBG_SYSTEM_STATE_CHECK

+                EXTERN  _dbg_check_unlock

+                EXTERN  _dbg_check_lock

+#endif

+

+                THUMB

+

+/*

+ * Performs a context switch between two threads.

+ */

+                PUBLIC _port_switch

+_port_switch:

+                push    {r4, r5, r6, r7, lr}

+                mov     r4, r8

+                mov     r5, r9

+                mov     r6, r10

+                mov     r7, r11

+                push    {r4, r5, r6, r7}

+                mov     r3, sp

+                str     r3, [r1, #CONTEXT_OFFSET]

+                ldr     r3, [r0, #CONTEXT_OFFSET]

+                mov     sp, r3

+                pop     {r4, r5, r6, r7}

+                mov     r8, r4

+                mov     r9, r5

+                mov     r10, r6

+                mov     r11, r7

+                pop     {r4, r5, r6, r7, pc}

+

+/*

+ * Start a thread by invoking its work function.

+ * If the work function returns @p chThdExit() is automatically invoked.

+ */

+                PUBLIC  _port_thread_start

+_port_thread_start:

+#if CH_DBG_SYSTEM_STATE_CHECK

+                bl      _dbg_check_unlock

+#endif

+#if CH_DBG_STATISTICS

+                bl      _stats_stop_measure_crit_thd

+#endif

+                cpsie   i

+                mov     r0, r5

+                blx     r4

+                bl      chThdExit

+

+/*

+ * Post-IRQ switch code.

+ * Exception handlers return here for context switching.

+ */

+                PUBLIC  _port_switch_from_isr

+                PUBLIC  _port_exit_from_isr

+_port_switch_from_isr:

+#if CH_DBG_STATISTICS

+                bl      _stats_start_measure_crit_thd

+#endif

+#if CH_DBG_SYSTEM_STATE_CHECK

+                bl      _dbg_check_lock

+#endif

+                bl      chSchDoReschedule

+#if CH_DBG_SYSTEM_STATE_CHECK

+                bl      _dbg_check_unlock

+#endif

+#if CH_DBG_STATISTICS

+                bl      _stats_stop_measure_crit_thd

+#endif

+_port_exit_from_isr:

+                ldr     r2, =SCB_ICSR

+                movs    r3, #128

+#if CORTEX_ALTERNATE_SWITCH

+                lsls    r3, r3, #21

+                str     r3, [r2, #0]

+                cpsie   i

+#else

+                lsls    r3, r3, #24

+                str     r3, [r2, #0]

+#endif

+waithere:

+                b       waithere

+

+                END

+

+#endif /* !defined(__DOXYGEN__) */

+

+/** @} */

diff --git a/os/common/ports/ARMCMx/compilers/IAR/chcoreasm_v7m.s b/os/common/ports/ARMCMx/compilers/IAR/chcoreasm_v7m.s
new file mode 100644
index 000000000..2f58a73aa
--- /dev/null
+++ b/os/common/ports/ARMCMx/compilers/IAR/chcoreasm_v7m.s
@@ -0,0 +1,150 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio.

+

+    This file is part of ChibiOS.

+

+    ChibiOS is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @file    compilers/IAR/chcoreasm_v7m.s

+ * @brief   ARMv7-M architecture port low level code.

+ *

+ * @addtogroup ARMCMx_IAR_CORE

+ * @{

+ */

+

+#if !defined(FALSE) || defined(__DOXYGEN__)

+#define FALSE   0

+#endif

+

+#if !defined(TRUE) || defined(__DOXYGEN__)

+#define TRUE    1

+#endif

+

+#define _FROM_ASM_

+#include "chconf.h"

+#include "chcore.h"

+

+#if !defined(__DOXYGEN__)

+

+                MODULE  ?chcoreasm_v7m

+

+                AAPCS INTERWORK, VFP_COMPATIBLE

+                PRESERVE8

+

+CONTEXT_OFFSET  SET 12

+SCB_ICSR        SET 0xE000ED04

+ICSR_PENDSVSET  SET 0x10000000

+

+                SECTION .text:CODE:NOROOT(2)

+

+                EXTERN  chThdExit

+                EXTERN  chSchDoReschedule

+#if CH_DBG_STATISTICS

+                EXTERN   _stats_start_measure_crit_thd

+                EXTERN   _stats_stop_measure_crit_thd

+#endif

+#if CH_DBG_SYSTEM_STATE_CHECK

+                EXTERN  _dbg_check_unlock

+                EXTERN  _dbg_check_lock

+#endif

+

+                THUMB

+

+/*

+ * Performs a context switch between two threads.

+ */

+                PUBLIC _port_switch

+_port_switch:

+                push    {r4, r5, r6, r7, r8, r9, r10, r11, lr}

+#if CORTEX_USE_FPU

+                vpush   {s16-s31}

+#endif

+

+                str     sp, [r1, #CONTEXT_OFFSET]

+#if (CORTEX_SIMPLIFIED_PRIORITY == FALSE) &&                                \

+    ((CORTEX_MODEL == 3) || (CORTEX_MODEL == 4))

+                /* Workaround for ARM errata 752419, only applied if

+                   condition exists for it to be triggered.*/

+                ldr     r3, [r0, #CONTEXT_OFFSET]

+                mov     sp, r3

+#else

+                ldr     sp, [r0, #CONTEXT_OFFSET]

+#endif

+

+#if CORTEX_USE_FPU

+                vpop    {s16-s31}

+#endif

+                pop     {r4, r5, r6, r7, r8, r9, r10, r11, pc}

+

+/*

+ * Start a thread by invoking its work function.

+ * If the work function returns @p chThdExit() is automatically invoked.

+ */

+                PUBLIC  _port_thread_start

+_port_thread_start:

+#if CH_DBG_SYSTEM_STATE_CHECK

+                bl      _dbg_check_unlock

+#endif

+#if CH_DBG_STATISTICS

+                bl      _stats_stop_measure_crit_thd

+#endif

+#if CORTEX_SIMPLIFIED_PRIORITY

+                cpsie   i

+#else

+                movs    r3, #0              /* CORTEX_BASEPRI_DISABLED */

+                msr     BASEPRI, r3

+#endif

+                mov     r0, r5

+                blx     r4

+                bl      chThdExit

+

+/*

+ * Post-IRQ switch code.

+ * Exception handlers return here for context switching.

+ */

+                PUBLIC  _port_switch_from_isr

+                PUBLIC  _port_exit_from_isr

+_port_switch_from_isr:

+#if CH_DBG_STATISTICS

+                bl      _stats_start_measure_crit_thd

+#endif

+#if CH_DBG_SYSTEM_STATE_CHECK

+                bl      _dbg_check_lock

+#endif

+                bl      chSchDoReschedule

+#if CH_DBG_SYSTEM_STATE_CHECK

+                bl      _dbg_check_unlock

+#endif

+#if CH_DBG_STATISTICS

+                bl      _stats_stop_measure_crit_thd

+#endif

+_port_exit_from_isr:

+#if CORTEX_SIMPLIFIED_PRIORITY

+                mov     r3, #LWRD SCB_ICSR

+                movt    r3, #HWRD SCB_ICSR

+                mov	r2, #ICSR_PENDSVSET

+                str	r2, [r3]

+                cpsie   i

+#else

+                svc     #0

+#endif

+.L3:            b       .L3

+

+                END

+

+#endif /* !defined(__DOXYGEN__) */

+

+/** @} */

diff --git a/os/common/ports/ARMCMx/compilers/IAR/chtypes.h b/os/common/ports/ARMCMx/compilers/IAR/chtypes.h
new file mode 100644
index 000000000..2078217da
--- /dev/null
+++ b/os/common/ports/ARMCMx/compilers/IAR/chtypes.h
@@ -0,0 +1,98 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio.

+

+    This file is part of ChibiOS.

+

+    ChibiOS is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @file    ARMCMx/compilers/IAR/chtypes.h

+ * @brief   ARM Cortex-Mx port system types.

+ *

+ * @addtogroup ARMCMx_IAR_CORE

+ * @{

+ */

+

+#ifndef _CHTYPES_H_

+#define _CHTYPES_H_

+

+#include <stddef.h>

+#include <stdint.h>

+#include <stdbool.h>

+

+/**

+ * @name    Common constants

+ */

+/**

+ * @brief   Generic 'false' boolean constant.

+ */

+#if !defined(FALSE) || defined(__DOXYGEN__)

+#define FALSE               0

+#endif

+

+/**

+ * @brief   Generic 'true' boolean constant.

+ */

+#if !defined(TRUE) || defined(__DOXYGEN__)

+#define TRUE                (!FALSE)

+#endif

+/** @} */

+

+/**

+ * @name    Kernel types

+ * @{

+ */

+typedef uint32_t            rtcnt_t;        /**< Realtime counter.          */

+typedef uint64_t            rttime_t;       /**< Realtime accumulator.      */

+typedef uint32_t            syssts_t;       /**< System status word.        */

+typedef uint8_t             tmode_t;        /**< Thread flags.              */

+typedef uint8_t             tstate_t;       /**< Thread state.              */

+typedef uint8_t             trefs_t;        /**< Thread references counter. */

+typedef uint8_t             tslices_t;      /**< Thread time slices counter.*/

+typedef uint32_t            tprio_t;        /**< Thread priority.           */

+typedef int32_t             msg_t;          /**< Inter-thread message.      */

+typedef int32_t             eventid_t;      /**< Numeric event identifier.  */

+typedef uint32_t            eventmask_t;    /**< Mask of event identifiers. */

+typedef uint32_t            eventflags_t;   /**< Mask of event flags.       */

+typedef int32_t             cnt_t;          /**< Generic signed counter.    */

+typedef uint32_t            ucnt_t;         /**< Generic unsigned counter.  */

+/** @} */

+

+/**

+ * @brief   ROM constant modifier.

+ * @note    It is set to use the "const" keyword in this port.

+ */

+#define ROMCONST const

+

+/**

+ * @brief   Makes functions not inlineable.

+ * @note    If the compiler does not support such attribute then the

+ *          realtime counter precision could be degraded.

+ */

+#define NOINLINE

+

+/**

+ * @brief   Optimized thread function declaration macro.

+ */

+#define PORT_THD_FUNCTION(tname, arg) void tname(void *arg)

+

+/**

+ * @brief   Packed variable specifier.

+ */

+#define PACKED_VAR __packed

+

+#endif /* _CHTYPES_H_ */

+

+/** @} */