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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-10-13 19:50:41 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-10-13 19:50:41 +0000 |
| commit | 335d2b220f7f23db9ea1bcbe62fbd2d7e0c7204f (patch) | |
| tree | 348e1b83c75ac5a8d2999ddb8d7acf8eaad902bc /os/common/ports/ARM | |
| parent | 1ec4c6230826ab639607e3fbd1dd9464fcb22dbe (diff) | |
| download | ChibiOS-335d2b220f7f23db9ea1bcbe62fbd2d7e0c7204f.tar.gz ChibiOS-335d2b220f7f23db9ea1bcbe62fbd2d7e0c7204f.tar.bz2 ChibiOS-335d2b220f7f23db9ea1bcbe62fbd2d7e0c7204f.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7393 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/common/ports/ARM')
| -rw-r--r-- | os/common/ports/ARM/compilers/GCC/irq.s | 6 | ||||
| -rw-r--r-- | os/common/ports/ARM/compilers/GCC/rules.ld | 2 | ||||
| -rw-r--r-- | os/common/ports/ARM/compilers/GCC/vectors.s | 45 |
3 files changed, 27 insertions, 26 deletions
diff --git a/os/common/ports/ARM/compilers/GCC/irq.s b/os/common/ports/ARM/compilers/GCC/irq.s index 87c0b7cc1..9fd117412 100644 --- a/os/common/ports/ARM/compilers/GCC/irq.s +++ b/os/common/ports/ARM/compilers/GCC/irq.s @@ -31,7 +31,7 @@ #if !defined(__DOXYGEN__)
- .section irq
+ .section irq, "ax"
.code 32
.balign 4
@@ -39,8 +39,8 @@ * IRQ entry point, note this code is always located at address 0x40, the
* IRQ controller data register offset must be calculated accordingly.
*/
- .global IrqHandler
-IrqHandler:
+ .global Irq_Handler
+Irq_Handler:
stmfd sp!, {r0-r3, r12, lr}
ldr r0, =ARM_IRQ_VECTOR_REG
ldr r0, [r0]
diff --git a/os/common/ports/ARM/compilers/GCC/rules.ld b/os/common/ports/ARM/compilers/GCC/rules.ld index 8c32a27a3..09755b93a 100644 --- a/os/common/ports/ARM/compilers/GCC/rules.ld +++ b/os/common/ports/ARM/compilers/GCC/rules.ld @@ -37,7 +37,7 @@ SECTIONS . = 0;
_text = .;
- boot : ALIGN(16) SUBALIGN(16)
+ startup : ALIGN(16) SUBALIGN(16)
{
KEEP(*(vectors))
KEEP(*(irq))
diff --git a/os/common/ports/ARM/compilers/GCC/vectors.s b/os/common/ports/ARM/compilers/GCC/vectors.s index be870e14c..105c583db 100644 --- a/os/common/ports/ARM/compilers/GCC/vectors.s +++ b/os/common/ports/ARM/compilers/GCC/vectors.s @@ -41,13 +41,14 @@ void _unhandled_exception(void) {} #if !defined(__DOXYGEN__)
- .section vectors
+ .section vectors, "ax"
.code 32
.balign 4
/*
* System entry points.
*/
+ .global _start
_start:
ldr pc, _reset
ldr pc, _undefined
@@ -59,39 +60,39 @@ _start: ldr pc, _fiq
_reset:
- .word ResetHandler
+ .word Reset_Handler
_undefined:
- .word UndHandler
+ .word Und_Handler
_swi:
- .word SwiHandler
+ .word Swi_Handler
_prefetch:
- .word PrefetchHandler
+ .word Prefetch_Handler
_abort:
- .word AbortHandler
+ .word Abort_Handler
_fiq:
- .word FiqHandler
+ .word Fiq_Handler
_irq:
- .word IrqHandler
+ .word Irq_Handler
/*
* Default exceptions handlers. The handlers are declared weak in order to be
* replaced by the real handling code. Everything is defaulted to an infinite
* loop.
*/
- .weak ResetHandler
-ResetHandler:
- .weak UndHandler
-UndHandler:
- .weak SwiHandler
-SwiHandler:
- .weak PrefetchHandler
-PrefetchHandler:
- .weak AbortHandler
-AbortHandler:
- .weak FiqHandler
-FiqHandler:
- .weak IrqHandler
-IrqHandler:
+ .weak Reset_Handler
+Reset_Handler:
+ .weak Und_Handler
+Und_Handler:
+ .weak Swi_Handler
+Swi_Handler:
+ .weak Prefetch_Handler
+Prefetch_Handler:
+ .weak Abort_Handler
+Abort_Handler:
+ .weak Fiq_Handler
+Fiq_Handler:
+ .weak Irq_Handler
+Irq_Handler:
.weak _unhandled_exception
_unhandled_exception:
b _unhandled_exception
|