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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-03-27 10:27:41 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-03-27 10:27:41 +0000 |
| commit | 3eb264f5b9653764e690af7450e09b5de92dfd2a (patch) | |
| tree | db4528e9ad7c838eba58e5b16b2a3edb254f573c /os/common/ports/ARM/compilers/GCC/rules.ld | |
| parent | 25c944f87f69c46efe23e998152c9c48365e51b0 (diff) | |
| download | ChibiOS-3eb264f5b9653764e690af7450e09b5de92dfd2a.tar.gz ChibiOS-3eb264f5b9653764e690af7450e09b5de92dfd2a.tar.bz2 ChibiOS-3eb264f5b9653764e690af7450e09b5de92dfd2a.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7817 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/common/ports/ARM/compilers/GCC/rules.ld')
| -rw-r--r-- | os/common/ports/ARM/compilers/GCC/rules.ld | 119 |
1 files changed, 102 insertions, 17 deletions
diff --git a/os/common/ports/ARM/compilers/GCC/rules.ld b/os/common/ports/ARM/compilers/GCC/rules.ld index a3a0fe6e9..f801c2f94 100644 --- a/os/common/ports/ARM/compilers/GCC/rules.ld +++ b/os/common/ports/ARM/compilers/GCC/rules.ld @@ -18,11 +18,10 @@ */
__stacks_total_size__ = __und_stack_size__ + __abt_stack_size__ + __fiq_stack_size__ + __irq_stack_size__ + __svc_stack_size__ + __sys_stack_size__;
-__main_thread_stack_base__ = __ram_start__;
-__ram_start__ = ORIGIN(ram);
-__ram_size__ = LENGTH(ram);
-__ram_end__ = __ram_start__ + __ram_size__;
+__ram0_start__ = ORIGIN(ram0);
+__ram0_size__ = LENGTH(ram0);
+__ram0_end__ = __ram0_start__ + __ram0_size__;
__ram1_start__ = ORIGIN(ram1);
__ram1_size__ = LENGTH(ram1);
__ram1_end__ = __ram1_start__ + __ram1_size__;
@@ -32,6 +31,18 @@ __ram2_end__ = __ram2_start__ + __ram2_size__; __ram3_start__ = ORIGIN(ram3);
__ram3_size__ = LENGTH(ram3);
__ram3_end__ = __ram3_start__ + __ram3_size__;
+__ram4_start__ = ORIGIN(ram4);
+__ram4_size__ = LENGTH(ram4);
+__ram4_end__ = __ram4_start__ + __ram4_size__;
+__ram5_start__ = ORIGIN(ram5);
+__ram5_size__ = LENGTH(ram5);
+__ram5_end__ = __ram5_start__ + __ram5_size__;
+__ram6_start__ = ORIGIN(ram6);
+__ram6_size__ = LENGTH(ram6);
+__ram6_end__ = __ram6_start__ + __ram6_size__;
+__ram7_start__ = ORIGIN(ram7);
+__ram7_size__ = LENGTH(ram7);
+__ram7_end__ = __ram7_start__ + __ram7_size__;
ENTRY(Reset_Handler)
@@ -42,7 +53,7 @@ SECTIONS startup : ALIGN(16) SUBALIGN(16)
{
- KEEP(*(vectors))
+ KEEP(*(.vectors))
} > flash
constructors : ALIGN(4) SUBALIGN(4)
@@ -63,6 +74,8 @@ SECTIONS .text : ALIGN(16) SUBALIGN(16)
{
+ *(.startup)
+ *(.startup.*)
*(.text)
*(.text.*)
*(.rodata)
@@ -105,13 +118,13 @@ SECTIONS .stacks :
{
. = ALIGN(8);
- ___stacks_base__ = .;
+ __stacks_base__ = .;
. += __stacks_total_size__;
. = ALIGN(8);
- ___stacks_end__ = .;
- } > ram
+ __stacks_end__ = .;
+ } > STACKS_RAM
- .data ALIGN(4) : ALIGN(4)
+ .data : ALIGN(4)
{
. = ALIGN(4);
PROVIDE(_data = .);
@@ -120,9 +133,9 @@ SECTIONS *(.ramtext)
. = ALIGN(4);
PROVIDE(_edata = .);
- } > ram AT > flash
+ } > DATA_RAM AT > flash
- .bss ALIGN(4) : ALIGN(4)
+ .bss : ALIGN(4)
{
. = ALIGN(4);
PROVIDE(_bss_start = .);
@@ -131,11 +144,83 @@ SECTIONS *(COMMON)
. = ALIGN(4);
PROVIDE(_bss_end = .);
- } > ram
-}
+ PROVIDE(end = .);
+ } > BSS_RAM
+
+ .ram0 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ *(.ram0)
+ *(.ram0.*)
+ . = ALIGN(4);
+ __ram0_free__ = .;
+ } > ram0
+
+ .ram1 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ *(.ram1)
+ *(.ram1.*)
+ . = ALIGN(4);
+ __ram1_free__ = .;
+ } > ram1
+
+ .ram2 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ *(.ram2)
+ *(.ram2.*)
+ . = ALIGN(4);
+ __ram2_free__ = .;
+ } > ram2
+
+ .ram3 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ *(.ram3)
+ *(.ram3.*)
+ . = ALIGN(4);
+ __ram3_free__ = .;
+ } > ram3
-PROVIDE(end = .);
-_end = .;
+ .ram4 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ *(.ram4)
+ *(.ram4.*)
+ . = ALIGN(4);
+ __ram4_free__ = .;
+ } > ram4
+
+ .ram5 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ *(.ram5)
+ *(.ram5.*)
+ . = ALIGN(4);
+ __ram5_free__ = .;
+ } > ram5
+
+ .ram6 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ *(.ram6)
+ *(.ram6.*)
+ . = ALIGN(4);
+ __ram6_free__ = .;
+ } > ram6
+
+ .ram7 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ *(.ram7)
+ *(.ram7.*)
+ . = ALIGN(4);
+ __ram7_free__ = .;
+ } > ram7
+}
-__heap_base__ = _end;
-__heap_end__ = __ram_end__;
+/* Heap default boundaries, it is defaulted to be the non-used part
+ of ram0 region.*/
+__heap_base__ = __ram0_free__;
+__heap_end__ = __ram0_end__;
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