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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-11-26 20:50:55 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-11-26 20:50:55 +0000
commit98807ccef14218336bc10b1d17f3d4404949250d (patch)
treef8227420fcd3c9354526606cadd72083ce2e36c0 /docs
parent64df619cf4d100c7c725873c9e58ce0c4b828209 (diff)
downloadChibiOS-98807ccef14218336bc10b1d17f3d4404949250d.tar.gz
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3532 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'docs')
-rw-r--r--docs/reports/STM32F407-168-IAR.txt165
-rw-r--r--docs/reports/STM32L152-32-GCC.txt13
-rw-r--r--docs/reports/STM32L152-32-IAR.txt2
-rw-r--r--docs/reports/STM32L152-32-RVCT.txt2
4 files changed, 172 insertions, 10 deletions
diff --git a/docs/reports/STM32F407-168-IAR.txt b/docs/reports/STM32F407-168-IAR.txt
new file mode 100644
index 000000000..0011dc230
--- /dev/null
+++ b/docs/reports/STM32F407-168-IAR.txt
@@ -0,0 +1,165 @@
+***************************************************************************
+Options: -Ohs
+Settings: SYSCLK=168, ACR=0x705 (5 wait states)
+Compiler: IAR C/C++ Compiler for ARM 6.21.4.2946
+***************************************************************************
+
+*** ChibiOS/RT test suite
+***
+*** Kernel: 2.3.4unstable
+*** Compiled: Nov 26 2011 - 21:41:02
+*** Compiler: IAR
+*** Architecture: ARMv7-M
+*** Core Variant: Cortex-M3
+*** Port Info: Advanced kernel mode
+*** Platform: STM32F4 High Performance & DSP
+*** Test Board: ST STM32F4-Discovery
+
+----------------------------------------------------------------------------
+--- Test Case 1.1 (Threads, enqueuing test #1)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 1.2 (Threads, enqueuing test #2)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 1.3 (Threads, priority change)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 1.4 (Threads, delays)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 2.1 (Semaphores, enqueuing)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 2.2 (Semaphores, timeout)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 2.3 (Semaphores, atomic signal-wait)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 2.4 (Binary Semaphores, functionality)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 3.1 (Mutexes, priority enqueuing test)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 3.2 (Mutexes, priority inheritance, simple case)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 3.3 (Mutexes, priority inheritance, complex case)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 3.4 (Mutexes, priority return)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 3.5 (Mutexes, status)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 3.6 (CondVar, signal test)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 3.7 (CondVar, broadcast test)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 3.8 (CondVar, boost test)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 4.1 (Messages, loop)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 5.1 (Mailboxes, queuing and timeouts)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 6.1 (Events, registration and dispatch)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 6.2 (Events, wait and broadcast)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 6.3 (Events, timeouts)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 7.1 (Heap, allocation and fragmentation test)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 8.1 (Memory Pools, queue/dequeue)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 9.1 (Dynamic APIs, threads creation from heap)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 9.2 (Dynamic APIs, threads creation from memory pool)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 9.3 (Dynamic APIs, registry and references)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 10.1 (Queues, input queues)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 10.2 (Queues, output queues)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.1 (Benchmark, messages #1)
+--- Score : 676791 msgs/S, 1353582 ctxswc/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.2 (Benchmark, messages #2)
+--- Score : 590999 msgs/S, 1181998 ctxswc/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.3 (Benchmark, messages #3)
+--- Score : 590999 msgs/S, 1181998 ctxswc/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.4 (Benchmark, context switch)
+--- Score : 2268136 ctxswc/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.5 (Benchmark, threads, full cycle)
+--- Score : 408379 threads/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.6 (Benchmark, threads, create only)
+--- Score : 597316 threads/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)
+--- Score : 198164 reschedules/S, 1188984 ctxswc/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.8 (Benchmark, round robin context switching)
+--- Score : 1286160 ctxswc/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.9 (Benchmark, I/O Queues throughput)
+--- Score : 1669044 bytes/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.10 (Benchmark, virtual timers set/reset)
+--- Score : 2124568 timers/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.11 (Benchmark, semaphores wait/signal)
+--- Score : 3010616 wait+signal/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.12 (Benchmark, mutexes lock/unlock)
+--- Score : 1799916 lock+unlock/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.13 (Benchmark, RAM footprint)
+--- System: 376 bytes
+--- Thread: 72 bytes
+--- Timer : 20 bytes
+--- Semaph: 12 bytes
+--- EventS: 4 bytes
+--- EventL: 12 bytes
+--- Mutex : 16 bytes
+--- CondV.: 8 bytes
+--- Queue : 32 bytes
+--- MailB.: 40 bytes
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+
+Final result: SUCCESS
diff --git a/docs/reports/STM32L152-32-GCC.txt b/docs/reports/STM32L152-32-GCC.txt
index 8c9b5e380..6f91d94db 100644
--- a/docs/reports/STM32L152-32-GCC.txt
+++ b/docs/reports/STM32L152-32-GCC.txt
@@ -1,20 +1,17 @@
***************************************************************************
Options: -O2 -fomit-frame-pointer -mabi=apcs-gnu -falign-functions=16
-Settings: SYSCLK=48, ACR=0x11 (1 wait state)
+Settings: SYSCLK=32, ACR=0x11 (1 wait state)
***************************************************************************
*** ChibiOS/RT test suite
***
-*** Kern
-*** ChibiOS/RT test suite
-***
*** Kernel: 2.3.4unstable
-*** Compiled: Oct 8 2011 - 16:20:37
-*** Compiler: GCC 4.6.0
+*** Compiled: Nov 26 2011 - 21:27:50
+*** Compiler: GCC 4.6.2
*** Architecture: ARMv7-M
*** Core Variant: Cortex-M3
*** Port Info: Advanced kernel mode
-*** Platform: STM32L Ultra Low Power Medium Density
+*** Platform: STM32L1 Ultra Low Power Medium Density
*** Test Board: ST STM32L-Discovery
----------------------------------------------------------------------------
@@ -135,7 +132,7 @@ Settings: SYSCLK=48, ACR=0x11 (1 wait state)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.9 (Benchmark, I/O Queues throughput)
---- Score : 350684 bytes/S
+--- Score : 328952 bytes/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.10 (Benchmark, virtual timers set/reset)
diff --git a/docs/reports/STM32L152-32-IAR.txt b/docs/reports/STM32L152-32-IAR.txt
index 17ba349f8..8c04ac510 100644
--- a/docs/reports/STM32L152-32-IAR.txt
+++ b/docs/reports/STM32L152-32-IAR.txt
@@ -1,6 +1,6 @@
***************************************************************************
Options: -Ohs
-Settings: SYSCLK=24, ACR=0x10 (no wait states)
+Settings: SYSCLK=32, ACR=0x11 (1 wait state)
Compiler: IAR C/C++ Compiler for ARM 6.21.4.2946
***************************************************************************
diff --git a/docs/reports/STM32L152-32-RVCT.txt b/docs/reports/STM32L152-32-RVCT.txt
index aadaddb7b..be53579aa 100644
--- a/docs/reports/STM32L152-32-RVCT.txt
+++ b/docs/reports/STM32L152-32-RVCT.txt
@@ -1,6 +1,6 @@
***************************************************************************
Options: -O3 -Otime --apcs=interwork
-Settings: SYSCLK=24, ACR=0x10 (no wait states)
+Settings: SYSCLK=32, ACR=0x11 (1 wait state)
Compiler: RealView C/C++ Compiler V4.1.0.791 [Evaluation].
***************************************************************************