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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-02-02 15:46:43 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-02-02 15:46:43 +0000 |
| commit | ff51a351cb4f3418db430224e9a9f8ab960064d8 (patch) | |
| tree | 7bf320209bc75f700446643015bad42ed8e328ec /demos | |
| parent | c02d5e76c506586b259425edddb1385677fe8e97 (diff) | |
| download | ChibiOS-ff51a351cb4f3418db430224e9a9f8ab960064d8.tar.gz ChibiOS-ff51a351cb4f3418db430224e9a9f8ab960064d8.tar.bz2 ChibiOS-ff51a351cb4f3418db430224e9a9f8ab960064d8.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6660 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'demos')
| -rw-r--r-- | demos/rt/RT-STM32F303-DISCOVERY/keil/ch.uvproj | 21 |
1 files changed, 13 insertions, 8 deletions
diff --git a/demos/rt/RT-STM32F303-DISCOVERY/keil/ch.uvproj b/demos/rt/RT-STM32F303-DISCOVERY/keil/ch.uvproj index 02b0a5cd8..38858cfa1 100644 --- a/demos/rt/RT-STM32F303-DISCOVERY/keil/ch.uvproj +++ b/demos/rt/RT-STM32F303-DISCOVERY/keil/ch.uvproj @@ -229,7 +229,7 @@ <NoZi2>0</NoZi2> <NoZi3>0</NoZi3> <NoZi4>0</NoZi4> - <NoZi5>0</NoZi5> + <NoZi5>1</NoZi5> <Ro1Chk>0</Ro1Chk> <Ro2Chk>0</Ro2Chk> <Ro3Chk>0</Ro3Chk> @@ -239,7 +239,7 @@ <Ra2Chk>0</Ra2Chk> <Ra3Chk>0</Ra3Chk> <Im1Chk>1</Im1Chk> - <Im2Chk>0</Im2Chk> + <Im2Chk>1</Im2Chk> <OnChipMemories> <Ocm1> <Type>0</Type> @@ -313,8 +313,8 @@ </OCR_RVCT5> <OCR_RVCT6> <Type>0</Type> - <StartAddress>0x2000c000</StartAddress> - <Size>0x1</Size> + <StartAddress>0x10000000</StartAddress> + <Size>0x2000</Size> </OCR_RVCT6> <OCR_RVCT7> <Type>0</Type> @@ -333,8 +333,8 @@ </OCR_RVCT9> <OCR_RVCT10> <Type>0</Type> - <StartAddress>0x10000000</StartAddress> - <Size>0x2000</Size> + <StartAddress>0x2000c000</StartAddress> + <Size>0x1</Size> </OCR_RVCT10> </OnChipMemories> <RvctStartVector></RvctStartVector> @@ -355,7 +355,7 @@ <uSurpInc>0</uSurpInc> <VariousControls> <MiscControls>--c99</MiscControls> - <Define>__heap_base__=Image$$RW_IRAM1$$ZI$$Limit __heap_end__=Image$$RW_RAM1$$Base</Define> + <Define>__heap_base__=Image$$RW_IRAM1$$ZI$$Limit __heap_end__=Image$$RW_IRAM2$$Base</Define> <Undefine></Undefine> <IncludePath>..\;..\..\..\..\os\common\ports\ARMCMx\devices\STM32F30x;..\..\..\..\os\ext\CMSIS\include;..\..\..\..\os\ext\CMSIS\ST;..\..\..\..\os\rt\ports\ARMCMx;..\..\..\..\os\rt\ports\ARMCMx\compilers\RVCT;..\..\..\..\os\rt\include;..\..\..\..\os\hal\osal\rt;..\..\..\..\os\hal\include;..\..\..\..\os\hal\boards\ST_STM32F3_DISCOVERY;..\..\..\..\os\hal\ports\common\ARMCMx;..\..\..\..\os\hal\ports\STM32\STM32F30x;..\..\..\..\os\hal\ports\STM32\LLD;..\..\..\..\os\hal\ports\STM32\LLD\GPIOv2;..\..\..\..\os\hal\ports\STM32\LLD\I2Cv2;..\..\..\..\os\hal\ports\STM32\LLD\RTCv2;..\..\..\..\os\hal\ports\STM32\LLD\SPIv2;..\..\..\..\os\hal\ports\STM32\LLD\TIMv1;..\..\..\..\os\hal\ports\STM32\LLD\USARTv2;..\..\..\..\os\hal\ports\STM32\LLD\USBv1;..\..\..\..\test</IncludePath> </VariousControls> @@ -373,7 +373,7 @@ <MiscControls>--cpreproc</MiscControls> <Define></Define> <Undefine></Undefine> - <IncludePath>..\;..\..\..\..\os\common\ports\ARMCMx\devices\STM32F30x</IncludePath> + <IncludePath>..\;..\..\..\..\os\common\ports\ARMCMx\devices\STM32F30x;..\..\..\..\os\rt\ports\ARMCMx</IncludePath> </VariousControls> </Aads> <LDads> @@ -478,6 +478,11 @@ <FileType>5</FileType> <FilePath>..\..\..\..\os\rt\ports\ARMCMx\compilers\RVCT\chtypes.h</FilePath> </File> + <File> + <FileName>chcoreasm_v7m.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\..\os\rt\ports\ARMCMx\compilers\RVCT\chcoreasm_v7m.s</FilePath> + </File> </Files> </Group> <Group> |