diff options
| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2007-12-18 09:41:28 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2007-12-18 09:41:28 +0000 |
| commit | cae69c784f75c1d2ace5465aff052d2d4a1b5a42 (patch) | |
| tree | a39e45b4cf8fa17de3cb716d341f43aea2be6ee8 /demos | |
| parent | 0bb20d36f4f1c8457416167b399d976d26660611 (diff) | |
| download | ChibiOS-cae69c784f75c1d2ace5465aff052d2d4a1b5a42.tar.gz ChibiOS-cae69c784f75c1d2ace5465aff052d2d4a1b5a42.tar.bz2 ChibiOS-cae69c784f75c1d2ace5465aff052d2d4a1b5a42.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@143 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'demos')
| -rw-r--r-- | demos/ARM7-LPC214x-GCC/Makefile | 14 | ||||
| -rw-r--r-- | demos/ARM7-LPC214x-GCC/buzzer.c | 1 | ||||
| -rw-r--r-- | demos/ARM7-LPC214x-GCC/chcore.c | 322 | ||||
| -rw-r--r-- | demos/ARM7-LPC214x-GCC/chcore.h | 137 | ||||
| -rw-r--r-- | demos/ARM7-LPC214x-GCC/chcore2.s | 71 | ||||
| -rw-r--r-- | demos/ARM7-LPC214x-GCC/crt0.s | 170 |
6 files changed, 8 insertions, 707 deletions
diff --git a/demos/ARM7-LPC214x-GCC/Makefile b/demos/ARM7-LPC214x-GCC/Makefile index a2f229617..a267ac184 100644 --- a/demos/ARM7-LPC214x-GCC/Makefile +++ b/demos/ARM7-LPC214x-GCC/Makefile @@ -62,16 +62,16 @@ UDEFS = UADEFS =
# List ARM-mode C source files here
-ASRC = chcore.c \
+ASRC = ../../ports/ARM7-LPC214x/GCC/chcore.c \
+ ../../ports/ARM7-LPC214x/GCC/vic.c \
+ ../../ports/ARM7-LPC214x/GCC/lpc214x_serial.c \
+ ../../ports/ARM7-LPC214x/GCC/lpc214x_ssp.c \
../../src/chinit.c ../../src/chdebug.c ../../src/chlists.c ../../src/chdelta.c \
../../src/chschd.c ../../src/chthreads.c ../../src/chsem.c ../../src/chmtx.c \
../../src/chevents.c ../../src/chmsg.c ../../src/chsleep.c ../../src/chqueues.c \
../../src/chserial.c \
- ../../ports/ARM7-LPC214x/GCC/vic.c ../../ports/ARM7-LPC214x/GCC/lpc214x_serial.c \
- ../../ports/ARM7-LPC214x/GCC/lpc214x_ssp.c \
../../src/lib/evtimer.c ../../test/test.c \
- buzzer.c mmcsd.c main.c
-
+ board.c buzzer.c mmcsd.c main.c
# List THUMB-mode C sources here
# NOTE: If any module is compiled in thumb mode then -mthumb-interwork is
@@ -79,7 +79,7 @@ ASRC = chcore.c \ TSRC =
# List ASM source files here
-ASMSRC = crt0.s chcore2.s
+ASMSRC = ../../ports/ARM7-LPC214x/GCC/crt0.s ../../ports/ARM7-LPC214x/GCC/chcore2.s
# List all user directories here
UINCDIR = ../../src/include ../../src/lib ../../ports/ARM7-LPC214x/GCC
@@ -162,7 +162,7 @@ $(TOBJS) : %.o : %.c $(ASMOBJS) : %.o : %.s
@echo
- $(AS) -c $(ASFLAGS) $< -o $@
+ $(AS) -c $(ASFLAGS) -I . $(INCDIR) $< -o $@
%elf: $(OBJS)
@echo
diff --git a/demos/ARM7-LPC214x-GCC/buzzer.c b/demos/ARM7-LPC214x-GCC/buzzer.c index 7d80d8881..9ee122fe1 100644 --- a/demos/ARM7-LPC214x-GCC/buzzer.c +++ b/demos/ARM7-LPC214x-GCC/buzzer.c @@ -27,6 +27,7 @@ #include <ch.h>
#include "lpc214x.h"
+#include "board.h"
#include "buzzer.h"
EventSource BuzzerSilentEventSource;
diff --git a/demos/ARM7-LPC214x-GCC/chcore.c b/demos/ARM7-LPC214x-GCC/chcore.c deleted file mode 100644 index 8b9b4d464..000000000 --- a/demos/ARM7-LPC214x-GCC/chcore.c +++ /dev/null @@ -1,322 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#include <ch.h>
-
-#include "lpc214x.h"
-#include "vic.h"
-#include "lpc214x_serial.h"
-#include "lpc214x_ssp.h"
-#include "mmcsd.h"
-
-#include "buzzer.h"
-
-extern void IrqHandler(void);
-extern void T0IrqHandler(void);
-
-#define VAL_TC0_PRESCALER 0
-
-/*
- * Pins configuration for Olimex LPC-P2148.
- *
- * PINSEL0
- * P0 P0 P0 P0 P0 P0 RXD TXD SSE MOS MIS SCK SDA SCL RXD TXD
- * 15 14 13 12 11 10 1 1 L0 I0 O0 0 0 0 0 0
- * 00 00 00 00 00 00 01 01 01 01 01 01 01 01 01 01
- * IN IN OUT OUT OUT OUT -- -- -- -- -- -- -- -- -- --
- * 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 0
- *
- * PINSEL1
- * P0 AD P0 P0 -- -- AO -- VB P0 P0 P0 MOS MIS SCK P0
- * 31 03 29 28 -- -- UT -- US 22 21 20 I1 O1 1 16
- * 00 01 00 00 00 00 10 00 01 00 00 00 10 10 10 00
- * OUT -- OUT OUT -- -- -- -- -- OUT OUT OUT -- -- -- IN
- * 1 0 1 1 0 0 0 0 0 1 1 1 0 0 0 0
- *
- * PINSEL2
- * -- -- -- -- -- -- -- -- -- -- -- -- -- -- GP DBG --
- * -- -- -- -- -- -- -- -- -- -- -- -- -- -- IO --
- * 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0 1 00
- * -- -- -- -- -- -- -- -- -- -- -- -- -- -- IN -- --
- */
-#define VAL_PINSEL0 0x00055555
-#define VAL_PINSEL1 0x100840A8
-#define VAL_PINSEL2 0x00000004
-#define VAL_FIO0DIR 0xB0703C00
-#define VAL_FIO1DIR 0x00000000
-
-/*
- * Hardware initialization goes here.
- * NOTE: Interrupts are still disabled.
- */
-void hwinit(void) {
-
- /*
- * All peripherals clock disabled by default in order to save power.
- */
- PCONP = PCRTC | PCTIM0;
-
- /*
- * MAM setup.
- */
- MAMTIM = 0x3; /* 3 cycles for flash accesses. */
- MAMCR = 0x2; /* MAM fully enabled. */
-
- /*
- * PLL setup for Fosc=12MHz and CCLK=48MHz.
- * P=2 M=3.
- */
- PLL *pll = PLLBase;
- pll->PLL0_CFG = 0x23; /* P and M values. */
- pll->PLL0_CON = 0x1; /* Enalbles the PLL 0. */
- pll->PLL0_FEED = 0xAA;
- pll->PLL0_FEED = 0x55;
- while (!(pll->PLL0_STAT & 0x400))
- ; /* Wait for PLL lock. */
-
- pll->PLL0_CON = 0x3; /* Connects the PLL. */
- pll->PLL0_FEED = 0xAA;
- pll->PLL0_FEED = 0x55;
-
- /*
- * VPB setup.
- * PCLK = CCLK / 4.
- */
- VPBDIV = VPD_D4;
-
- /*
- * I/O pins configuration.
- */
- PINSEL0 = VAL_PINSEL0;
- PINSEL1 = VAL_PINSEL1;
- PINSEL2 = VAL_PINSEL2;
- IO0DIR = VAL_FIO0DIR;
- IO0SET = 0xFFFFFFFF;
- IO1DIR = VAL_FIO1DIR;
- IO1SET = 0xFFFFFFFF;
-
- /*
- * Interrupt vectors assignment.
- */
- InitVIC();
- VICDefVectAddr = (IOREG32)IrqHandler;
-
- /*
- * System Timer initialization, 1ms intervals.
- */
- SetVICVector(T0IrqHandler, 0, SOURCE_Timer0);
- VICIntEnable = INTMASK(SOURCE_Timer0);
- TC *timer = T0Base;
- timer->TC_PR = VAL_TC0_PRESCALER;
- timer->TC_MR0 = (PCLK / CH_FREQUENCY) / (VAL_TC0_PRESCALER + 1);
- timer->TC_MCR = 3; /* Interrupt and clear TC on match MR0. */
- timer->TC_TCR = 2; /* Reset counter and prescaler. */
- timer->TC_TCR = 1; /* Timer enabled. */
-
- /*
- * Other subsystems.
- */
- InitSerial(1, 2);
- InitSSP();
- InitMMC();
- InitBuzzer();
-}
-
-/*
- * System idle thread loop.
- */
-void _IdleThread(void *p) {
-
- while (TRUE) {
-// Note, it is disabled because it causes trouble with the JTAG probe.
-// Enable it in the final code only.
-// PCON = 1;
- }
-}
-
-/*
- * System console message (not implemented).
- */
-void chSysPuts(char *msg) {
-}
-
-/*
- * Non-vectored IRQs handling here.
- */
-__attribute__((naked, weak))
-void IrqHandler(void) {
-
- chSysIRQEnterI();
-
- /* nothing */
-
- chSysIRQExitI();
-}
-
-/*
- * Timer 0 IRQ handling here.
- */
-__attribute__((naked, weak))
-void T0IrqHandler(void) {
-
- chSysIRQEnterI();
-
- T0IR = 1; /* Clear interrupt on match MR0. */
- chSysTimerHandlerI();
-
- chSysIRQExitI();
-}
-
-/*
- * Common IRQ exit code, \p chSysIRQExitI() just jumps here.
- *
- * System stack frame structure after a context switch in the
- * interrupt handler:
- *
- * High +------------+
- * | LR_USR | -+
- * | R12 | |
- * | R3 | |
- * | R2 | | External context: IRQ handler frame
- * | R1 | |
- * | R0 | |
- * | LR_IRQ | | (user code return address)
- * | SPSR | -+ (user code status)
- * | .... | <- chSchDoRescheduleI() stack frame, optimize it for space
- * | LR | -+ (system code return address)
- * | R11 | |
- * | R10 | |
- * | R9 | |
- * | R8 | | Internal context: chSysSwitchI() frame
- * | (R7) | | (optional, see CH_CURRP_REGISTER_CACHE)
- * | R6 | |
- * | R5 | |
- * SP-> | R4 | -+
- * Low +------------+
- */
-__attribute__((naked, weak))
-void IrqCommon(void) {
- register BOOL b asm("r0");
-
- VICVectAddr = 0;
- b = chSchRescRequiredI();
-#ifdef THUMB
- asm(".p2align 2,, \n\t" \
- "mov lr, pc \n\t" \
- "bx lr \n\t" \
- ".code 32 \n\t");
-#endif
- /*
- * If a reschedulation is not required then just returns from the IRQ.
- */
- asm("cmp r0, #0 \n\t" \
- "ldmeqfd sp!, {r0-r3, r12, lr} \n\t" \
- "subeqs pc, lr, #4 \n\t");
- /*
- * Reschedulation required, saves the external context on the
- * system/user stack and empties the IRQ stack.
- */
- asm(".set MODE_IRQ, 0x12 \n\t" \
- ".set MODE_SYS, 0x1F \n\t" \
- ".set I_BIT, 0x80 \n\t" \
- "ldmfd sp!, {r0-r3, r12, lr} \n\t" \
- "msr CPSR_c, #MODE_SYS | I_BIT \n\t" \
- "stmfd sp!, {r0-r3, r12, lr} \n\t" \
- "msr CPSR_c, #MODE_IRQ | I_BIT \n\t" \
- "mrs r0, SPSR \n\t" \
- "mov r1, lr \n\t" \
- "msr CPSR_c, #MODE_SYS | I_BIT \n\t" \
- "stmfd sp!, {r0, r1} \n\t");
-
-#ifdef THUMB_NO_INTERWORKING
- asm("add r0, pc, #1 \n\t" \
- "bx r0 \n\t" \
- ".code 16 \n\t" \
- "bl chSchDoRescheduleI \n\t" \
- ".p2align 2,, \n\t" \
- "mov lr, pc \n\t" \
- "bx lr \n\t" \
- ".code 32 \n\t");
-#else
- asm("bl chSchDoRescheduleI \n\t");
-#endif
-
- /*
- * Restores the external context.
- */
- asm("ldmfd sp!, {r0, r1} \n\t" \
- "msr CPSR_c, #MODE_IRQ | I_BIT \n\t" \
- "msr SPSR_fsxc, r0 \n\t" \
- "mov lr, r1 \n\t" \
- "msr CPSR_c, #MODE_SYS | I_BIT \n\t" \
- "ldmfd sp!, {r0-r3, r12, lr} \n\t" \
- "msr CPSR_c, #MODE_IRQ | I_BIT \n\t" \
- "subs pc, lr, #4 \n\t");
-
- /*
- * Threads entry/exit code. It is declared weak so you can easily replace it.
- * NOTE: It is always invoked in ARM mode, it does the mode switching.
- * NOTE: It is included into IrqCommon to make sure the symbol refers to
- * 32 bit code.
- */
- asm(".set F_BIT, 0x40 \n\t" \
- ".weak threadstart \n\t" \
- ".globl threadstart \n\t" \
- "threadstart: \n\t" \
- "msr CPSR_c, #MODE_SYS \n\t");
-#ifndef THUMB_NO_INTERWORKING
- asm("mov r0, r5 \n\t" \
- "mov lr, pc \n\t" \
- "bx r4 \n\t" \
- "bl chThdExit \n\t");
-#else
- asm("add r0, pc, #1 \n\t" \
- "bx r0 \n\t" \
- ".code 16 \n\t" \
- "mov r0, r5 \n\t" \
- "bl jmpr4 \n\t" \
- "bl chThdExit \n\t" \
- "jmpr4: \n\t" \
- "bx r4 \n\t");
-#endif
-}
-
-/*
- * System halt.
- */
-__attribute__((naked, weak))
-void chSysHalt(void) {
-
- asm(".set F_BIT, 0x40 \n\t" \
- ".set I_BIT, 0x80 \n\t");
-#ifdef THUMB
- asm(".p2align 2,, \n\t" \
- "mov r0, pc \n\t" \
- "bx r0 \n\t");
-#endif
- asm(".code 32 \n\t" \
- ".weak _halt32 \n\t" \
- ".globl _halt32 \n\t" \
- "_halt32: \n\t" \
- "mrs r0, CPSR \n\t" \
- "orr r0, #I_BIT | F_BIT \n\t" \
- "msr CPSR_c, r0 \n\t" \
- ".loop: \n\t" \
- "b .loop \n\t");
-}
diff --git a/demos/ARM7-LPC214x-GCC/chcore.h b/demos/ARM7-LPC214x-GCC/chcore.h deleted file mode 100644 index cc1113c18..000000000 --- a/demos/ARM7-LPC214x-GCC/chcore.h +++ /dev/null @@ -1,137 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#ifndef _CHCORE_H_
-#define _CHCORE_H_
-
-/*
- * The following values are implementation dependent. You may change them in
- * order to match your HW.
- */
-#define FOSC 12000000
-#define CCLK 48000000
-#define PCLK 12000000
-
-typedef void *regarm;
-
-/*
- * Interrupt saved context.
- */
-struct extctx {
- regarm spsr_irq;
- regarm lr_irq;
- regarm r0;
- regarm r1;
- regarm r2;
- regarm r3;
- regarm r12;
-};
-
-/*
- * System saved context.
- */
-struct intctx {
- regarm r4;
- regarm r5;
- regarm r6;
-#ifndef CH_CURRP_REGISTER_CACHE
- regarm r7;
-#endif
- regarm r8;
- regarm r9;
- regarm r10;
- regarm r11;
- regarm lr;
-};
-
-/*
- * Port dependent part of the Thread structure, you may add fields in
- * this structure.
- */
-typedef struct {
- struct intctx *r13;
-} Context;
-
-/*
- * Platform dependent part of the \p chThdCreate() API.
- */
-#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
- tp->p_ctx.r13 = (struct intctx *)((BYTE8 *)workspace + \
- wsize - \
- sizeof(struct intctx)); \
- tp->p_ctx.r13->r4 = pf; \
- tp->p_ctx.r13->r5 = arg; \
- tp->p_ctx.r13->lr = threadstart; \
-}
-
-#ifdef THUMB
-extern void chSysLock(void);
-extern void chSysUnlock(void);
-#else /* !THUMB */
-#define chSysLock() asm("msr CPSR_c, #0x9F")
-#define chSysUnlock() asm("msr CPSR_c, #0x1F")
-#endif /* THUMB */
-
-#ifdef THUMB
-#define INT_REQUIRED_STACK 0x10
-#else /* !THUMB */
-#define INT_REQUIRED_STACK 0
-#endif /* !THUMB */
-#define StackAlign(n) ((((n) - 1) | 3) + 1)
-#define UserStackSize(n) StackAlign(sizeof(Thread) + \
- sizeof(struct intctx) + \
- sizeof(struct extctx) + \
- (n) + \
- INT_REQUIRED_STACK)
-#define WorkingArea(s, n) ULONG32 s[UserStackSize(n) >> 2];
-
-#ifdef THUMB
-#define chSysIRQEnterI() { \
- asm(".code 32 \n\t" \
- "stmfd sp!, {r0-r3, r12, lr} \n\t" \
- "add r0, pc, #1 \n\t" \
- "bx r0 \n\t" \
- ".code 16 \n\t"); \
-}
-
-#define chSysIRQExitI() { \
- VICVectAddr = 0; \
- asm("ldr r0, =IrqCommon \n\t" \
- "bx r0 \n\t"); \
-}
-#else /* !THUMB */
-#define chSysIRQEnterI() { \
- asm("stmfd sp!, {r0-r3, r12, lr} \n\t"); \
-}
-
-#define chSysIRQExitI() { \
- asm("b IrqCommon \n\t"); \
-}
-#endif /* !THUMB */
-
-/* It requires zero bytes, but better be safe.*/
-#define IDLE_THREAD_STACK_SIZE 8
-void _IdleThread(void *p) __attribute__((noreturn));
-
-void chSysHalt(void);
-void chSysSwitchI(Context *oldp, Context *newp);
-void chSysPuts(char *msg);
-void threadstart(void);
-
-#endif /* _CHCORE_H_ */
diff --git a/demos/ARM7-LPC214x-GCC/chcore2.s b/demos/ARM7-LPC214x-GCC/chcore2.s deleted file mode 100644 index 35dd49597..000000000 --- a/demos/ARM7-LPC214x-GCC/chcore2.s +++ /dev/null @@ -1,71 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#include "chconf.h"
-
-.set MODE_USR, 0x10
-.set MODE_FIQ, 0x11
-.set MODE_IRQ, 0x12
-.set MODE_SVC, 0x13
-.set MODE_ABT, 0x17
-.set MODE_UND, 0x1B
-.set MODE_SYS, 0x1F
-
-.equ I_BIT, 0x80
-.equ F_BIT, 0x40
-
-.text
-.code 32
-.balign 4
-
-#ifdef THUMB
-.globl chSysLock
-chSysLock:
- msr CPSR_c, #MODE_SYS | I_BIT
- bx lr
-
-.globl chSysUnlock
-chSysUnlock:
- msr CPSR_c, #MODE_SYS
- bx lr
-#endif
-
-.globl chSysSwitchI
-chSysSwitchI:
-#ifdef CH_CURRP_REGISTER_CACHE
- stmfd sp!, {r4, r5, r6, r8, r9, r10, r11, lr}
- str sp, [r0, #0]
- ldr sp, [r1, #0]
-#ifdef THUMB
- ldmfd sp!, {r4, r5, r6, r8, r9, r10, r11, lr}
- bx lr
-#else
- ldmfd sp!, {r4, r5, r6, r8, r9, r10, r11, pc}
-#endif
-#else
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr}
- str sp, [r0, #0]
- ldr sp, [r1, #0]
-#ifdef THUMB
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr}
- bx lr
-#else
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, pc}
-#endif
-#endif /* CH_CURRP_REGISTER_CACHE */
diff --git a/demos/ARM7-LPC214x-GCC/crt0.s b/demos/ARM7-LPC214x-GCC/crt0.s deleted file mode 100644 index 9032b0742..000000000 --- a/demos/ARM7-LPC214x-GCC/crt0.s +++ /dev/null @@ -1,170 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * Generic ARM startup file for ChibiOS/RT.
- */
-
-.extern _main
-
-.set MODE_USR, 0x10
-.set MODE_FIQ, 0x11
-.set MODE_IRQ, 0x12
-.set MODE_SVC, 0x13
-.set MODE_ABT, 0x17
-.set MODE_UND, 0x1B
-.set MODE_SYS, 0x1F
-
-.equ I_BIT, 0x80
-.equ F_BIT, 0x40
-
-.text
-.code 32
-.balign 4
-/*
- * System entry points.
- */
-_start:
- b ResetHandler
- ldr pc, _undefined
- ldr pc, _swi
- ldr pc, _prefetch
- ldr pc, _abort
- nop
- ldr pc, [pc,#-0xFF0] /* VIC - IRQ Vector Register */
- ldr pc, _fiq
-
-_undefined:
- .word UndHandler
-_swi:
- .word SwiHandler
-_prefetch:
- .word PrefetchHandler
-_abort:
- .word AbortHandler
-_fiq:
- .word FiqHandler
- .word 0
- .word 0
-
-/*
- * Reset handler.
- */
-ResetHandler:
- /*
- * Stack pointers initialization.
- */
- ldr r0, =__ram_end__
- /* Undefined */
- msr CPSR_c, #MODE_UND | I_BIT | F_BIT
- mov sp, r0
- ldr r1, =__und_stack_size__
- sub r0, r0, r1
- /* Abort */
- msr CPSR_c, #MODE_ABT | I_BIT | F_BIT
- mov sp, r0
- ldr r1, =__abt_stack_size__
- sub r0, r0, r1
- /* FIQ */
- msr CPSR_c, #MODE_FIQ | I_BIT | F_BIT
- mov sp, r0
- ldr r1, =__fiq_stack_size__
- sub r0, r0, r1
- /* IRQ */
- msr CPSR_c, #MODE_IRQ | I_BIT | F_BIT
- mov sp, r0
- ldr r1, =__irq_stack_size__
- sub r0, r0, r1
- /* Supervisor */
- msr CPSR_c, #MODE_SVC | I_BIT | F_BIT
- mov sp, r0
- ldr r1, =__svc_stack_size__
- sub r0, r0, r1
- /* System */
- msr CPSR_c, #MODE_SYS | I_BIT | F_BIT
- mov sp, r0
-// ldr r1, =__sys_stack_size__
-// sub r0, r0, r1
- /*
- * Data initialization.
- * NOTE: It assumes that the DATA size is a multiple of 4.
- */
- ldr r1, =_textdata
- ldr r2, =_data
- ldr r3, =_edata
-dataloop:
- cmp r2, r3
- ldrlo r0, [r1], #4
- strlo r0, [r2], #4
- blo dataloop
- /*
- * BSS initialization.
- * NOTE: It assumes that the BSS size is a multiple of 4.
- */
- mov r0, #0
- ldr r1, =_bss_start
- ldr r2, =_bss_end
-bssloop:
- cmp r1, r2
- strlo r0, [r1], #4
- blo bssloop
- /*
- * Application-provided HW initialization routine.
- */
-#ifndef THUMB_NO_INTERWORKING
- bl hwinit
- /*
- * main(0, NULL).
- */
- mov r0, #0
- mov r1, r0
- bl main
- bl chSysHalt
-#else
- add r0, pc, #1
- bx r0
-.code 16
- bl hwinit
- mov r0, #0
- mov r1, r0
- bl main
- bl chSysHalt
-.code 32
-#endif
-
-.weak UndHandler
-.globl UndHandler
-UndHandler:
-
-.weak SwiHandler
-.globl SwiHandler
-SwiHandler:
-
-.weak PrefetchHandler
-.globl PrefetchHandler
-PrefetchHandler:
-
-.weak AbortHandler
-.globl AbortHandler
-AbortHandler:
-
-.weak FiqHandler
-.globl FiqHandler
-FiqHandler:
- b _halt32
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