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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2015-07-26 06:17:10 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2015-07-26 06:17:10 +0000 |
| commit | c96f0b2bbf7c911a5d23d6c9920f1c6f4d766c8c (patch) | |
| tree | 53c0ebd122fe369cc08b4ed3bf885ba39e9a07f1 /demos | |
| parent | b05e7e8c4464bda8fecd21ff80086a34edf9292c (diff) | |
| download | ChibiOS-c96f0b2bbf7c911a5d23d6c9920f1c6f4d766c8c.tar.gz ChibiOS-c96f0b2bbf7c911a5d23d6c9920f1c6f4d766c8c.tar.bz2 ChibiOS-c96f0b2bbf7c911a5d23d6c9920f1c6f4d766c8c.zip | |
More STM32L0xx support files.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8104 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'demos')
6 files changed, 135 insertions, 8 deletions
diff --git a/demos/LPC21xx/RT-LPC214x-OLIMEX/debug/RT-LPC214x-OLIMEX (OpenOCD, Flash and Run).launch b/demos/LPC21xx/RT-LPC214x-OLIMEX/debug/RT-LPC214x-OLIMEX (OpenOCD, Flash and Run).launch index 97058e1ee..a1d7c7819 100644 --- a/demos/LPC21xx/RT-LPC214x-OLIMEX/debug/RT-LPC214x-OLIMEX (OpenOCD, Flash and Run).launch +++ b/demos/LPC21xx/RT-LPC214x-OLIMEX/debug/RT-LPC214x-OLIMEX (OpenOCD, Flash and Run).launch @@ -33,7 +33,7 @@ <intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>
-<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><contentList><content id="spsr_und-(format)" val="4"/><content id="lr_abt-(format)" val="4"/><content id="cpsr-(format)" val="4"/><content id="r6-(format)" val="4"/><content id="r4-(format)" val="4"/><content id="r3-(format)" val="4"/><content id="r1-(format)" val="4"/><content id="r0-(format)" val="4"/></contentList>"/>
+<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><contentList><content id="r0-(format)" val="4"/><content id="r1-(format)" val="4"/><content id="r3-(format)" val="4"/><content id="r4-(format)" val="4"/><content id="r6-(format)" val="4"/><content id="cpsr-(format)" val="4"/><content id="lr_abt-(format)" val="4"/><content id="spsr_und-(format)" val="4"/></contentList>"/>
<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <globalVariableList/> "/>
<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList/> "/>
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="./build/ch.elf"/>
diff --git a/demos/STM32/RT-STM32L053R8-NUCLEO/Makefile b/demos/STM32/RT-STM32L053R8-NUCLEO/Makefile index 0fcd5c9b8..31e78684f 100644 --- a/demos/STM32/RT-STM32L053R8-NUCLEO/Makefile +++ b/demos/STM32/RT-STM32L053R8-NUCLEO/Makefile @@ -60,7 +60,7 @@ endif # Stack size to be allocated to the Cortex-M process stack. This stack is
# the stack used by the main() thread.
ifeq ($(USE_PROCESS_STACKSIZE),)
- USE_PROCESS_STACKSIZE = 0x100
+ USE_PROCESS_STACKSIZE = 0x200
endif
# Stack size to the allocated to the Cortex-M main/exceptions stack. This
diff --git a/demos/STM32/RT-STM32L053R8-NUCLEO/chconf.h b/demos/STM32/RT-STM32L053R8-NUCLEO/chconf.h index 8013f1ff2..3efdfc677 100644 --- a/demos/STM32/RT-STM32L053R8-NUCLEO/chconf.h +++ b/demos/STM32/RT-STM32L053R8-NUCLEO/chconf.h @@ -56,7 +56,7 @@ * The value one is not valid, timeouts are rounded up to
* this value.
*/
-#define CH_CFG_ST_TIMEDELTA 0
+#define CH_CFG_ST_TIMEDELTA 2
/** @} */
diff --git a/demos/STM32/RT-STM32L053R8-NUCLEO/halconf.h b/demos/STM32/RT-STM32L053R8-NUCLEO/halconf.h index eaf68900a..29155d16b 100644 --- a/demos/STM32/RT-STM32L053R8-NUCLEO/halconf.h +++ b/demos/STM32/RT-STM32L053R8-NUCLEO/halconf.h @@ -41,7 +41,7 @@ * @brief Enables the ADC subsystem.
*/
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
-#define HAL_USE_ADC FALSE
+#define HAL_USE_ADC TRUE
#endif
/**
@@ -132,7 +132,7 @@ * @brief Enables the SERIAL subsystem.
*/
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
-#define HAL_USE_SERIAL FALSE
+#define HAL_USE_SERIAL TRUE
#endif
/**
diff --git a/demos/STM32/RT-STM32L053R8-NUCLEO/main.c b/demos/STM32/RT-STM32L053R8-NUCLEO/main.c index 3d4244102..bd50f191d 100644 --- a/demos/STM32/RT-STM32L053R8-NUCLEO/main.c +++ b/demos/STM32/RT-STM32L053R8-NUCLEO/main.c @@ -52,7 +52,7 @@ int main(void) { /*
* Activates the serial driver 2 using the driver default configuration.
*/
-// sdStart(&SD2, NULL);
+ sdStart(&SD2, NULL);
/*
* Creates the blinker thread.
@@ -64,8 +64,8 @@ int main(void) { * sleeping in a loop and check the button state.
*/
while (true) {
-// if (!palReadPad(GPIOC, GPIOC_BUTTON))
-// TestThread(&SD2);
+ if (!palReadPad(GPIOC, GPIOC_BUTTON))
+ TestThread(&SD2);
chThdSleepMilliseconds(500);
}
}
diff --git a/demos/STM32/RT-STM32L053R8-NUCLEO/mcuconf.h b/demos/STM32/RT-STM32L053R8-NUCLEO/mcuconf.h index 9ed8d222b..7ed7248b6 100644 --- a/demos/STM32/RT-STM32L053R8-NUCLEO/mcuconf.h +++ b/demos/STM32/RT-STM32L053R8-NUCLEO/mcuconf.h @@ -36,5 +36,132 @@ /*
* HAL driver system settings.
*/
+#define STM32_NO_INIT FALSE
+#define STM32_VOS STM32_VOS_1P8
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
+#define STM32_HSI16_ENABLED TRUE
+#define STM32_LSI_ENABLED TRUE
+#define STM32_HSE_ENABLED FALSE
+#define STM32_LSE_ENABLED FALSE
+#define STM32_ADC_CLOCK_ENABLED TRUE
+#define STM32_USB_CLOCK_ENABLED TRUE
+#define STM32_MSIRANGE STM32_MSIRANGE_2M
+#define STM32_SW STM32_SW_PLL
+#define STM32_PLLSRC STM32_PLLSRC_HSI16
+#define STM32_PLLMUL_VALUE 4
+#define STM32_PLLDIV_VALUE 2
+#define STM32_HPRE STM32_HPRE_DIV1
+#define STM32_PPRE1 STM32_PPRE1_DIV1
+#define STM32_PPRE2 STM32_PPRE2_DIV1
+#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
+#define STM32_MCOPRE STM32_MCOPRE_DIV1
+#define STM32_RTCSEL STM32_RTCSEL_LSI
+#define STM32_RTCPRE STM32_RTCPRE_DIV2
+#define STM32_USART1SEL STM32_USART1SEL_APB
+#define STM32_USART2SEL STM32_USART2SEL_APB
+#define STM32_LPUART1SEL STM32_LPUART1SEL_APB
+#define STM32_I2C1SEL STM32_I2C1SEL_APB
+#define STM32_LPTIM1SEL STM32_LPTIM1SEL_APB
+#define STM32_HSI48SEL STM32_HSI48SEL_HSI48
+
+/*
+ * ADC driver system settings.
+ */
+#define STM32_ADC_USE_ADC1 TRUE
+#define STM32_ADC_ADC1_DMA_PRIORITY 2
+#define STM32_ADC_IRQ_PRIORITY 2
+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2
+#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
+
+/*
+ * EXT driver system settings.
+ */
+#define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3
+#define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3
+#define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3
+#define STM32_EXT_EXTI16_IRQ_PRIORITY 3
+#define STM32_EXT_EXTI17_20_IRQ_PRIORITY 3
+#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 3
+
+/*
+ * GPT driver system settings.
+ */
+#define STM32_GPT_USE_TIM2 FALSE
+#define STM32_GPT_TIM2_IRQ_PRIORITY 2
+
+/*
+ * I2C driver system settings.
+ */
+#define STM32_I2C_USE_I2C1 FALSE
+#define STM32_I2C_USE_I2C2 FALSE
+#define STM32_I2C_BUSY_TIMEOUT 50
+#define STM32_I2C_I2C1_IRQ_PRIORITY 3
+#define STM32_I2C_I2C2_IRQ_PRIORITY 3
+#define STM32_I2C_USE_DMA TRUE
+#define STM32_I2C_I2C1_DMA_PRIORITY 1
+#define STM32_I2C_I2C2_DMA_PRIORITY 1
+#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
+#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
+#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
+#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
+
+/*
+ * ICU driver system settings.
+ */
+#define STM32_ICU_USE_TIM2 FALSE
+#define STM32_ICU_TIM2_IRQ_PRIORITY 3
+
+/*
+ * PWM driver system settings.
+ */
+#define STM32_PWM_USE_ADVANCED FALSE
+#define STM32_PWM_USE_TIM2 FALSE
+#define STM32_PWM_TIM2_IRQ_PRIORITY 3
+
+/*
+ * SERIAL driver system settings.
+ */
+#define STM32_SERIAL_USE_USART1 FALSE
+#define STM32_SERIAL_USE_USART2 TRUE
+#define STM32_SERIAL_USART1_PRIORITY 3
+#define STM32_SERIAL_USART2_PRIORITY 3
+
+/*
+ * SPI driver system settings.
+ */
+#define STM32_SPI_USE_SPI1 FALSE
+#define STM32_SPI_USE_SPI2 FALSE
+#define STM32_SPI_SPI1_DMA_PRIORITY 1
+#define STM32_SPI_SPI2_DMA_PRIORITY 1
+#define STM32_SPI_SPI1_IRQ_PRIORITY 1
+#define STM32_SPI_SPI2_IRQ_PRIORITY 1
+#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
+#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
+#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
+#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
+#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
+
+/*
+ * ST driver system settings.
+ */
+#define STM32_ST_IRQ_PRIORITY 2
+#define STM32_ST_USE_TIMER 21
+
+/*
+ * UART driver system settings.
+ */
+#define STM32_UART_USE_USART1 FALSE
+#define STM32_UART_USE_USART2 FALSE
+#define STM32_UART_USART1_IRQ_PRIORITY 3
+#define STM32_UART_USART2_IRQ_PRIORITY 3
+#define STM32_UART_USART1_DMA_PRIORITY 0
+#define STM32_UART_USART2_DMA_PRIORITY 0
+#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
+#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
+#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
+#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
+#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
#endif /* _MCUCONF_H_ */
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