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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-09-16 08:18:17 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-09-16 08:18:17 +0000 |
| commit | 9bfcb80e61e0f9fe5c4ff88b9ceca02f8ed6fc03 (patch) | |
| tree | d7ee9aa92a321979f570fccd548471ed549ac4b1 /demos | |
| parent | fe2fb8757056efa555ed77277de1cc207bb01baa (diff) | |
| download | ChibiOS-9bfcb80e61e0f9fe5c4ff88b9ceca02f8ed6fc03.tar.gz ChibiOS-9bfcb80e61e0f9fe5c4ff88b9ceca02f8ed6fc03.tar.bz2 ChibiOS-9bfcb80e61e0f9fe5c4ff88b9ceca02f8ed6fc03.zip | |
Imported I2Cv3 driver in L4+ HAL.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12266 110e8d01-0319-4d1e-a829-52ad28d1bb01
Diffstat (limited to 'demos')
| -rw-r--r-- | demos/STM32/RT-STM32L4R5ZI-NUCLEO144/cfg/halconf.h | 2 | ||||
| -rw-r--r-- | demos/STM32/RT-STM32L4R5ZI-NUCLEO144/cfg/mcuconf.h | 29 |
2 files changed, 24 insertions, 7 deletions
diff --git a/demos/STM32/RT-STM32L4R5ZI-NUCLEO144/cfg/halconf.h b/demos/STM32/RT-STM32L4R5ZI-NUCLEO144/cfg/halconf.h index f33a080b9..79dea9ef3 100644 --- a/demos/STM32/RT-STM32L4R5ZI-NUCLEO144/cfg/halconf.h +++ b/demos/STM32/RT-STM32L4R5ZI-NUCLEO144/cfg/halconf.h @@ -86,7 +86,7 @@ * @brief Enables the I2C subsystem.
*/
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
-#define HAL_USE_I2C FALSE
+#define HAL_USE_I2C TRUE
#endif
/**
diff --git a/demos/STM32/RT-STM32L4R5ZI-NUCLEO144/cfg/mcuconf.h b/demos/STM32/RT-STM32L4R5ZI-NUCLEO144/cfg/mcuconf.h index 783641ead..de316fc9d 100644 --- a/demos/STM32/RT-STM32L4R5ZI-NUCLEO144/cfg/mcuconf.h +++ b/demos/STM32/RT-STM32L4R5ZI-NUCLEO144/cfg/mcuconf.h @@ -158,6 +158,23 @@ /*
* I2C driver system settings.
*/
+#define STM32_I2C_USE_I2C1 TRUE
+#define STM32_I2C_USE_I2C2 TRUE
+#define STM32_I2C_USE_I2C3 TRUE
+#define STM32_I2C_BUSY_TIMEOUT 50
+#define STM32_I2C_I2C1_RX_DMA_CHANNEL 6
+#define STM32_I2C_I2C1_TX_DMA_CHANNEL 7
+#define STM32_I2C_I2C2_RX_DMA_CHANNEL 8
+#define STM32_I2C_I2C2_TX_DMA_CHANNEL 9
+#define STM32_I2C_I2C3_RX_DMA_CHANNEL 8
+#define STM32_I2C_I2C3_TX_DMA_CHANNEL 9
+#define STM32_I2C_I2C1_IRQ_PRIORITY 5
+#define STM32_I2C_I2C2_IRQ_PRIORITY 5
+#define STM32_I2C_I2C3_IRQ_PRIORITY 5
+#define STM32_I2C_I2C1_DMA_PRIORITY 3
+#define STM32_I2C_I2C2_DMA_PRIORITY 3
+#define STM32_I2C_I2C3_DMA_PRIORITY 3
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
/*
* ICU driver system settings.
@@ -218,12 +235,12 @@ #define STM32_SPI_USE_SPI1 FALSE
#define STM32_SPI_USE_SPI2 FALSE
#define STM32_SPI_USE_SPI3 FALSE
-#define STM32_SPI_SPI1_RX_DMA_CHANNEL 10
-#define STM32_SPI_SPI1_TX_DMA_CHANNEL 11
-#define STM32_SPI_SPI2_RX_DMA_CHANNEL 12
-#define STM32_SPI_SPI2_TX_DMA_CHANNEL 13
-#define STM32_SPI_SPI3_RX_DMA_CHANNEL 10
-#define STM32_SPI_SPI3_TX_DMA_CHANNEL 11
+#define STM32_SPI_SPI1_RX_DMA_CHANNEL 0
+#define STM32_SPI_SPI1_TX_DMA_CHANNEL 1
+#define STM32_SPI_SPI2_RX_DMA_CHANNEL 2
+#define STM32_SPI_SPI2_TX_DMA_CHANNEL 3
+#define STM32_SPI_SPI3_RX_DMA_CHANNEL 4
+#define STM32_SPI_SPI3_TX_DMA_CHANNEL 5
#define STM32_SPI_SPI1_DMA_PRIORITY 1
#define STM32_SPI_SPI2_DMA_PRIORITY 1
#define STM32_SPI_SPI3_DMA_PRIORITY 1
|