diff options
| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-09-23 05:59:56 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-09-23 05:59:56 +0000 |
| commit | 8c791c84231a8966a1faf219d220642b19f082fc (patch) | |
| tree | 203b06ca0d6d20ea37027c8e209cab47e563c5ea /demos | |
| parent | 8ea6be21093d567e8ee202dda1a9158df29e5a0f (diff) | |
| download | ChibiOS-8c791c84231a8966a1faf219d220642b19f082fc.tar.gz ChibiOS-8c791c84231a8966a1faf219d220642b19f082fc.tar.bz2 ChibiOS-8c791c84231a8966a1faf219d220642b19f082fc.zip | |
Added mcuconf.h generator for L476.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12286 110e8d01-0319-4d1e-a829-52ad28d1bb01
Diffstat (limited to 'demos')
| -rw-r--r-- | demos/STM32/RT-STM32L476-DISCOVERY/cfg/mcuconf.h | 34 | ||||
| -rw-r--r-- | demos/STM32/RT-STM32L476RG-NUCLEO64/mcuconf.h | 34 | ||||
| -rw-r--r-- | demos/STM32/RT-STM32L496ZG-NUCLEO144/cfg/mcuconf.h | 2 | ||||
| -rw-r--r-- | demos/STM32/RT-STM32L4R5ZI-NUCLEO144/cfg/mcuconf.h | 1 |
4 files changed, 29 insertions, 42 deletions
diff --git a/demos/STM32/RT-STM32L476-DISCOVERY/cfg/mcuconf.h b/demos/STM32/RT-STM32L476-DISCOVERY/cfg/mcuconf.h index afc2ccee7..5d178cfee 100644 --- a/demos/STM32/RT-STM32L476-DISCOVERY/cfg/mcuconf.h +++ b/demos/STM32/RT-STM32L476-DISCOVERY/cfg/mcuconf.h @@ -14,11 +14,8 @@ limitations under the License.
*/
-#ifndef MCUCONF_H
-#define MCUCONF_H
-
/*
- * STM32L1xx drivers configuration.
+ * STM32L4xx drivers configuration.
* The following settings override the default settings present in
* the various device driver implementation headers.
* Note that the settings for each driver only have effect if the whole
@@ -31,7 +28,11 @@ * 0...3 Lowest...Highest.
*/
+#ifndef MCUCONF_H
+#define MCUCONF_H
+
#define STM32L4xx_MCUCONF
+#define STM32L476_MCUCONF
/*
* HAL driver system settings.
@@ -45,10 +46,6 @@ #define STM32_HSE_ENABLED FALSE
#define STM32_LSE_ENABLED TRUE
#define STM32_MSIPLL_ENABLED TRUE
-#define STM32_ADC_CLOCK_ENABLED TRUE
-#define STM32_USB_CLOCK_ENABLED TRUE
-#define STM32_SAI1_CLOCK_ENABLED TRUE
-#define STM32_SAI2_CLOCK_ENABLED TRUE
#define STM32_MSIRANGE STM32_MSIRANGE_4M
#define STM32_MSISRANGE STM32_MSISRANGE_4M
#define STM32_SW STM32_SW_PLL
@@ -72,6 +69,10 @@ #define STM32_PLLSAI2N_VALUE 72
#define STM32_PLLSAI2P_VALUE 7
#define STM32_PLLSAI2R_VALUE 6
+
+/*
+ * Peripherals clock sources.
+ */
#define STM32_USART1SEL STM32_USART1SEL_SYSCLK
#define STM32_USART2SEL STM32_USART2SEL_SYSCLK
#define STM32_USART3SEL STM32_USART3SEL_SYSCLK
@@ -158,9 +159,6 @@ #define STM32_GPT_USE_TIM6 FALSE
#define STM32_GPT_USE_TIM7 FALSE
#define STM32_GPT_USE_TIM8 FALSE
-#define STM32_GPT_USE_TIM15 FALSE
-#define STM32_GPT_USE_TIM16 FALSE
-#define STM32_GPT_USE_TIM17 FALSE
#define STM32_GPT_TIM1_IRQ_PRIORITY 7
#define STM32_GPT_TIM2_IRQ_PRIORITY 7
#define STM32_GPT_TIM3_IRQ_PRIORITY 7
@@ -169,9 +167,6 @@ #define STM32_GPT_TIM6_IRQ_PRIORITY 7
#define STM32_GPT_TIM7_IRQ_PRIORITY 7
#define STM32_GPT_TIM8_IRQ_PRIORITY 7
-#define STM32_GPT_TIM15_IRQ_PRIORITY 7
-#define STM32_GPT_TIM16_IRQ_PRIORITY 7
-#define STM32_GPT_TIM17_IRQ_PRIORITY 7
/*
* I2C driver system settings.
@@ -251,10 +246,14 @@ #define STM32_SERIAL_USE_USART1 FALSE
#define STM32_SERIAL_USE_USART2 TRUE
#define STM32_SERIAL_USE_USART3 FALSE
+#define STM32_SERIAL_USE_UART4 FALSE
+#define STM32_SERIAL_USE_UART5 FALSE
#define STM32_SERIAL_USE_LPUART1 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
+#define STM32_SERIAL_UART4_PRIORITY 12
+#define STM32_SERIAL_UART5_PRIORITY 12
#define STM32_SERIAL_LPUART1_PRIORITY 12
/*
@@ -291,7 +290,6 @@ #define STM32_UART_USE_USART3 FALSE
#define STM32_UART_USE_UART4 FALSE
#define STM32_UART_USE_UART5 FALSE
-#define STM32_UART_USE_LPUART1 FALSE
#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
@@ -302,8 +300,6 @@ #define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
-#define STM32_UART_LPUART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
-#define STM32_UART_LPUART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
#define STM32_UART_USART1_IRQ_PRIORITY 12
#define STM32_UART_USART2_IRQ_PRIORITY 12
#define STM32_UART_USART3_IRQ_PRIORITY 12
@@ -314,7 +310,6 @@ #define STM32_UART_USART3_DMA_PRIORITY 0
#define STM32_UART_UART4_DMA_PRIORITY 0
#define STM32_UART_UART5_DMA_PRIORITY 0
-#define STM32_UART_LPUART1_DMA_PRIORITY 0
#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
/*
@@ -323,9 +318,6 @@ #define STM32_USB_USE_OTG1 FALSE
#define STM32_USB_OTG1_IRQ_PRIORITY 14
#define STM32_USB_OTG1_RX_FIFO_SIZE 512
-#define STM32_USB_OTG_THREAD_PRIO LOWPRIO
-#define STM32_USB_OTG_THREAD_STACK_SIZE 128
-#define STM32_USB_OTGFIFO_FILL_BASEPRI 0
/*
* WDG driver system settings.
diff --git a/demos/STM32/RT-STM32L476RG-NUCLEO64/mcuconf.h b/demos/STM32/RT-STM32L476RG-NUCLEO64/mcuconf.h index b41126580..eb49bc1ee 100644 --- a/demos/STM32/RT-STM32L476RG-NUCLEO64/mcuconf.h +++ b/demos/STM32/RT-STM32L476RG-NUCLEO64/mcuconf.h @@ -14,11 +14,8 @@ limitations under the License.
*/
-#ifndef MCUCONF_H
-#define MCUCONF_H
-
/*
- * STM32L1xx drivers configuration.
+ * STM32L4xx drivers configuration.
* The following settings override the default settings present in
* the various device driver implementation headers.
* Note that the settings for each driver only have effect if the whole
@@ -31,7 +28,11 @@ * 0...3 Lowest...Highest.
*/
+#ifndef MCUCONF_H
+#define MCUCONF_H
+
#define STM32L4xx_MCUCONF
+#define STM32L476_MCUCONF
/*
* HAL driver system settings.
@@ -45,10 +46,6 @@ #define STM32_HSE_ENABLED FALSE
#define STM32_LSE_ENABLED TRUE
#define STM32_MSIPLL_ENABLED TRUE
-#define STM32_ADC_CLOCK_ENABLED TRUE
-#define STM32_USB_CLOCK_ENABLED TRUE
-#define STM32_SAI1_CLOCK_ENABLED TRUE
-#define STM32_SAI2_CLOCK_ENABLED TRUE
#define STM32_MSIRANGE STM32_MSIRANGE_4M
#define STM32_MSISRANGE STM32_MSISRANGE_4M
#define STM32_SW STM32_SW_PLL
@@ -72,6 +69,10 @@ #define STM32_PLLSAI2N_VALUE 72
#define STM32_PLLSAI2P_VALUE 7
#define STM32_PLLSAI2R_VALUE 6
+
+/*
+ * Peripherals clock sources.
+ */
#define STM32_USART1SEL STM32_USART1SEL_SYSCLK
#define STM32_USART2SEL STM32_USART2SEL_SYSCLK
#define STM32_USART3SEL STM32_USART3SEL_SYSCLK
@@ -158,9 +159,6 @@ #define STM32_GPT_USE_TIM6 FALSE
#define STM32_GPT_USE_TIM7 FALSE
#define STM32_GPT_USE_TIM8 FALSE
-#define STM32_GPT_USE_TIM15 FALSE
-#define STM32_GPT_USE_TIM16 FALSE
-#define STM32_GPT_USE_TIM17 FALSE
#define STM32_GPT_TIM1_IRQ_PRIORITY 7
#define STM32_GPT_TIM2_IRQ_PRIORITY 7
#define STM32_GPT_TIM3_IRQ_PRIORITY 7
@@ -169,9 +167,6 @@ #define STM32_GPT_TIM6_IRQ_PRIORITY 7
#define STM32_GPT_TIM7_IRQ_PRIORITY 7
#define STM32_GPT_TIM8_IRQ_PRIORITY 7
-#define STM32_GPT_TIM15_IRQ_PRIORITY 7
-#define STM32_GPT_TIM16_IRQ_PRIORITY 7
-#define STM32_GPT_TIM17_IRQ_PRIORITY 7
/*
* I2C driver system settings.
@@ -251,10 +246,14 @@ #define STM32_SERIAL_USE_USART1 FALSE
#define STM32_SERIAL_USE_USART2 TRUE
#define STM32_SERIAL_USE_USART3 FALSE
+#define STM32_SERIAL_USE_UART4 FALSE
+#define STM32_SERIAL_USE_UART5 FALSE
#define STM32_SERIAL_USE_LPUART1 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
+#define STM32_SERIAL_UART4_PRIORITY 12
+#define STM32_SERIAL_UART5_PRIORITY 12
#define STM32_SERIAL_LPUART1_PRIORITY 12
/*
@@ -291,7 +290,6 @@ #define STM32_UART_USE_USART3 FALSE
#define STM32_UART_USE_UART4 FALSE
#define STM32_UART_USE_UART5 FALSE
-#define STM32_UART_USE_LPUART1 FALSE
#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
@@ -302,8 +300,6 @@ #define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
-#define STM32_UART_LPUART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
-#define STM32_UART_LPUART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
#define STM32_UART_USART1_IRQ_PRIORITY 12
#define STM32_UART_USART2_IRQ_PRIORITY 12
#define STM32_UART_USART3_IRQ_PRIORITY 12
@@ -314,7 +310,6 @@ #define STM32_UART_USART3_DMA_PRIORITY 0
#define STM32_UART_UART4_DMA_PRIORITY 0
#define STM32_UART_UART5_DMA_PRIORITY 0
-#define STM32_UART_LPUART1_DMA_PRIORITY 0
#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
/*
@@ -323,9 +318,6 @@ #define STM32_USB_USE_OTG1 FALSE
#define STM32_USB_OTG1_IRQ_PRIORITY 14
#define STM32_USB_OTG1_RX_FIFO_SIZE 512
-#define STM32_USB_OTG_THREAD_PRIO LOWPRIO
-#define STM32_USB_OTG_THREAD_STACK_SIZE 128
-#define STM32_USB_OTGFIFO_FILL_BASEPRI 0
/*
* WDG driver system settings.
diff --git a/demos/STM32/RT-STM32L496ZG-NUCLEO144/cfg/mcuconf.h b/demos/STM32/RT-STM32L496ZG-NUCLEO144/cfg/mcuconf.h index 813b03521..dfc9404e0 100644 --- a/demos/STM32/RT-STM32L496ZG-NUCLEO144/cfg/mcuconf.h +++ b/demos/STM32/RT-STM32L496ZG-NUCLEO144/cfg/mcuconf.h @@ -125,6 +125,8 @@ #define STM32_ADC_ADC1_DMA_PRIORITY 2
#define STM32_ADC_ADC2_DMA_PRIORITY 2
#define STM32_ADC_ADC3_DMA_PRIORITY 2
+#define STM32_ADC_ADC12_IRQ_PRIORITY 5
+#define STM32_ADC_ADC3_IRQ_PRIORITY 5
#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5
#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5
#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5
diff --git a/demos/STM32/RT-STM32L4R5ZI-NUCLEO144/cfg/mcuconf.h b/demos/STM32/RT-STM32L4R5ZI-NUCLEO144/cfg/mcuconf.h index a55f79559..9ab408894 100644 --- a/demos/STM32/RT-STM32L4R5ZI-NUCLEO144/cfg/mcuconf.h +++ b/demos/STM32/RT-STM32L4R5ZI-NUCLEO144/cfg/mcuconf.h @@ -123,6 +123,7 @@ #define STM32_ADC_USE_ADC1 FALSE
#define STM32_ADC_ADC1_DMA_CHANNEL 10
#define STM32_ADC_ADC1_DMA_PRIORITY 2
+#define STM32_ADC_ADC12_IRQ_PRIORITY 5
#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5
#define STM32_ADC_ADC123_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV2
|