diff options
| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2009-11-14 14:57:32 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2009-11-14 14:57:32 +0000 |
| commit | 0da2b9d0d87312b9fd50f368689be8f870055542 (patch) | |
| tree | df18c81a1eedd89b8ba993d42b43540c70bf1b49 /demos | |
| parent | 174b6a1ba2483ab226bb8e7279f9a3b6535be308 (diff) | |
| download | ChibiOS-0da2b9d0d87312b9fd50f368689be8f870055542.tar.gz ChibiOS-0da2b9d0d87312b9fd50f368689be8f870055542.tar.bz2 ChibiOS-0da2b9d0d87312b9fd50f368689be8f870055542.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1291 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'demos')
| -rw-r--r-- | demos/ARMCM3-STM32F103-FATFS-GCC/Makefile | 206 | ||||
| -rw-r--r-- | demos/ARMCM3-STM32F103-FATFS-GCC/board.c | 127 | ||||
| -rw-r--r-- | demos/ARMCM3-STM32F103-FATFS-GCC/board.h | 119 | ||||
| -rw-r--r-- | demos/ARMCM3-STM32F103-FATFS-GCC/ch.ld | 94 | ||||
| -rw-r--r-- | demos/ARMCM3-STM32F103-FATFS-GCC/chconf.h | 464 | ||||
| -rw-r--r-- | demos/ARMCM3-STM32F103-FATFS-GCC/main.c | 163 | ||||
| -rw-r--r-- | demos/ARMCM3-STM32F103-FATFS-GCC/readme.txt | 28 | ||||
| -rw-r--r-- | demos/ARMCM3-STM32F103-GCC/readme.txt | 10 |
8 files changed, 1205 insertions, 6 deletions
diff --git a/demos/ARMCM3-STM32F103-FATFS-GCC/Makefile b/demos/ARMCM3-STM32F103-FATFS-GCC/Makefile new file mode 100644 index 000000000..85a8880f1 --- /dev/null +++ b/demos/ARMCM3-STM32F103-FATFS-GCC/Makefile @@ -0,0 +1,206 @@ +##############################################################################
+# Build global options
+# NOTE: Can be overridden externally.
+#
+
+# Compiler options here.
+ifeq ($(USE_OPT),)
+ USE_OPT = -O0 -ggdb -fomit-frame-pointer -mabi=apcs-gnu -falign-functions=16
+endif
+
+# C++ specific options here (added to USE_OPT).
+ifeq ($(USE_CPPOPT),)
+ USE_CPPOPT = -fno-rtti
+endif
+
+# Enable this if you want the linker to remove unused code and data
+ifeq ($(USE_LINK_GC),)
+ USE_LINK_GC = yes
+endif
+
+# If enabled, this option allows to compile the application in THUMB mode.
+ifeq ($(USE_THUMB),)
+ USE_THUMB = yes
+endif
+
+# Enable register caching optimization (read documentation).
+ifeq ($(USE_CURRP_CACHING),)
+ USE_CURRP_CACHING = no
+endif
+
+#
+# Build global options
+##############################################################################
+
+##############################################################################
+# Architecture or project specific options
+#
+
+# Enable this if you really want to use the STM FWLib.
+ifeq ($(USE_FWLIB),)
+ USE_FWLIB = no
+endif
+
+#
+# Architecture or project specific options
+##############################################################################
+
+##############################################################################
+# Project, sources and paths
+#
+
+# Define project name here
+PROJECT = ch
+
+# Define linker script file here
+LDSCRIPT= ch.ld
+
+# Imported source files
+CHIBIOS = ../..
+include ${CHIBIOS}/os/ports/GCC/ARMCM3/port.mk
+include ${CHIBIOS}/os/kernel/kernel.mk
+include ${CHIBIOS}/test/test.mk
+
+# C sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CSRC = ${PORTSRC} \
+ ${KERNSRC} \
+ ${TESTSRC} \
+ ${CHIBIOS}/os/io/pal.c \
+ ${CHIBIOS}/os/io/serial.c \
+ ${CHIBIOS}/os/io/spi.c \
+ ${CHIBIOS}/os/io/mmc_spi.c \
+ ${CHIBIOS}/os/io/platforms/STM32/pal_lld.c \
+ ${CHIBIOS}/os/io/platforms/STM32/serial_lld.c \
+ ${CHIBIOS}/os/io/platforms/STM32/spi_lld.c \
+ ${CHIBIOS}/os/io/platforms/STM32/stm32_dma.c \
+ ${CHIBIOS}/os/various/evtimer.c \
+ board.c main.c +
+# C++ sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CPPSRC =
+
+# C sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+ACSRC =
+
+# C++ sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+ACPPSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+TCSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+TCPPSRC =
+
+# List ASM source files here
+ASMSRC = $(PORTASM) \
+ ${CHIBIOS}/os/ports/GCC/ARMCM3/STM32F103/vectors.s
+
+INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
+ ${CHIBIOS}/os/io \
+ ${CHIBIOS}/os/io/platforms/STM32 \
+ ${CHIBIOS}/os/various
+
+#
+# Project, sources and paths
+##############################################################################
+
+##############################################################################
+# Compiler settings
+#
+
+MCU = cortex-m3
+
+TRGT = arm-elf-
+CC = $(TRGT)gcc
+CPPC = $(TRGT)g++
+# Enable loading with g++ only if you need C++ runtime support.
+# NOTE: You can use C++ even without C++ support if you are careful. C++
+# runtime support makes code size explode.
+LD = $(TRGT)gcc
+#LD = $(TRGT)g++
+CP = $(TRGT)objcopy
+AS = $(TRGT)gcc -x assembler-with-cpp
+OD = $(TRGT)objdump
+HEX = $(CP) -O ihex
+BIN = $(CP) -O binary
+
+# ARM-specific options here
+AOPT =
+
+# THUMB-specific options here
+TOPT = -mthumb -DTHUMB
+
+# Define C warning options here
+CWARN = -Wall -Wextra -Wstrict-prototypes
+
+# Define C++ warning options here
+CPPWARN = -Wall -Wextra
+
+#
+# Compiler settings
+##############################################################################
+
+##############################################################################
+# Start of default section
+#
+
+# List all default C defines here, like -D_DEBUG=1
+DDEFS =
+
+# List all default ASM defines here, like -D_DEBUG=1
+DADEFS =
+
+# List all default directories to look for include files here
+DINCDIR =
+
+# List the default directory to look for the libraries here
+DLIBDIR =
+
+# List all default libraries here
+DLIBS =
+
+#
+# End of default section
+##############################################################################
+
+##############################################################################
+# Start of user section
+#
+
+# List all user C define here, like -D_DEBUG=1
+UDEFS =
+
+# Define ASM defines here
+UADEFS =
+
+# List all user directories here
+UINCDIR =
+
+# List the user directory to look for the libraries here
+ULIBDIR =
+
+# List all user libraries here
+ULIBS =
+
+#
+# End of user defines
+##############################################################################
+
+ifeq ($(USE_FWLIB),yes)
+ include ${CHIBIOS}/ext/stm32lib/stm32lib.mk
+ CSRC += ${STM32SRC}
+ INCDIR += ${STM32INC}
+ USE_OPT += -DUSE_STDPERIPH_DRIVER
+endif
+
+include ${CHIBIOS}/os/ports/GCC/ARM/rules.mk
diff --git a/demos/ARMCM3-STM32F103-FATFS-GCC/board.c b/demos/ARMCM3-STM32F103-FATFS-GCC/board.c new file mode 100644 index 000000000..bc384a544 --- /dev/null +++ b/demos/ARMCM3-STM32F103-FATFS-GCC/board.c @@ -0,0 +1,127 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#include <ch.h>
+#include <pal.h>
+#include <serial.h>
+#include <spi.h>
+#include <mmc_spi.h>
+#include <stm32_dma.h>
+#include <nvic.h>
+
+#include "board.h"
+
+#define AIRCR_VECTKEY 0x05FA0000
+
+/*
+ * Digital I/O ports static configuration as defined in @p board.h.
+ */
+static const STM32GPIOConfig pal_config =
+{
+ {VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},
+ {VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
+ {VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
+ {VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
+#if !defined(STM32F10X_LD)
+ {VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
+#endif
+#if defined(STM32F10X_HD)
+ {VAL_GPIOFODR, VAL_GPIOFCRL, VAL_GPIOFCRH},
+ {VAL_GPIOGODR, VAL_GPIOGCRL, VAL_GPIOGCRH},
+#endif
+};
+
+/*
+ * Early initialization code.
+ * This initialization is performed just after reset before BSS and DATA
+ * segments initialization.
+ */
+void hwinit0(void) {
+
+ /*
+ * Clocks and PLL initialization.
+ */
+ // HSI setup.
+ RCC->CR = RCC_CR_HSITRIM_RESET_BITS | RCC_CR_HSION;
+ while (!(RCC->CR & RCC_CR_HSIRDY))
+ ; // Waits until HSI stable, it should already be.
+ // HSE setup.
+ RCC->CR |= RCC_CR_HSEON;
+ while (!(RCC->CR & RCC_CR_HSERDY))
+ ; // Waits until HSE stable.
+ // PLL setup.
+ RCC->CFGR = RCC_CFGR_PLLSRC_HSE_BITS | PLLPREBITS | PLLMULBITS;
+ RCC->CR |= RCC_CR_PLLON;
+ while (!(RCC->CR & RCC_CR_PLLRDY))
+ ; // Waits until PLL stable.
+ // Clock sources.
+ RCC->CFGR |= RCC_CFGR_HPRE_DIV1 | RCC_CFGR_PPRE1_DIV2 |
+ RCC_CFGR_PPRE2_DIV2 | RCC_CFGR_ADCPRE_DIV8 |
+ RCC_CFGR_MCO_NOCLOCK | USBPREBITS;
+
+ /*
+ * Flash setup and final clock selection.
+ */
+ FLASH->ACR = FLASHBITS; // Flash wait states depending on clock.
+ RCC->CFGR |= RCC_CFGR_SW_PLL; // Switches on the PLL clock.
+ while ((RCC->CFGR & RCC_CFGR_SW) != RCC_CFGR_SW_PLL)
+ ;
+
+ /*
+ * I/O ports initialization as specified in board.h.
+ */
+ palInit(&pal_config);
+}
+
+/*
+ * Late initialization code.
+ * This initialization is performed after BSS and DATA segments initialization
+ * and before invoking the main() function.
+ */
+void hwinit1(void) {
+
+ /*
+ * NVIC/SCB initialization.
+ * Note: PRIGROUP 4:0 (4:4).
+ */
+ SCB->AIRCR = AIRCR_VECTKEY | SCB_AIRCR_PRIGROUP_0 | SCB_AIRCR_PRIGROUP_1;
+ NVICSetSystemHandlerPriority(HANDLER_SVCALL, PRIORITY_SVCALL);
+ NVICSetSystemHandlerPriority(HANDLER_SYSTICK, PRIORITY_SYSTICK);
+ NVICSetSystemHandlerPriority(HANDLER_PENDSV, PRIORITY_PENDSV);
+
+ /*
+ * SysTick initialization.
+ */
+ SysTick->LOAD = SYSCLK / (8000000 / CH_FREQUENCY) - 1;
+ SysTick->VAL = 0;
+ SysTick->CTRL = SysTick_CTRL_ENABLE | SysTick_CTRL_TICKINT;
+
+ /*
+ * Other subsystems initialization.
+ */
+ dmaInit();
+ sdInit();
+ spiInit();
+ mmcInit();
+
+ /*
+ * ChibiOS/RT initialization.
+ */
+ chSysInit();
+}
diff --git a/demos/ARMCM3-STM32F103-FATFS-GCC/board.h b/demos/ARMCM3-STM32F103-FATFS-GCC/board.h new file mode 100644 index 000000000..0f53e5b0e --- /dev/null +++ b/demos/ARMCM3-STM32F103-FATFS-GCC/board.h @@ -0,0 +1,119 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+/*
+ * Tricks required to make the TRUE/FALSE declaration inside the library
+ * compatible. + */
+#undef FALSE
+#undef TRUE
+#include <stm32f10x.h>
+#define FALSE 0
+#define TRUE (!FALSE)
+
+/*
+ * Uncomment this if you want a 48MHz system clock, else it will be 72MHz.
+ */
+//#define SYSCLK_48
+
+/*
+ * NOTES: PLLPRE can be 1 or 2, PLLMUL can be 2..16.
+ */
+#define LSECLK 32768
+#define HSECLK 8000000
+#define HSICLK 8000000
+#define PLLPRE 1
+#ifdef SYSCLK_48
+ #define PLLMUL 6
+#else
+ #define PLLMUL 9
+#endif
+#define PLLCLK ((HSECLK / PLLPRE) * PLLMUL)
+#define SYSCLK PLLCLK
+#define APB1CLK (SYSCLK / 2)
+#define APB2CLK (SYSCLK / 2)
+#define AHB1CLK (SYSCLK / 1)
+
+/*
+ * Values derived from the clock settings.
+ */
+#define PLLPREBITS ((PLLPRE - 1) << 17)
+#define PLLMULBITS ((PLLMUL - 2) << 18)
+#ifdef SYSCLK_48
+ #define USBPREBITS RCC_CFGR_USBPRE_DIV1_BITS
+ #define FLASHBITS 0x00000011
+#else
+ #define USBPREBITS RCC_CFGR_USBPRE_DIV1P5_BITS
+ #define FLASHBITS 0x00000012
+#endif
+
+/*
+ * Extra definitions for RCC_CR register (missing from the ST header file).
+ */
+#define RCC_CR_HSITRIM_RESET_BITS (0x10 << 3)
+
+/*
+ * Extra definitions for RCC_CFGR register (missing from the ST header file).
+ */
+#define RCC_CFGR_PLLSRC_HSI_BITS (0 << 16)
+#define RCC_CFGR_PLLSRC_HSE_BITS (1 << 16)
+#define RCC_CFGR_USBPRE_DIV1P5_BITS (0 << 22)
+#define RCC_CFGR_USBPRE_DIV1_BITS (1 << 22)
+
+/*
+ * IO pins assignments.
+ */
+#define GPIOA_BUTTON 0
+#define GPIOA_SPI1NSS 4
+
+#define GPIOB_SPI2NSS 12
+
+#define GPIOC_MMCWP 6
+#define GPIOC_MMCCP 7
+#define GPIOC_CANCNTL 10
+#define GPIOC_DISC 11
+#define GPIOC_LED 12
+
+/*
+ * All inputs with pullups unless otherwise specified.
+ */
+#define VAL_GPIOACRL 0x88888884 // PA0:FI
+#define VAL_GPIOACRH 0x88888888
+#define VAL_GPIOAODR 0xFFFFFFFF
+
+#define VAL_GPIOBCRL 0x88883888 // PB3:PP
+#define VAL_GPIOBCRH 0x88888888
+#define VAL_GPIOBODR 0xFFFFFFFF
+
+#define VAL_GPIOCCRL 0x44888888 // PC6,PC7:FI
+#define VAL_GPIOCCRH 0x88833888 // PC11,PC12:PP
+#define VAL_GPIOCODR 0xFFFFFFFF
+
+#define VAL_GPIODCRL 0x88888844 // PD0,PD1:FI
+#define VAL_GPIODCRH 0x88888888
+#define VAL_GPIODODR 0xFFFFFFFF
+
+#define VAL_GPIOECRL 0x88888888
+#define VAL_GPIOECRH 0x88888888
+#define VAL_GPIOEODR 0xFFFFFFFF
+
+#endif /* _BOARD_H_ */
diff --git a/demos/ARMCM3-STM32F103-FATFS-GCC/ch.ld b/demos/ARMCM3-STM32F103-FATFS-GCC/ch.ld new file mode 100644 index 000000000..9d18539f8 --- /dev/null +++ b/demos/ARMCM3-STM32F103-FATFS-GCC/ch.ld @@ -0,0 +1,94 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/*
+ * ST32F103 memory setup.
+ */
+__main_stack_size__ = 0x0400;
+__process_stack_size__ = 0x0400;
+__stacks_total_size__ = __main_stack_size__ + __process_stack_size__;
+
+MEMORY
+{
+ flash : org = 0x08000000, len = 128k
+ ram : org = 0x20000000, len = 20k
+}
+
+__ram_start__ = ORIGIN(ram);
+__ram_size__ = LENGTH(ram);
+__ram_end__ = __ram_start__ + __ram_size__;
+
+SECTIONS
+{
+ . = 0;
+
+ .text : ALIGN(16) SUBALIGN(16)
+ {
+ _text = .;
+ KEEP(*(vectors));
+ *(.text)
+ *(.text.*);
+ *(.rodata);
+ *(.rodata.*);
+ *(.glue_7t);
+ *(.glue_7);
+ *(.gcc*);
+ *(.ctors);
+ *(.dtors);
+ . = ALIGN(4);
+ _etext = .;
+ } > flash
+
+ _textdata = _etext;
+
+ .data :
+ {
+ _data = .;
+ *(.data)
+ . = ALIGN(4);
+ *(.data.*)
+ . = ALIGN(4);
+ *(.ramtext)
+ . = ALIGN(4);
+ _edata = .;
+ } > ram AT > flash
+
+ .bss :
+ {
+ _bss_start = .;
+ *(.bss)
+ . = ALIGN(4);
+ *(.bss.*)
+ . = ALIGN(4);
+ *(COMMON)
+ . = ALIGN(4);
+ _bss_end = .;
+ } > ram
+
+ /DISCARD/ :
+ {
+ *(.eh_*)
+ }
+}
+
+PROVIDE(end = .);
+_end = .;
+
+__heap_base__ = _end;
+__heap_end__ = __ram_end__ - __stacks_total_size__;
diff --git a/demos/ARMCM3-STM32F103-FATFS-GCC/chconf.h b/demos/ARMCM3-STM32F103-FATFS-GCC/chconf.h new file mode 100644 index 000000000..31c3c7a50 --- /dev/null +++ b/demos/ARMCM3-STM32F103-FATFS-GCC/chconf.h @@ -0,0 +1,464 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file templates/chconf.h
+ * @brief Configuration file template.
+ * @addtogroup config
+ * @{
+ */
+
+#ifndef _CHCONF_H_
+#define _CHCONF_H_
+
+/*===========================================================================*/
+/* Kernel parameters. */
+/*===========================================================================*/
+
+/**
+ * @brief System tick frequency.
+ * @details Frequency of the system timer that drives the system ticks. This
+ * setting also defines the system tick time unit.
+ */
+#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__)
+#define CH_FREQUENCY 1000
+#endif
+
+/**
+ * @brief Round robin interval.
+ * @details This constant is the number of system ticks allowed for the
+ * threads before preemption occurs. Setting this value to zero
+ * disables the round robin mechanism.
+ *
+ * @note Disabling round robin makes the kernel more compact and generally
+ * faster but forbids multiple threads at the same priority level.
+ */
+#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__)
+#define CH_TIME_QUANTUM 20
+#endif
+
+/**
+ * @brief Nested locks.
+ * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock()
+ * operations is allowed.<br>
+ * For performance and code size reasons the recommended setting
+ * is to leave this option disabled.<br>
+ * You may use this option if you need to merge ChibiOS/RT with
+ * external libraries that require nested lock/unlock operations.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__)
+#define CH_USE_NESTED_LOCKS FALSE
+#endif
+
+/**
+ * @brief Managed RAM size.
+ * @details Size of the RAM area to be managed by the OS. If set to zero
+ * then the whole available RAM is used. The core memory is made
+ * available to the heap allocator and/or can be used directly through
+ * the simplified core memory allocator.
+ *
+ * @note In order to let the OS manage the whole RAM the linker script must
+ * provide the @p __heap_base__ and @p __heap_end__ symbols.
+ * @note Requires @p CH_USE_COREMEM.
+ */
+#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__)
+#define CH_MEMCORE_SIZE 0
+#endif
+
+/*===========================================================================*/
+/* Performance options. */
+/*===========================================================================*/
+
+/**
+ * @brief OS optimization.
+ * @details If enabled then time efficient rather than space efficient code
+ * is used when two possible implementations exist.
+ *
+ * @note This is not related to the compiler optimization options.
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)
+#define CH_OPTIMIZE_SPEED TRUE
+#endif
+
+/**
+ * @brief Exotic optimization.
+ * @details If defined then a CPU register is used as storage for the global
+ * @p currp variable. Caching this variable in a register greatly
+ * improves both space and time OS efficiency. A side effect is that
+ * one less register has to be saved during the context switch
+ * resulting in lower RAM usage and faster context switch.
+ *
+ * @note This option is only usable with the GCC compiler and is only useful
+ * on processors with many registers like ARM cores.
+ * @note If this option is enabled then ALL the libraries linked to the
+ * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
+ * -ffixed-@<reg@>.
+ * @note This option must be enabled in the Makefile, it is listed here for
+ * documentation only.
+ */
+#if defined(__DOXYGEN__)
+#define CH_CURRP_REGISTER_CACHE "reg"
+#endif
+
+/*===========================================================================*/
+/* Subsystem options. */
+/*===========================================================================*/
+
+/**
+ * @brief Threads synchronization APIs.
+ * @details If enabled then the @p chThdWait() function is included in
+ * the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__)
+#define CH_USE_WAITEXIT TRUE
+#endif
+
+/**
+ * @brief Semaphores APIs.
+ * @details If enabled then the Semaphores APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__)
+#define CH_USE_SEMAPHORES TRUE
+#endif
+
+/**
+ * @brief Semaphores queuing mode.
+ * @details If enabled then the threads are enqueued on semaphores by
+ * priority rather than in FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special requirements.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__)
+#define CH_USE_SEMAPHORES_PRIORITY FALSE
+#endif
+
+/**
+ * @brief Atomic semaphore API.
+ * @details If enabled then the semaphores the @p chSemWaitSignal() API
+ * is included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__)
+#define CH_USE_SEMSW TRUE
+#endif
+
+/**
+ * @brief Mutexes APIs.
+ * @details If enabled then the mutexes APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__)
+#define CH_USE_MUTEXES TRUE
+#endif
+
+/**
+ * @brief Conditional Variables APIs.
+ * @details If enabled then the conditional variables APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_MUTEXES.
+ */
+#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__)
+#define CH_USE_CONDVARS TRUE
+#endif
+
+/**
+ * @brief Conditional Variables APIs with timeout.
+ * @details If enabled then the conditional variables APIs with timeout
+ * specification are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_CONDVARS.
+ */
+#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__)
+#define CH_USE_CONDVARS_TIMEOUT TRUE
+#endif
+
+/**
+ * @brief Events Flags APIs.
+ * @details If enabled then the event flags APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__)
+#define CH_USE_EVENTS TRUE
+#endif
+
+/**
+ * @brief Events Flags APIs with timeout.
+ * @details If enabled then the events APIs with timeout specification
+ * are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_EVENTS.
+ */
+#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__)
+#define CH_USE_EVENTS_TIMEOUT TRUE
+#endif
+
+/**
+ * @brief Synchronous Messages APIs.
+ * @details If enabled then the synchronous messages APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__)
+#define CH_USE_MESSAGES TRUE
+#endif
+
+/**
+ * @brief Synchronous Messages queuing mode.
+ * @details If enabled then messages are served by priority rather than in
+ * FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special requirements.
+ * @note Requires @p CH_USE_MESSAGES.
+ */
+#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__)
+#define CH_USE_MESSAGES_PRIORITY FALSE
+#endif
+
+/**
+ * @brief Mailboxes APIs.
+ * @details If enabled then the asynchronous messages (mailboxes) APIs are
+ * included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__)
+#define CH_USE_MAILBOXES TRUE
+#endif
+
+/**
+ * @brief I/O Queues APIs.
+ * @details If enabled then the I/O queues APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__)
+#define CH_USE_QUEUES TRUE
+#endif
+
+/**
+ * @brief Core Memory Manager APIs.
+ * @details If enabled then the core memory manager APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__)
+#define CH_USE_MEMCORE TRUE
+#endif
+
+/**
+ * @brief Heap Allocator APIs.
+ * @details If enabled then the memory heap allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or
+ * @p CH_USE_SEMAPHORES.
+ * @note Mutexes are recommended.
+ */
+#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__)
+#define CH_USE_HEAP TRUE
+#endif
+
+/**
+ * @brief C-runtime allocator.
+ * @details If enabled the the heap allocator APIs just wrap the C-runtime
+ * @p malloc() and @p free() functions.
+ *
+ * @note The default is @p FALSE.
+ * @note Requires @p CH_USE_HEAP.
+ * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the
+ * appropriate documentation.
+ */
+#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__)
+#define CH_USE_MALLOC_HEAP FALSE
+#endif
+
+/**
+ * @brief Memory Pools Allocator APIs.
+ * @details If enabled then the memory pools allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__)
+#define CH_USE_MEMPOOLS TRUE
+#endif
+
+/**
+ * @brief Dynamic Threads APIs.
+ * @details If enabled then the dynamic threads creation APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_WAITEXIT.
+ */
+#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__)
+#define CH_USE_DYNAMIC TRUE
+#endif
+
+/*===========================================================================*/
+/* Debug options. */
+/*===========================================================================*/
+
+/**
+ * @brief Debug option, parameters checks.
+ * @details If enabled then the checks on the API functions input
+ * parameters are activated.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_CHECKS FALSE
+#endif
+
+/**
+ * @brief Debug option, consistency checks.
+ * @details If enabled then all the assertions in the kernel code are
+ * activated. This includes consistency checks inside the kernel,
+ * runtime anomalies and port-defined checks.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_ASSERTS FALSE
+#endif
+
+/**
+ * @brief Debug option, trace buffer.
+ * @details If enabled then the context switch circular trace buffer is
+ * activated.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_TRACE FALSE
+#endif
+
+/**
+ * @brief Debug option, stack checks.
+ * @details If enabled then a runtime stack check is performed.
+ *
+ * @note The default is @p FALSE.
+ * @note The stack check is performed in a architecture/port dependent way. It
+ * may not be implemented or some ports.
+ */
+#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_STACK_CHECK FALSE
+#endif
+
+/**
+ * @brief Debug option, stacks initialization.
+ * @details If enabled then the threads working area is filled with a byte
+ * value when a thread is created. This can be useful for the
+ * runtime measurement of the used stack. + *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
+#define CH_DBG_FILL_THREADS FALSE
+#endif
+
+/**
+ * @brief Debug option, threads profiling.
+ * @details If enabled then a field is added to the @p Thread structure that
+ * counts the system ticks occurred while executing the thread.
+ *
+ * @note The default is @p TRUE.
+ * @note This debug option is defaulted to TRUE because it is required by
+ * some test cases into the test suite.
+ */
+#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)
+#define CH_DBG_THREADS_PROFILING TRUE
+#endif
+
+/*===========================================================================*/
+/* Kernel hooks. */
+/*===========================================================================*/
+
+/**
+ * @brief Threads descriptor structure hook.
+ * @details User fields added to the end of the @p Thread structure.
+ */
+#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__)
+#define THREAD_EXT_FIELDS \
+struct { \
+ /* Add threads custom fields here.*/ \
+};
+#endif
+
+/**
+ * @brief Threads initialization hook.
+ * @details User initialization code added to the @p chThdInit() API.
+ *
+ * @note It is invoked from within @p chThdInit() and implicitily from all
+ * the threads creation APIs.
+ */
+#if !defined(THREAD_EXT_INIT) || defined(__DOXYGEN__)
+#define THREAD_EXT_INIT(tp) { \
+ /* Add threads initialization code here.*/ \
+}
+#endif
+
+/**
+ * @brief Threads finalization hook.
+ * @details User finalization code added to the @p chThdExit() API.
+ *
+ * @note It is inserted into lock zone.
+ * @note It is also invoked when the threads simply return in order to
+ * terminate.
+ */
+#if !defined(THREAD_EXT_EXIT) || defined(__DOXYGEN__)
+#define THREAD_EXT_EXIT(tp) { \
+ /* Add threads finalization code here.*/ \
+}
+#endif
+
+/**
+ * @brief Idle Loop hook.
+ * @details This hook is continuously invoked by the idle thread loop.
+ */
+#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__)
+#define IDLE_LOOP_HOOK() { \
+ /* Idle loop code here.*/ \
+}
+#endif
+
+#endif /* _CHCONF_H_ */
+
+/** @} */
diff --git a/demos/ARMCM3-STM32F103-FATFS-GCC/main.c b/demos/ARMCM3-STM32F103-FATFS-GCC/main.c new file mode 100644 index 000000000..914eea1e2 --- /dev/null +++ b/demos/ARMCM3-STM32F103-FATFS-GCC/main.c @@ -0,0 +1,163 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#include <ch.h>
+#include <pal.h>
+#include <serial.h>
+#include <spi.h>
+#include <mmc_spi.h>
+#include <evtimer.h>
+#include <test.h>
+
+#include "board.h"
+
+/*
+ * Maximum speed SPI configuration (18MHz, CPHA=0, CPOL=0, MSb first). + */
+static SPIConfig hs_spicfg = {
+ IOPORT2, GPIOB_SPI2NSS, 0
+};
+
+/*
+ * Low speed SPI configuration (281.250KHz, CPHA=0, CPOL=0, MSb first).
+ */
+static SPIConfig ls_spicfg = {
+ IOPORT2, GPIOB_SPI2NSS, SPI_CR1_BR_2 | SPI_CR1_BR_1
+};
+
+/*
+ * MMC driver instance. + */
+static MMCDriver MMCD1;
+
+/*
+ * MMC configuration (empty). + */
+static const MMCConfig mmc_cfg = {};
+
+/*
+ * Card insertion verification. + */
+static bool_t mmc_is_inserted(void) {
+
+ return (bool_t)palReadPad(IOPORT3, GPIOC_MMCCP);
+}
+
+/*
+ * Card protection verification. + */
+static bool_t mmc_is_protected(void) {
+
+ return (bool_t)palReadPad(IOPORT3, GPIOC_MMCWP);
+}
+
+/*
+ * Red LEDs blinker thread, times are in milliseconds.
+ */
+static WORKING_AREA(waThread1, 512);
+static msg_t Thread1(void *arg) {
+
+ (void)arg;
+ while (TRUE) {
+ palClearPad(IOPORT3, GPIOC_LED);
+ chThdSleepMilliseconds(500);
+ palSetPad(IOPORT3, GPIOC_LED);
+ chThdSleepMilliseconds(500);
+ }
+ return 0;
+}
+
+/*
+ * Executed as event handler at 500mS intervals.
+ */
+static void TimerHandler(eventid_t id) {
+
+ (void)id;
+ if (palReadPad(IOPORT1, GPIOA_BUTTON))
+ TestThread(&SD2);
+}
+
+/*
+ * MMC card insertion event.
+ */
+static void InsertHandler(eventid_t id) {
+
+ (void)id;
+ mmcConnect(&MMCD1);
+}
+
+/*
+ * MMC card removal event.
+ */
+static void RemoveHandler(eventid_t id) {
+
+ (void)id;
+}
+
+/*
+ * Entry point, note, the main() function is already a thread in the system
+ * on entry.
+ */
+int main(int argc, char **argv) {
+ static const evhandler_t evhndl[] = {
+ TimerHandler,
+ InsertHandler,
+ RemoveHandler
+ };
+ static EvTimer evt;
+ struct EventListener el0, el1, el2;
+
+ (void)argc;
+ (void)argv;
+
+ /*
+ * Activates the serial driver 2 using the driver default configuration.
+ */
+ sdStart(&SD2, NULL);
+
+ /*
+ * Initializes the MMC driver to work with SPI2. + */
+ palSetPadMode(IOPORT2, GPIOB_SPI2NSS, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPad(IOPORT2, GPIOB_SPI2NSS);
+ mmcObjectInit(&MMCD1, &SPID2,
+ &ls_spicfg, &hs_spicfg,
+ mmc_is_protected, mmc_is_inserted);
+ mmcStart(&MMCD1, &mmc_cfg);
+
+ /*
+ * Creates the blinker thread.
+ */
+ chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
+
+// spiStop(&SPID1);
+
+ /*
+ * Normal main() thread activity, in this demo it does nothing except
+ * sleeping in a loop and listed for events.
+ */
+ evtInit(&evt, MS2ST(500)); /* Initializes an event timer object. */
+ evtStart(&evt); /* Starts the event timer. */
+ chEvtRegister(&evt.et_es, &el0, 0); /* Registers on the timer event source. */
+ chEvtRegister(&MMCD1.mmc_inserted_event, &el1, 1);
+ chEvtRegister(&MMCD1.mmc_removed_event, &el2, 2);
+ while (TRUE)
+ chEvtDispatch(evhndl, chEvtWaitOne(ALL_EVENTS));
+ return 0;
+}
diff --git a/demos/ARMCM3-STM32F103-FATFS-GCC/readme.txt b/demos/ARMCM3-STM32F103-FATFS-GCC/readme.txt new file mode 100644 index 000000000..09f544035 --- /dev/null +++ b/demos/ARMCM3-STM32F103-FATFS-GCC/readme.txt @@ -0,0 +1,28 @@ +*****************************************************************************
+** ChibiOS/RT port for ARM-Cortex-M3 STM32F103. **
+*****************************************************************************
+
+** TARGET **
+
+The demo will on an Olimex STM32-P103 board.
+
+** The Demo **
+
+The demo flashes the board LED using a thread, by pressing the button located
+on the board the test procedure is activated with output on the serial port
+COM2 (USART2).
+
+** Build Procedure **
+
+The demo has been tested by using the free Codesourcery GCC-based toolchain,
+YAGARTO and an experimental WinARM build including GCC 4.3.0.
+Just modify the TRGT line in the makefile in order to use different GCC ports.
+
+** Notes **
+
+Some files used by the demo are not part of ChibiOS/RT but are copyright of
+ST Microelectronics and are licensed under a different license.
+Also note that not all the files present in the ST library are distributed
+with ChibiOS/RT, you can find the whole library on the ST web site:
+
+ http://www.st.com
diff --git a/demos/ARMCM3-STM32F103-GCC/readme.txt b/demos/ARMCM3-STM32F103-GCC/readme.txt index ad3390656..353dd2658 100644 --- a/demos/ARMCM3-STM32F103-GCC/readme.txt +++ b/demos/ARMCM3-STM32F103-GCC/readme.txt @@ -14,17 +14,15 @@ COM2 (USART2). ** Build Procedure **
-The demo was tested by using the free Codesourcery GCC-based toolchain,
-YAGARTO 4.3.2 and an experimental WinARM build including GCC 4.3.0.
+The demo has been tested by using the free Codesourcery GCC-based toolchain,
+YAGARTO and an experimental WinARM build including GCC 4.3.0.
Just modify the TRGT line in the makefile in order to use different GCC ports.
** Notes **
Some files used by the demo are not part of ChibiOS/RT but are copyright of
-ST Microelectronics and are licensed under a different license, see the header
-present in all the source files under ./demos/ARMCM3-STM32F103/stm32lib for
-details.
-Also note that not all the files present in the ST library are distribuited
+ST Microelectronics and are licensed under a different license.
+Also note that not all the files present in the ST library are distribited
with ChibiOS/RT, you can find the whole library on the ST web site:
http://www.st.com
|