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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-11-13 16:30:30 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-11-13 16:30:30 +0000 |
| commit | ea4c40fc0d505326ff40fd0b9e5560120b85779b (patch) | |
| tree | e291e3b88083d4da88f290f913fbf0661316e02c /demos/STM32 | |
| parent | 2698f6f13ee3efda9348ef9761a445465900f7ae (diff) | |
| download | ChibiOS-ea4c40fc0d505326ff40fd0b9e5560120b85779b.tar.gz ChibiOS-ea4c40fc0d505326ff40fd0b9e5560120b85779b.tar.bz2 ChibiOS-ea4c40fc0d505326ff40fd0b9e5560120b85779b.zip | |
Better clock settings.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8486 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'demos/STM32')
| -rw-r--r-- | demos/STM32/RT-STM32L476RG-NUCLEO/mcuconf.h | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/demos/STM32/RT-STM32L476RG-NUCLEO/mcuconf.h b/demos/STM32/RT-STM32L476RG-NUCLEO/mcuconf.h index dfaf1e241..0d5e2e9b2 100644 --- a/demos/STM32/RT-STM32L476RG-NUCLEO/mcuconf.h +++ b/demos/STM32/RT-STM32L476RG-NUCLEO/mcuconf.h @@ -40,7 +40,7 @@ #define STM32_VOS STM32_VOS_RANGE1
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
-#define STM32_HSI16_ENABLED TRUE
+#define STM32_HSI16_ENABLED FALSE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED FALSE
#define STM32_LSE_ENABLED TRUE
@@ -52,12 +52,12 @@ #define STM32_MSIRANGE STM32_MSIRANGE_4M
#define STM32_MSISRANGE STM32_MSISRANGE_4M
#define STM32_SW STM32_SW_PLL
-#define STM32_PLLSRC STM32_PLLSRC_HSI16
-#define STM32_PLLM_VALUE 4
-#define STM32_PLLN_VALUE 40
+#define STM32_PLLSRC STM32_PLLSRC_MSI
+#define STM32_PLLM_VALUE 1
+#define STM32_PLLN_VALUE 80
#define STM32_PLLP_VALUE 7
-#define STM32_PLLQ_VALUE 2
-#define STM32_PLLR_VALUE 2
+#define STM32_PLLQ_VALUE 6
+#define STM32_PLLR_VALUE 4
#define STM32_HPRE STM32_HPRE_DIV1
#define STM32_PPRE1 STM32_PPRE1_DIV1
#define STM32_PPRE2 STM32_PPRE2_DIV1
@@ -65,11 +65,11 @@ #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
#define STM32_MCOPRE STM32_MCOPRE_DIV1
#define STM32_LSCOSEL STM32_LSCOSEL_NOCLOCK
-#define STM32_PLLSAI1N_VALUE 40
+#define STM32_PLLSAI1N_VALUE 80
#define STM32_PLLSAI1P_VALUE 7
-#define STM32_PLLSAI1Q_VALUE 4
+#define STM32_PLLSAI1Q_VALUE 6
#define STM32_PLLSAI1R_VALUE 4
-#define STM32_PLLSAI2N_VALUE 40
+#define STM32_PLLSAI2N_VALUE 80
#define STM32_PLLSAI2P_VALUE 7
#define STM32_PLLSAI2R_VALUE 4
#define STM32_USART1SEL STM32_USART1SEL_SYSCLK
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