Updated STM32L432 mcuconf.h

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9930 35acf78f-673a-0410-8e92-d51de3d6d3f4

1 files changed, 4 insertions, 87 deletions

diff --git a/demos/STM32/RT-STM32L432KC-NUCLEO32/mcuconf.h b/demos/STM32/RT-STM32L432KC-NUCLEO32/mcuconf.h
index d8773b13c..a56dd002c 100644
--- a/demos/STM32/RT-STM32L432KC-NUCLEO32/mcuconf.h
+++ b/demos/STM32/RT-STM32L432KC-NUCLEO32/mcuconf.h
@@ -97,28 +97,12 @@
 #define STM32_ADC_DUAL_MODE                 FALSE

 #define STM32_ADC_COMPACT_SAMPLES           FALSE

 #define STM32_ADC_USE_ADC1                  FALSE

-#define STM32_ADC_USE_ADC2                  FALSE

-#define STM32_ADC_USE_ADC3                  FALSE

 #define STM32_ADC_ADC1_DMA_STREAM           STM32_DMA_STREAM_ID(1, 1)

-#define STM32_ADC_ADC2_DMA_STREAM           STM32_DMA_STREAM_ID(1, 2)

-#define STM32_ADC_ADC3_DMA_STREAM           STM32_DMA_STREAM_ID(1, 3)

 #define STM32_ADC_ADC1_DMA_PRIORITY         2

-#define STM32_ADC_ADC2_DMA_PRIORITY         2

-#define STM32_ADC_ADC3_DMA_PRIORITY         2

-#define STM32_ADC_ADC12_IRQ_PRIORITY        5

-#define STM32_ADC_ADC3_IRQ_PRIORITY         5

 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     5

-#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     5

 #define STM32_ADC_ADC123_CLOCK_MODE         ADC_CCR_CKMODE_AHB_DIV1

 

 /*

- * CAN driver system settings.

- */

-#define STM32_CAN_USE_CAN1                  FALSE

-#define STM32_CAN_CAN1_IRQ_PRIORITY         11

-

-/*

  * DAC driver system settings.

  */

 #define STM32_DAC_DUAL_MODE                 FALSE

@@ -153,45 +137,30 @@
  */

 #define STM32_GPT_USE_TIM1                  FALSE

 #define STM32_GPT_USE_TIM2                  FALSE

-#define STM32_GPT_USE_TIM3                  FALSE

-#define STM32_GPT_USE_TIM4                  FALSE

-#define STM32_GPT_USE_TIM5                  FALSE

 #define STM32_GPT_USE_TIM6                  FALSE

 #define STM32_GPT_USE_TIM7                  FALSE

-#define STM32_GPT_USE_TIM8                  FALSE

 #define STM32_GPT_USE_TIM15                 FALSE

 #define STM32_GPT_USE_TIM16                 FALSE

-#define STM32_GPT_USE_TIM17                 FALSE

 #define STM32_GPT_TIM1_IRQ_PRIORITY         7

 #define STM32_GPT_TIM2_IRQ_PRIORITY         7

-#define STM32_GPT_TIM3_IRQ_PRIORITY         7

-#define STM32_GPT_TIM4_IRQ_PRIORITY         7

-#define STM32_GPT_TIM5_IRQ_PRIORITY         7

 #define STM32_GPT_TIM6_IRQ_PRIORITY         7

 #define STM32_GPT_TIM7_IRQ_PRIORITY         7

-#define STM32_GPT_TIM8_IRQ_PRIORITY         7

 #define STM32_GPT_TIM15_IRQ_PRIORITY        7

 #define STM32_GPT_TIM16_IRQ_PRIORITY        7

-#define STM32_GPT_TIM17_IRQ_PRIORITY        7

 

 /*

  * I2C driver system settings.

  */

 #define STM32_I2C_USE_I2C1                  FALSE

-#define STM32_I2C_USE_I2C2                  FALSE

 #define STM32_I2C_USE_I2C3                  FALSE

 #define STM32_I2C_BUSY_TIMEOUT              50

 #define STM32_I2C_I2C1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

 #define STM32_I2C_I2C1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 6)

-#define STM32_I2C_I2C2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 5)

-#define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

 #define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3)

 #define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

 #define STM32_I2C_I2C1_IRQ_PRIORITY         5

-#define STM32_I2C_I2C2_IRQ_PRIORITY         5

 #define STM32_I2C_I2C3_IRQ_PRIORITY         5

 #define STM32_I2C_I2C1_DMA_PRIORITY         3

-#define STM32_I2C_I2C2_DMA_PRIORITY         3

 #define STM32_I2C_I2C3_DMA_PRIORITY         3

 #define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")

 

@@ -200,16 +169,8 @@
  */

 #define STM32_ICU_USE_TIM1                  FALSE

 #define STM32_ICU_USE_TIM2                  FALSE

-#define STM32_ICU_USE_TIM3                  FALSE

-#define STM32_ICU_USE_TIM4                  FALSE

-#define STM32_ICU_USE_TIM5                  FALSE

-#define STM32_ICU_USE_TIM8                  FALSE

 #define STM32_ICU_TIM1_IRQ_PRIORITY         7

 #define STM32_ICU_TIM2_IRQ_PRIORITY         7

-#define STM32_ICU_TIM3_IRQ_PRIORITY         7

-#define STM32_ICU_TIM4_IRQ_PRIORITY         7

-#define STM32_ICU_TIM5_IRQ_PRIORITY         7

-#define STM32_ICU_TIM8_IRQ_PRIORITY         7

 

 /*

  * PWM driver system settings.

@@ -217,16 +178,8 @@
 #define STM32_PWM_USE_ADVANCED              FALSE

 #define STM32_PWM_USE_TIM1                  FALSE

 #define STM32_PWM_USE_TIM2                  FALSE

-#define STM32_PWM_USE_TIM3                  FALSE

-#define STM32_PWM_USE_TIM4                  FALSE

-#define STM32_PWM_USE_TIM5                  FALSE

-#define STM32_PWM_USE_TIM8                  FALSE

 #define STM32_PWM_TIM1_IRQ_PRIORITY         7

 #define STM32_PWM_TIM2_IRQ_PRIORITY         7

-#define STM32_PWM_TIM3_IRQ_PRIORITY         7

-#define STM32_PWM_TIM4_IRQ_PRIORITY         7

-#define STM32_PWM_TIM5_IRQ_PRIORITY         7

-#define STM32_PWM_TIM8_IRQ_PRIORITY         7

 

 /*

  * QSPI driver system settings.

@@ -235,46 +188,27 @@
 #define STM32_QSPI_QUADSPI1_DMA_STREAM      STM32_DMA_STREAM_ID(2, 7)

 

 /*

- * SDC driver system settings.

- */

-#define STM32_SDC_USE_SDMMC1                FALSE

-#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT   TRUE

-#define STM32_SDC_SDMMC_WRITE_TIMEOUT       1000

-#define STM32_SDC_SDMMC_READ_TIMEOUT        1000

-#define STM32_SDC_SDMMC_CLOCK_DELAY         10

-#define STM32_SDC_SDMMC1_DMA_PRIORITY       3

-#define STM32_SDC_SDMMC1_IRQ_PRIORITY       9

-#define STM32_SDC_SDMMC1_DMA_STREAM         STM32_DMA_STREAM_ID(2, 4)

-

-/*

  * SERIAL driver system settings.

  */

 #define STM32_SERIAL_USE_USART1             FALSE

 #define STM32_SERIAL_USE_USART2             TRUE

-#define STM32_SERIAL_USE_USART3             FALSE

 #define STM32_SERIAL_USE_LPUART1            FALSE

 #define STM32_SERIAL_USART1_PRIORITY        12

 #define STM32_SERIAL_USART2_PRIORITY        12

-#define STM32_SERIAL_USART3_PRIORITY        12

 #define STM32_SERIAL_LPUART1_PRIORITY       12

 

 /*

  * SPI driver system settings.

  */

 #define STM32_SPI_USE_SPI1                  FALSE

-#define STM32_SPI_USE_SPI2                  FALSE

 #define STM32_SPI_USE_SPI3                  FALSE

 #define STM32_SPI_SPI1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 3)

 #define STM32_SPI_SPI1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 4)

-#define STM32_SPI_SPI2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

-#define STM32_SPI_SPI2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 5)

 #define STM32_SPI_SPI3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 1)

 #define STM32_SPI_SPI3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 2)

 #define STM32_SPI_SPI1_DMA_PRIORITY         1

-#define STM32_SPI_SPI2_DMA_PRIORITY         1

 #define STM32_SPI_SPI3_DMA_PRIORITY         1

 #define STM32_SPI_SPI1_IRQ_PRIORITY         10

-#define STM32_SPI_SPI2_IRQ_PRIORITY         10

 #define STM32_SPI_SPI3_IRQ_PRIORITY         10

 #define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")

 

@@ -289,44 +223,27 @@
  */

 #define STM32_UART_USE_USART1               FALSE

 #define STM32_UART_USE_USART2               TRUE

-#define STM32_UART_USE_USART3               FALSE

-#define STM32_UART_USE_UART4                FALSE

-#define STM32_UART_USE_UART5                FALSE

 #define STM32_UART_USE_LPUART1              FALSE

 #define STM32_UART_USART1_RX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 7)

 #define STM32_UART_USART1_TX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 6)

 #define STM32_UART_USART2_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 6)

 #define STM32_UART_USART2_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 7)

-#define STM32_UART_USART3_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 3)

-#define STM32_UART_USART3_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 2)

-#define STM32_UART_UART4_RX_DMA_STREAM      STM32_DMA_STREAM_ID(2, 5)

-#define STM32_UART_UART4_TX_DMA_STREAM      STM32_DMA_STREAM_ID(2, 3)

-#define STM32_UART_UART5_RX_DMA_STREAM      STM32_DMA_STREAM_ID(2, 2)

-#define STM32_UART_UART5_TX_DMA_STREAM      STM32_DMA_STREAM_ID(2, 1)

 #define STM32_UART_LPUART1_RX_DMA_STREAM    STM32_DMA_STREAM_ID(2, 7)

 #define STM32_UART_LPUART1_TX_DMA_STREAM    STM32_DMA_STREAM_ID(2, 6)

 #define STM32_UART_USART1_IRQ_PRIORITY      12

 #define STM32_UART_USART2_IRQ_PRIORITY      12

-#define STM32_UART_USART3_IRQ_PRIORITY      12

-#define STM32_UART_UART4_IRQ_PRIORITY       12

-#define STM32_UART_UART5_IRQ_PRIORITY       12

 #define STM32_UART_USART1_DMA_PRIORITY      0

 #define STM32_UART_USART2_DMA_PRIORITY      0

-#define STM32_UART_USART3_DMA_PRIORITY      0

-#define STM32_UART_UART4_DMA_PRIORITY       0

-#define STM32_UART_UART5_DMA_PRIORITY       0

 #define STM32_UART_LPUART1_DMA_PRIORITY     0

 #define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")

 

 /*

  * USB driver system settings.

  */

-#define STM32_USB_USE_OTG1                  FALSE

-#define STM32_USB_OTG1_IRQ_PRIORITY         14

-#define STM32_USB_OTG1_RX_FIFO_SIZE         512

-#define STM32_USB_OTG_THREAD_PRIO           LOWPRIO

-#define STM32_USB_OTG_THREAD_STACK_SIZE     128

-#define STM32_USB_OTGFIFO_FILL_BASEPRI      0

+#define STM32_USB_USE_USB1                  FALSE

+#define STM32_USB_LOW_POWER_ON_SUSPEND      FALSE

+#define STM32_USB_USB1_HP_IRQ_PRIORITY      13

+#define STM32_USB_USB1_LP_IRQ_PRIORITY      14

 

 /*

  * WDG driver system settings.