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authorRocco Marco Guglielmi <roccomarco.guglielmi@live.com>2016-06-04 14:54:54 +0000
committerRocco Marco Guglielmi <roccomarco.guglielmi@live.com>2016-06-04 14:54:54 +0000
commitba9897fa8d746f2087043b859ae213d2591ba368 (patch)
tree482f814db26a2bf3a1fcae84495893484a722744 /demos/STM32/RT-STM32F446RE-NUCLEO64
parent0ac96b000b014bed358f7278ae7d6e7d3acce4f7 (diff)
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Updated mcuconf.h for SMT32F446 and STM32F469 by adding PLLSAI and PLLI2S settings
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9572 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'demos/STM32/RT-STM32F446RE-NUCLEO64')
-rw-r--r--demos/STM32/RT-STM32F446RE-NUCLEO64/mcuconf.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/demos/STM32/RT-STM32F446RE-NUCLEO64/mcuconf.h b/demos/STM32/RT-STM32F446RE-NUCLEO64/mcuconf.h
index cb3943ee9..2a12bcb50 100644
--- a/demos/STM32/RT-STM32F446RE-NUCLEO64/mcuconf.h
+++ b/demos/STM32/RT-STM32F446RE-NUCLEO64/mcuconf.h
@@ -63,6 +63,13 @@
#define STM32_PLLI2SR_VALUE 4
#define STM32_PLLI2SP_VALUE 4
#define STM32_PLLI2SQ_VALUE 4
+#define STM32_PLLSAIN_VALUE 192
+#define STM32_PLLSAIM_VALUE 4
+#define STM32_PLLSAIP_VALUE 4
+#define STM32_PLLSAIQ_VALUE 4
+#define STM32_SAI1SEL STM32_SAI2SEL_PLLR
+#define STM32_SAI2SEL STM32_SAI2SEL_PLLR
+#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE