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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2017-11-19 08:07:44 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2017-11-19 08:07:44 +0000 |
| commit | f8555ffa3f85b0588b20914fb2e15207336b7fa4 (patch) | |
| tree | ab212b331b6c99e2ae210546a07c9d7d172641c9 /demos/STM32/RT-STM32F070RB-NUCLEO64 | |
| parent | e877388d6da00a2f52ab1661a642f9e779022b15 (diff) | |
| download | ChibiOS-f8555ffa3f85b0588b20914fb2e15207336b7fa4.tar.gz ChibiOS-f8555ffa3f85b0588b20914fb2e15207336b7fa4.tar.bz2 ChibiOS-f8555ffa3f85b0588b20914fb2e15207336b7fa4.zip | |
Re-aligned mcuconf.h files for F0 devices.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11035 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'demos/STM32/RT-STM32F070RB-NUCLEO64')
| -rw-r--r-- | demos/STM32/RT-STM32F070RB-NUCLEO64/mcuconf.h | 24 |
1 files changed, 14 insertions, 10 deletions
diff --git a/demos/STM32/RT-STM32F070RB-NUCLEO64/mcuconf.h b/demos/STM32/RT-STM32F070RB-NUCLEO64/mcuconf.h index a862926d8..b0d21e4b4 100644 --- a/demos/STM32/RT-STM32F070RB-NUCLEO64/mcuconf.h +++ b/demos/STM32/RT-STM32F070RB-NUCLEO64/mcuconf.h @@ -60,6 +60,16 @@ #define STM32_RTCSEL STM32_RTCSEL_LSI
/*
+ * IRQ system settings.
+ */
+#define STM32_IRQ_EXTI0_1_IRQ_PRIORITY 3
+#define STM32_IRQ_EXTI2_3_IRQ_PRIORITY 3
+#define STM32_IRQ_EXTI4_15_IRQ_PRIORITY 3
+#define STM32_IRQ_EXTI16_IRQ_PRIORITY 3
+#define STM32_IRQ_EXTI17_20_IRQ_PRIORITY 3
+#define STM32_IRQ_EXTI21_22_IRQ_PRIORITY 3
+
+/*
* ADC driver system settings.
*/
#define STM32_ADC_USE_ADC1 FALSE
@@ -69,24 +79,16 @@ #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
/*
- * EXT driver system settings.
- */
-#define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3
-#define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3
-#define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3
-#define STM32_EXT_EXTI16_IRQ_PRIORITY 3
-#define STM32_EXT_EXTI17_20_IRQ_PRIORITY 3
-#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 3
-
-/*
* GPT driver system settings.
*/
#define STM32_GPT_USE_TIM1 FALSE
+#define STM32_GPT_USE_TIM2 FALSE
#define STM32_GPT_USE_TIM3 FALSE
#define STM32_GPT_USE_TIM6 FALSE
#define STM32_GPT_USE_TIM7 FALSE
#define STM32_GPT_USE_TIM14 FALSE
#define STM32_GPT_TIM1_IRQ_PRIORITY 2
+#define STM32_GPT_TIM2_IRQ_PRIORITY 2
#define STM32_GPT_TIM3_IRQ_PRIORITY 2
#define STM32_GPT_TIM6_IRQ_PRIORITY 2
#define STM32_GPT_TIM7_IRQ_PRIORITY 2
@@ -124,8 +126,10 @@ */
#define STM32_PWM_USE_ADVANCED FALSE
#define STM32_PWM_USE_TIM1 FALSE
+#define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE
#define STM32_PWM_TIM1_IRQ_PRIORITY 3
+#define STM32_PWM_TIM2_IRQ_PRIORITY 3
#define STM32_PWM_TIM3_IRQ_PRIORITY 3
/*
|