diff options
| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-11-19 11:50:14 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-11-19 11:50:14 +0000 |
| commit | c57e3842293e0396bfa7653428dc81585e7717de (patch) | |
| tree | 6ae0d0d6f3def7af2794e1f6879b738ae16a975f /demos/PPC-SPC560B-GCC | |
| parent | 7fa885a2010dbb800cb56ddff2b110f647f77bff (diff) | |
| download | ChibiOS-c57e3842293e0396bfa7653428dc81585e7717de.tar.gz ChibiOS-c57e3842293e0396bfa7653428dc81585e7717de.tar.bz2 ChibiOS-c57e3842293e0396bfa7653428dc81585e7717de.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4829 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'demos/PPC-SPC560B-GCC')
| -rw-r--r-- | demos/PPC-SPC560B-GCC/.project | 2 | ||||
| -rw-r--r-- | demos/PPC-SPC560B-GCC/Makefile | 8 | ||||
| -rw-r--r-- | demos/PPC-SPC560B-GCC/mcuconf.h | 39 |
3 files changed, 30 insertions, 19 deletions
diff --git a/demos/PPC-SPC560B-GCC/.project b/demos/PPC-SPC560B-GCC/.project index 4b947d3ed..b908861b4 100644 --- a/demos/PPC-SPC560B-GCC/.project +++ b/demos/PPC-SPC560B-GCC/.project @@ -27,7 +27,7 @@ <link>
<name>board</name>
<type>2</type>
- <locationURI>CHIBIOS/boards/GENERIC_SPC560P</locationURI>
+ <locationURI>CHIBIOS/boards/GENERIC_SPC560B</locationURI>
</link>
<link>
<name>os</name>
diff --git a/demos/PPC-SPC560B-GCC/Makefile b/demos/PPC-SPC560B-GCC/Makefile index 62303fdd1..8e942f03e 100644 --- a/demos/PPC-SPC560B-GCC/Makefile +++ b/demos/PPC-SPC560B-GCC/Makefile @@ -46,15 +46,15 @@ PROJECT = ch # Imported source files
CHIBIOS = ../..
-include $(CHIBIOS)/boards/GENERIC_SPC560P/board.mk
-include $(CHIBIOS)/os/hal/platforms/SPC560Pxx/platform.mk
+include $(CHIBIOS)/boards/GENERIC_SPC560B/board.mk
+include $(CHIBIOS)/os/hal/platforms/SPC560BCxx/platform.mk
include $(CHIBIOS)/os/hal/hal.mk
-include $(CHIBIOS)/os/ports/GCC/PPC/SPC560Pxx/port.mk
+include $(CHIBIOS)/os/ports/GCC/PPC/SPC560BCxx/port.mk
include $(CHIBIOS)/os/kernel/kernel.mk
include $(CHIBIOS)/test/test.mk
# Define linker script file here
-LDSCRIPT= $(PORTLD)/SPC560P44.ld
+LDSCRIPT= $(PORTLD)/SPC560B50.ld
# C sources here.
CSRC = $(PORTSRC) \
diff --git a/demos/PPC-SPC560B-GCC/mcuconf.h b/demos/PPC-SPC560B-GCC/mcuconf.h index 9b1adfc1e..2de1ffee3 100644 --- a/demos/PPC-SPC560B-GCC/mcuconf.h +++ b/demos/PPC-SPC560B-GCC/mcuconf.h @@ -36,22 +36,21 @@ */
#define SPC5_NO_INIT FALSE
#define SPC5_ALLOW_OVERCLOCK FALSE
-#define SPC5_FMPLL0_IDF_VALUE 5
+#define SPC5_XOSCDIV_VALUE 1
+#define SPC5_IRCDIV_VALUE 1
+#define SPC5_FMPLL0_IDF_VALUE 1
#define SPC5_FMPLL0_NDIV_VALUE 32
#define SPC5_FMPLL0_ODF SPC5_FMPLL_ODF_DIV4
-#define SPC5_FMPLL1_IDF_VALUE 5
-#define SPC5_FMPLL1_NDIV_VALUE 60
-#define SPC5_FMPLL1_ODF SPC5_FMPLL_ODF_DIV4
#define SPC5_ME_ME_BITS (SPC5_ME_ME_RUN1 | \
SPC5_ME_ME_RUN2 | \
SPC5_ME_ME_RUN3 | \
SPC5_ME_ME_HALT0 | \
- SPC5_ME_ME_STOP0)
+ SPC5_ME_ME_STOP0 | \
+ SPC5_ME_ME_STANDBY0)
#define SPC5_ME_TEST_MC_BITS (SPC5_ME_MC_SYSCLK_IRC | \
SPC5_ME_MC_IRCON | \
SPC5_ME_MC_XOSC0ON | \
SPC5_ME_MC_PLL0ON | \
- SPC5_ME_MC_PLL1ON | \
SPC5_ME_MC_CFLAON_NORMAL | \
SPC5_ME_MC_DFLAON_NORMAL | \
SPC5_ME_MC_MVRON)
@@ -60,7 +59,6 @@ SPC5_ME_MC_IRCON | \
SPC5_ME_MC_XOSC0ON | \
SPC5_ME_MC_PLL0ON | \
- SPC5_ME_MC_PLL1ON | \
SPC5_ME_MC_CFLAON_NORMAL | \
SPC5_ME_MC_DFLAON_NORMAL | \
SPC5_ME_MC_MVRON)
@@ -68,7 +66,6 @@ SPC5_ME_MC_IRCON | \
SPC5_ME_MC_XOSC0ON | \
SPC5_ME_MC_PLL0ON | \
- SPC5_ME_MC_PLL1ON | \
SPC5_ME_MC_CFLAON_NORMAL | \
SPC5_ME_MC_DFLAON_NORMAL | \
SPC5_ME_MC_MVRON)
@@ -76,7 +73,6 @@ SPC5_ME_MC_IRCON | \
SPC5_ME_MC_XOSC0ON | \
SPC5_ME_MC_PLL0ON | \
- SPC5_ME_MC_PLL1ON | \
SPC5_ME_MC_CFLAON_NORMAL | \
SPC5_ME_MC_DFLAON_NORMAL | \
SPC5_ME_MC_MVRON)
@@ -84,7 +80,6 @@ SPC5_ME_MC_IRCON | \
SPC5_ME_MC_XOSC0ON | \
SPC5_ME_MC_PLL0ON | \
- SPC5_ME_MC_PLL1ON | \
SPC5_ME_MC_CFLAON_NORMAL | \
SPC5_ME_MC_DFLAON_NORMAL | \
SPC5_ME_MC_MVRON)
@@ -92,7 +87,6 @@ SPC5_ME_MC_IRCON | \
SPC5_ME_MC_XOSC0ON | \
SPC5_ME_MC_PLL0ON | \
- SPC5_ME_MC_PLL1ON | \
SPC5_ME_MC_CFLAON_NORMAL | \
SPC5_ME_MC_DFLAON_NORMAL | \
SPC5_ME_MC_MVRON)
@@ -100,7 +94,6 @@ SPC5_ME_MC_IRCON | \
SPC5_ME_MC_XOSC0ON | \
SPC5_ME_MC_PLL0ON | \
- SPC5_ME_MC_PLL1ON | \
SPC5_ME_MC_CFLAON_NORMAL | \
SPC5_ME_MC_DFLAON_NORMAL | \
SPC5_ME_MC_MVRON)
@@ -108,10 +101,22 @@ SPC5_ME_MC_IRCON | \
SPC5_ME_MC_XOSC0ON | \
SPC5_ME_MC_PLL0ON | \
- SPC5_ME_MC_PLL1ON | \
SPC5_ME_MC_CFLAON_NORMAL | \
SPC5_ME_MC_DFLAON_NORMAL | \
SPC5_ME_MC_MVRON)
+#define SPC5_ME_RUN_PC0_BITS 0
+#define SPC5_ME_RUN_PC1_BITS (SPC5_ME_RUN_PC_TEST | \
+ SPC5_ME_RUN_PC_SAFE | \
+ SPC5_ME_RUN_PC_DRUN | \
+ SPC5_ME_RUN_PC_RUN0 | \
+ SPC5_ME_RUN_PC_RUN1 | \
+ SPC5_ME_RUN_PC_RUN2 | \
+ SPC5_ME_RUN_PC_RUN3)
+#define SPC5_ME_RUN_PC2_BITS (SPC5_ME_RUN_PC_DRUN | \
+ SPC5_ME_RUN_PC_RUN0 | \
+ SPC5_ME_RUN_PC_RUN1 | \
+ SPC5_ME_RUN_PC_RUN2 | \
+ SPC5_ME_RUN_PC_RUN3)
#define SPC5_ME_RUN_PC3_BITS (SPC5_ME_RUN_PC_RUN0 | \
SPC5_ME_RUN_PC_RUN1 | \
SPC5_ME_RUN_PC_RUN2 | \
@@ -132,6 +137,12 @@ SPC5_ME_RUN_PC_RUN1 | \
SPC5_ME_RUN_PC_RUN2 | \
SPC5_ME_RUN_PC_RUN3)
+#define SPC5_ME_LP_PC0_BITS 0
+#define SPC5_ME_LP_PC1_BITS (SPC5_ME_LP_PC_HALT0 | \
+ SPC5_ME_LP_PC_STOP0 | \
+ SPC5_ME_LP_PC_STANDBY0)
+#define SPC5_ME_LP_PC2_BITS (SPC5_ME_LP_PC_HALT0)
+#define SPC5_ME_LP_PC3_BITS (SPC5_ME_LP_PC_STOP0)
#define SPC5_ME_LP_PC4_BITS (SPC5_ME_LP_PC_HALT0 | \
SPC5_ME_LP_PC_STOP0)
#define SPC5_ME_LP_PC5_BITS (SPC5_ME_LP_PC_HALT0 | \
@@ -140,7 +151,7 @@ SPC5_ME_LP_PC_STOP0)
#define SPC5_ME_LP_PC7_BITS (SPC5_ME_LP_PC_HALT0 | \
SPC5_ME_LP_PC_STOP0)
-#define SPC5_PIT3_IRQ_PRIORITY 4
+#define SPC5_PIT0_IRQ_PRIORITY 4
/*
* SERIAL driver system settings.
|