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author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2009-06-21 08:52:44 +0000 |
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committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2009-06-21 08:52:44 +0000 |
commit | 1c7e52eb35c244e5855ea7978ab02d9540829e00 (patch) | |
tree | c9cbb85a1b4bbeab3c5460e46fb63321b0426412 /demos/MSP430-MSP430x1611-GCC | |
parent | d737613d74644daf305133241f361038406b6295 (diff) | |
download | ChibiOS-1c7e52eb35c244e5855ea7978ab02d9540829e00.tar.gz ChibiOS-1c7e52eb35c244e5855ea7978ab02d9540829e00.tar.bz2 ChibiOS-1c7e52eb35c244e5855ea7978ab02d9540829e00.zip |
Added abstract port setup to PAL and to the MSP430 port.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1042 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'demos/MSP430-MSP430x1611-GCC')
-rw-r--r-- | demos/MSP430-MSP430x1611-GCC/Makefile | 1 | ||||
-rw-r--r-- | demos/MSP430-MSP430x1611-GCC/board.c | 35 |
2 files changed, 16 insertions, 20 deletions
diff --git a/demos/MSP430-MSP430x1611-GCC/Makefile b/demos/MSP430-MSP430x1611-GCC/Makefile index 4f9d159c3..8cf693eb1 100644 --- a/demos/MSP430-MSP430x1611-GCC/Makefile +++ b/demos/MSP430-MSP430x1611-GCC/Makefile @@ -45,6 +45,7 @@ include ../../test/test.mk # C sources here.
CSRC = ../../ports/MSP430/chcore.c \
../../ports/MSP430/msp430_serial.c \
+ ../../ports/MSP430/pal_lld.c \
${KERNSRC} \
${TESTSRC} \
../../src/lib/evtimer.c \
diff --git a/demos/MSP430-MSP430x1611-GCC/board.c b/demos/MSP430-MSP430x1611-GCC/board.c index c94b4141b..d24bd29e2 100644 --- a/demos/MSP430-MSP430x1611-GCC/board.c +++ b/demos/MSP430-MSP430x1611-GCC/board.c @@ -26,6 +26,19 @@ #include "msp430_serial.h"
/*
+ * Digital I/O ports static configuration. + */
+static const MSP430DIOConfig config =
+{
+ {VAL_P1OUT, VAL_P1DIR},
+ {VAL_P2OUT, VAL_P2DIR},
+ {VAL_P3OUT, VAL_P3DIR},
+ {VAL_P4OUT, VAL_P4DIR},
+ {VAL_P5OUT, VAL_P5DIR},
+ {VAL_P6OUT, VAL_P6DIR},
+};
+
+/*
* Hardware initialization goes here.
* NOTE: Interrupts are still disabled.
*/
@@ -47,27 +60,9 @@ void hwinit(void) { BCSCTL2 = VAL_BCSCTL2;
/*
- * I/O ports initialization. PxSEL registers are assumed to be cleared after
- * the reset.
+ * I/O ports initialization.
*/
- palInit();
- palWritePort(IOPORT_A, VAL_P1OUT);
- pal_lld_msp430_set_direction(IOPORT_A, VAL_P1DIR);
-
- palWritePort(IOPORT_B, VAL_P2OUT);
- pal_lld_msp430_set_direction(IOPORT_B, VAL_P2DIR);
-
- palWritePort(IOPORT_C, VAL_P3OUT);
- pal_lld_msp430_set_direction(IOPORT_C, VAL_P3DIR);
-
- palWritePort(IOPORT_D, VAL_P4OUT);
- pal_lld_msp430_set_direction(IOPORT_D, VAL_P4DIR);
-
- palWritePort(IOPORT_E, VAL_P5OUT);
- pal_lld_msp430_set_direction(IOPORT_E, VAL_P5DIR);
-
- palWritePort(IOPORT_F, VAL_P6OUT);
- pal_lld_msp430_set_direction(IOPORT_F, VAL_P6DIR);
+ palInit(&config);
/*
* Timer 0 setup, uses SMCLK as source.
|