HTTPS SEC and NSEC demos

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11881 110e8d01-0319-4d1e-a829-52ad28d1bb01

5 files changed, 1456 insertions, 0 deletions

diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-HTTPS-SEC/cfg/chconf.h b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-HTTPS-SEC/cfg/chconf.h
new file mode 100755
index 000000000..6db52ba06
--- /dev/null
+++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-HTTPS-SEC/cfg/chconf.h
@@ -0,0 +1,609 @@
+/*

+    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+/**

+ * @file    templates/chconf.h

+ * @brief   Configuration file template.

+ * @details A copy of this file must be placed in each project directory, it

+ *          contains the application specific kernel settings.

+ *

+ * @addtogroup config

+ * @details Kernel related settings and hooks.

+ * @{

+ */

+

+#ifndef CHCONF_H

+#define CHCONF_H

+

+#define _CHIBIOS_RT_CONF_

+#define _CHIBIOS_RT_CONF_VER_5_0_

+

+/*===========================================================================*/

+/**

+ * @name System timers settings

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   System time counter resolution.

+ * @note    Allowed values are 16 or 32 bits.

+ */

+#define CH_CFG_ST_RESOLUTION                32

+

+/**

+ * @brief   System tick frequency.

+ * @details Frequency of the system timer that drives the system ticks. This

+ *          setting also defines the system tick time unit.

+ */

+//#define CH_CFG_ST_FREQUENCY                 1000          /* periodic tick.*/

+#define CH_CFG_ST_FREQUENCY                 (83000000 / 32) /* tick-less.*/

+

+/**

+ * @brief   Time intervals data size.

+ * @note    Allowed values are 16, 32 or 64 bits.

+ */

+#define CH_CFG_INTERVALS_SIZE               32

+

+/**

+ * @brief   Time types data size.

+ * @note    Allowed values are 16 or 32 bits.

+ */

+#define CH_CFG_TIME_TYPES_SIZE              32

+

+/**

+ * @brief   Time delta constant for the tick-less mode.

+ * @note    If this value is zero then the system uses the classic

+ *          periodic tick. This value represents the minimum number

+ *          of ticks that is safe to specify in a timeout directive.

+ *          The value one is not valid, timeouts are rounded up to

+ *          this value.

+ */

+#define CH_CFG_ST_TIMEDELTA                 2

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Kernel parameters and options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Round robin interval.

+ * @details This constant is the number of system ticks allowed for the

+ *          threads before preemption occurs. Setting this value to zero

+ *          disables the preemption for threads with equal priority and the

+ *          round robin becomes cooperative. Note that higher priority

+ *          threads can still preempt, the kernel is always preemptive.

+ * @note    Disabling the round robin preemption makes the kernel more compact

+ *          and generally faster.

+ * @note    The round robin preemption is not supported in tickless mode and

+ *          must be set to zero in that case.

+ */

+#define CH_CFG_TIME_QUANTUM                 0

+

+/**

+ * @brief   Managed RAM size.

+ * @details Size of the RAM area to be managed by the OS. If set to zero

+ *          then the whole available RAM is used. The core memory is made

+ *          available to the heap allocator and/or can be used directly through

+ *          the simplified core memory allocator.

+ *

+ * @note    In order to let the OS manage the whole RAM the linker script must

+ *          provide the @p __heap_base__ and @p __heap_end__ symbols.

+ * @note    Requires @p CH_CFG_USE_MEMCORE.

+ */

+#define CH_CFG_MEMCORE_SIZE                 0

+

+/**

+ * @brief   Idle thread automatic spawn suppression.

+ * @details When this option is activated the function @p chSysInit()

+ *          does not spawn the idle thread. The application @p main()

+ *          function becomes the idle thread and must implement an

+ *          infinite loop.

+ */

+#define CH_CFG_NO_IDLE_THREAD               FALSE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Performance options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   OS optimization.

+ * @details If enabled then time efficient rather than space efficient code

+ *          is used when two possible implementations exist.

+ *

+ * @note    This is not related to the compiler optimization options.

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_OPTIMIZE_SPEED               TRUE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Subsystem options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Time Measurement APIs.

+ * @details If enabled then the time measurement APIs are included in

+ *          the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_TM                       FALSE

+

+/**

+ * @brief   Threads registry APIs.

+ * @details If enabled then the registry APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_REGISTRY                 TRUE

+

+/**

+ * @brief   Threads synchronization APIs.

+ * @details If enabled then the @p chThdWait() function is included in

+ *          the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_WAITEXIT                 TRUE

+

+/**

+ * @brief   Semaphores APIs.

+ * @details If enabled then the Semaphores APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_SEMAPHORES               TRUE

+

+/**

+ * @brief   Semaphores queuing mode.

+ * @details If enabled then the threads are enqueued on semaphores by

+ *          priority rather than in FIFO order.

+ *

+ * @note    The default is @p FALSE. Enable this if you have special

+ *          requirements.

+ * @note    Requires @p CH_CFG_USE_SEMAPHORES.

+ */

+#define CH_CFG_USE_SEMAPHORES_PRIORITY      FALSE

+

+/**

+ * @brief   Mutexes APIs.

+ * @details If enabled then the mutexes APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MUTEXES                  TRUE

+

+/**

+ * @brief   Enables recursive behavior on mutexes.

+ * @note    Recursive mutexes are heavier and have an increased

+ *          memory footprint.

+ *

+ * @note    The default is @p FALSE.

+ * @note    Requires @p CH_CFG_USE_MUTEXES.

+ */

+#define CH_CFG_USE_MUTEXES_RECURSIVE        FALSE

+

+/**

+ * @brief   Conditional Variables APIs.

+ * @details If enabled then the conditional variables APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_MUTEXES.

+ */

+#define CH_CFG_USE_CONDVARS                 TRUE

+

+/**

+ * @brief   Conditional Variables APIs with timeout.

+ * @details If enabled then the conditional variables APIs with timeout

+ *          specification are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_CONDVARS.

+ */

+#define CH_CFG_USE_CONDVARS_TIMEOUT         TRUE

+

+/**

+ * @brief   Events Flags APIs.

+ * @details If enabled then the event flags APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_EVENTS                   TRUE

+

+/**

+ * @brief   Events Flags APIs with timeout.

+ * @details If enabled then the events APIs with timeout specification

+ *          are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_EVENTS.

+ */

+#define CH_CFG_USE_EVENTS_TIMEOUT           TRUE

+

+/**

+ * @brief   Synchronous Messages APIs.

+ * @details If enabled then the synchronous messages APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MESSAGES                 TRUE

+

+/**

+ * @brief   Synchronous Messages queuing mode.

+ * @details If enabled then messages are served by priority rather than in

+ *          FIFO order.

+ *

+ * @note    The default is @p FALSE. Enable this if you have special

+ *          requirements.

+ * @note    Requires @p CH_CFG_USE_MESSAGES.

+ */

+#define CH_CFG_USE_MESSAGES_PRIORITY        FALSE

+

+/**

+ * @brief   Mailboxes APIs.

+ * @details If enabled then the asynchronous messages (mailboxes) APIs are

+ *          included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_SEMAPHORES.

+ */

+#define CH_CFG_USE_MAILBOXES                TRUE

+

+/**

+ * @brief   Core Memory Manager APIs.

+ * @details If enabled then the core memory manager APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MEMCORE                  TRUE

+

+/**

+ * @brief   Heap Allocator APIs.

+ * @details If enabled then the memory heap allocator APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or

+ *          @p CH_CFG_USE_SEMAPHORES.

+ * @note    Mutexes are recommended.

+ */

+#define CH_CFG_USE_HEAP                     TRUE

+

+/**

+ * @brief   Memory Pools Allocator APIs.

+ * @details If enabled then the memory pools allocator APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MEMPOOLS                 TRUE

+

+/**

+ * @brief  Objects FIFOs APIs.

+ * @details If enabled then the objects FIFOs APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_OBJ_FIFOS                TRUE

+

+/**

+ * @brief   Dynamic Threads APIs.

+ * @details If enabled then the dynamic threads creation APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_WAITEXIT.

+ * @note    Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.

+ */

+#define CH_CFG_USE_DYNAMIC                  TRUE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Objects factory options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Objects Factory APIs.

+ * @details If enabled then the objects factory APIs are included in the

+ *          kernel.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_CFG_USE_FACTORY                  TRUE

+

+/**

+ * @brief   Maximum length for object names.

+ * @details If the specified length is zero then the name is stored by

+ *          pointer but this could have unintended side effects.

+ */

+#define CH_CFG_FACTORY_MAX_NAMES_LENGTH     8

+

+/**

+ * @brief   Enables the registry of generic objects.

+ */

+#define CH_CFG_FACTORY_OBJECTS_REGISTRY     TRUE

+

+/**

+ * @brief   Enables factory for generic buffers.

+ */

+#define CH_CFG_FACTORY_GENERIC_BUFFERS      TRUE

+

+/**

+ * @brief   Enables factory for semaphores.

+ */

+#define CH_CFG_FACTORY_SEMAPHORES           TRUE

+

+/**

+ * @brief   Enables factory for mailboxes.

+ */

+#define CH_CFG_FACTORY_MAILBOXES            TRUE

+

+/**

+ * @brief   Enables factory for objects FIFOs.

+ */

+#define CH_CFG_FACTORY_OBJ_FIFOS            TRUE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Debug options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Debug option, kernel statistics.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_STATISTICS                   FALSE

+

+/**

+ * @brief   Debug option, system state check.

+ * @details If enabled the correct call protocol for system APIs is checked

+ *          at runtime.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_SYSTEM_STATE_CHECK           TRUE

+

+/**

+ * @brief   Debug option, parameters checks.

+ * @details If enabled then the checks on the API functions input

+ *          parameters are activated.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_ENABLE_CHECKS                TRUE

+

+/**

+ * @brief   Debug option, consistency checks.

+ * @details If enabled then all the assertions in the kernel code are

+ *          activated. This includes consistency checks inside the kernel,

+ *          runtime anomalies and port-defined checks.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_ENABLE_ASSERTS               TRUE

+

+/**

+ * @brief   Debug option, trace buffer.

+ * @details If enabled then the trace buffer is activated.

+ *

+ * @note    The default is @p CH_DBG_TRACE_MASK_DISABLED.

+ */

+#define CH_DBG_TRACE_MASK                   CH_DBG_TRACE_MASK_DISABLED

+

+/**

+ * @brief   Trace buffer entries.

+ * @note    The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is

+ *          different from @p CH_DBG_TRACE_MASK_DISABLED.

+ */

+#define CH_DBG_TRACE_BUFFER_SIZE            128

+

+/**

+ * @brief   Debug option, stack checks.

+ * @details If enabled then a runtime stack check is performed.

+ *

+ * @note    The default is @p FALSE.

+ * @note    The stack check is performed in a architecture/port dependent way.

+ *          It may not be implemented or some ports.

+ * @note    The default failure mode is to halt the system with the global

+ *          @p panic_msg variable set to @p NULL.

+ */

+#define CH_DBG_ENABLE_STACK_CHECK           FALSE

+

+/**

+ * @brief   Debug option, stacks initialization.

+ * @details If enabled then the threads working area is filled with a byte

+ *          value when a thread is created. This can be useful for the

+ *          runtime measurement of the used stack.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_FILL_THREADS                 FALSE

+

+/**

+ * @brief   Debug option, threads profiling.

+ * @details If enabled then a field is added to the @p thread_t structure that

+ *          counts the system ticks occurred while executing the thread.

+ *

+ * @note    The default is @p FALSE.

+ * @note    This debug option is not currently compatible with the

+ *          tickless mode.

+ */

+#define CH_DBG_THREADS_PROFILING            FALSE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Kernel hooks

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   System structure extension.

+ * @details User fields added to the end of the @p ch_system_t structure.

+ */

+#define CH_CFG_SYSTEM_EXTRA_FIELDS                                          \

+  /* Add threads custom fields here.*/

+

+/**

+ * @brief   System initialization hook.

+ * @details User initialization code added to the @p chSysInit() function

+ *          just before interrupts are enabled globally.

+ */

+#define CH_CFG_SYSTEM_INIT_HOOK(tp) {                                       \

+  /* Add threads initialization code here.*/                                \

+}

+

+/**

+ * @brief   Threads descriptor structure extension.

+ * @details User fields added to the end of the @p thread_t structure.

+ */

+#define CH_CFG_THREAD_EXTRA_FIELDS                                          \

+  /* Add threads custom fields here.*/

+

+/**

+ * @brief   Threads initialization hook.

+ * @details User initialization code added to the @p _thread_init() function.

+ *

+ * @note    It is invoked from within @p _thread_init() and implicitly from all

+ *          the threads creation APIs.

+ */

+#define CH_CFG_THREAD_INIT_HOOK(tp) {                                       \

+  /* Add threads initialization code here.*/                                \

+}

+

+/**

+ * @brief   Threads finalization hook.

+ * @details User finalization code added to the @p chThdExit() API.

+ */

+#define CH_CFG_THREAD_EXIT_HOOK(tp) {                                       \

+  /* Add threads finalization code here.*/                                  \

+}

+

+/**

+ * @brief   Context switch hook.

+ * @details This hook is invoked just before switching between threads.

+ */

+#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) {                              \

+  /* Context switch code here.*/                                            \

+}

+

+/**

+ * @brief   ISR enter hook.

+ */

+#define CH_CFG_IRQ_PROLOGUE_HOOK() {                                        \

+  /* IRQ prologue code here.*/                                              \

+}

+

+/**

+ * @brief   ISR exit hook.

+ */

+#define CH_CFG_IRQ_EPILOGUE_HOOK() {                                        \

+  /* IRQ epilogue code here.*/                                              \

+}

+

+/**

+ * @brief   Idle thread enter hook.

+ * @note    This hook is invoked within a critical zone, no OS functions

+ *          should be invoked from here.

+ * @note    This macro can be used to activate a power saving mode.

+ */

+#define CH_CFG_IDLE_ENTER_HOOK() {                                          \

+  /* Idle-enter code here.*/                                                \

+}

+

+/**

+ * @brief   Idle thread leave hook.

+ * @note    This hook is invoked within a critical zone, no OS functions

+ *          should be invoked from here.

+ * @note    This macro can be used to deactivate a power saving mode.

+ */

+#define CH_CFG_IDLE_LEAVE_HOOK() {                                          \

+  /* Idle-leave code here.*/                                                \

+}

+

+/**

+ * @brief   Idle Loop hook.

+ * @details This hook is continuously invoked by the idle thread loop.

+ */

+#define CH_CFG_IDLE_LOOP_HOOK() {                                           \

+  /* Idle loop code here.*/                                                 \

+}

+

+/**

+ * @brief   System tick event hook.

+ * @details This hook is invoked in the system tick handler immediately

+ *          after processing the virtual timers queue.

+ */

+#define CH_CFG_SYSTEM_TICK_HOOK() {                                         \

+  /* System tick event code here.*/                                         \

+}

+

+/**

+ * @brief   System halt hook.

+ * @details This hook is invoked in case to a system halting error before

+ *          the system is halted.

+ */

+#define CH_CFG_SYSTEM_HALT_HOOK(reason) {                                   \

+  /* System halt code here.*/                                               \

+}

+

+/**

+ * @brief   Trace hook.

+ * @details This hook is invoked each time a new record is written in the

+ *          trace buffer.

+ */

+#define CH_CFG_TRACE_HOOK(tep) {                                            \

+  /* Trace code here.*/                                                     \

+}

+

+/** @} */

+

+/*===========================================================================*/

+/* Port-specific settings (override port settings defaulted in chcore.h).    */

+/*===========================================================================*/

+

+#endif  /* CHCONF_H */

+

+/** @} */

diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-HTTPS-SEC/cfg/halconf.h b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-HTTPS-SEC/cfg/halconf.h
new file mode 100644
index 000000000..b4d277047
--- /dev/null
+++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-HTTPS-SEC/cfg/halconf.h
@@ -0,0 +1,518 @@
+/*

+    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+/**

+ * @file    templates/halconf.h

+ * @brief   HAL configuration header.

+ * @details HAL configuration file, this file allows to enable or disable the

+ *          various device drivers from your application. You may also use

+ *          this file in order to override the device drivers default settings.

+ *

+ * @addtogroup HAL_CONF

+ * @{

+ */

+

+#ifndef HALCONF_H

+#define HALCONF_H

+

+#define _CHIBIOS_HAL_CONF_

+#define _CHIBIOS_HAL_CONF_VER_6_0_

+

+#include "mcuconf.h"

+

+/**

+ * @brief   Enables the PAL subsystem.

+ */

+#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)

+#define HAL_USE_PAL                         TRUE

+#endif

+

+/**

+ * @brief   Enables the ADC subsystem.

+ */

+#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)

+#define HAL_USE_ADC                         FALSE

+#endif

+

+/**

+ * @brief   Enables the CAN subsystem.

+ */

+#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)

+#define HAL_USE_CAN                         FALSE

+#endif

+

+/**

+ * @brief   Enables the cryptographic subsystem.

+ */

+#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__)

+#define HAL_USE_CRY                         FALSE

+#endif

+

+/**

+ * @brief   Enables the DAC subsystem.

+ */

+#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)

+#define HAL_USE_DAC                         FALSE

+#endif

+

+/**

+ * @brief   Enables the EXT subsystem.

+ */

+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)

+#define HAL_USE_EXT                         FALSE

+#endif

+

+/**

+ * @brief   Enables the GPT subsystem.

+ */

+#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)

+#define HAL_USE_GPT                         FALSE

+#endif

+

+/**

+ * @brief   Enables the I2C subsystem.

+ */

+#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)

+#define HAL_USE_I2C                         FALSE

+#endif

+

+/**

+ * @brief   Enables the I2S subsystem.

+ */

+#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)

+#define HAL_USE_I2S                         FALSE

+#endif

+

+/**

+ * @brief   Enables the ICU subsystem.

+ */

+#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)

+#define HAL_USE_ICU                         FALSE

+#endif

+

+/**

+ * @brief   Enables the MAC subsystem.

+ */

+#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)

+#define HAL_USE_MAC                         FALSE

+#endif

+

+/**

+ * @brief   Enables the MMC_SPI subsystem.

+ */

+#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)

+#define HAL_USE_MMC_SPI                     FALSE

+#endif

+

+/**

+ * @brief   Enables the PWM subsystem.

+ */

+#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)

+#define HAL_USE_PWM                         FALSE

+#endif

+

+/**

+ * @brief   Enables the QSPI subsystem.

+ */

+#if !defined(HAL_USE_QSPI) || defined(__DOXYGEN__)

+#define HAL_USE_QSPI                        FALSE

+#endif

+

+/**

+ * @brief   Enables the RTC subsystem.

+ */

+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)

+#define HAL_USE_RTC                         TRUE

+#endif

+

+/**

+ * @brief   Enables the SDC subsystem.

+ */

+#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)

+#define HAL_USE_SDC                         FALSE

+#endif

+

+/**

+ * @brief   Enables the SERIAL subsystem.

+ */

+#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)

+#define HAL_USE_SERIAL                      TRUE

+#endif

+

+/**

+ * @brief   Enables the SERIAL over USB subsystem.

+ */

+#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)

+#define HAL_USE_SERIAL_USB                  FALSE

+#endif

+

+/**

+ * @brief   Enables the SPI subsystem.

+ */

+#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)

+#define HAL_USE_SPI                         FALSE

+#endif

+

+/**

+ * @brief   Enables the UART subsystem.

+ */

+#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)

+#define HAL_USE_UART                        FALSE

+#endif

+

+/**

+ * @brief   Enables the USB subsystem.

+ */

+#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)

+#define HAL_USE_USB                         FALSE

+#endif

+

+/**

+ * @brief   Enables the WDG subsystem.

+ */

+#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)

+#define HAL_USE_WDG                         FALSE

+#endif

+

+/*===========================================================================*/

+/* PAL driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables synchronous APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__)

+#define PAL_USE_CALLBACKS                   FALSE

+#endif

+

+/**

+ * @brief   Enables synchronous APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__)

+#define PAL_USE_WAIT                        FALSE

+#endif

+

+/*===========================================================================*/

+/* ADC driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables synchronous APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)

+#define ADC_USE_WAIT                        TRUE

+#endif

+

+/**

+ * @brief   Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)

+#define ADC_USE_MUTUAL_EXCLUSION            TRUE

+#endif

+

+/*===========================================================================*/

+/* CAN driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Sleep mode related APIs inclusion switch.

+ */

+#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)

+#define CAN_USE_SLEEP_MODE                  TRUE

+#endif

+

+/**

+ * @brief   Enforces the driver to use direct callbacks rather than OSAL events.

+ */

+#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__)

+#define CAN_ENFORCE_USE_CALLBACKS           FALSE

+#endif

+

+/*===========================================================================*/

+/* CRY driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables the SW fall-back of the cryptographic driver.

+ * @details When enabled, this option, activates a fall-back software

+ *          implementation for algorithms not supported by the underlying

+ *          hardware.

+ * @note    Fall-back implementations may not be present for all algorithms.

+ */

+#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__)

+#define HAL_CRY_USE_FALLBACK                FALSE

+#endif

+

+/**

+ * @brief   Makes the driver forcibly use the fall-back implementations.

+ */

+#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__)

+#define HAL_CRY_ENFORCE_FALLBACK            FALSE

+#endif

+

+/*===========================================================================*/

+/* DAC driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables synchronous APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__)

+#define DAC_USE_WAIT                        TRUE

+#endif

+

+/**

+ * @brief   Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)

+#define DAC_USE_MUTUAL_EXCLUSION            TRUE

+#endif

+

+/*===========================================================================*/

+/* I2C driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables the mutual exclusion APIs on the I2C bus.

+ */

+#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)

+#define I2C_USE_MUTUAL_EXCLUSION            TRUE

+#endif

+

+/*===========================================================================*/

+/* MAC driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables the zero-copy API.

+ */

+#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)

+#define MAC_USE_ZERO_COPY                   FALSE

+#endif

+

+/**

+ * @brief   Enables an event sources for incoming packets.

+ */

+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)

+#define MAC_USE_EVENTS                      TRUE

+#endif

+

+/*===========================================================================*/

+/* MMC_SPI driver related settings.                                          */

+/*===========================================================================*/

+

+/**

+ * @brief   Delays insertions.

+ * @details If enabled this options inserts delays into the MMC waiting

+ *          routines releasing some extra CPU time for the threads with

+ *          lower priority, this may slow down the driver a bit however.

+ *          This option is recommended also if the SPI driver does not

+ *          use a DMA channel and heavily loads the CPU.

+ */

+#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)

+#define MMC_NICE_WAITING                    TRUE

+#endif

+

+/*===========================================================================*/

+/* QSPI driver related settings.                                             */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables synchronous APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(QSPI_USE_WAIT) || defined(__DOXYGEN__)

+#define QSPI_USE_WAIT                       TRUE

+#endif

+

+/**

+ * @brief   Enables the @p qspiAcquireBus() and @p qspiReleaseBus() APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(QSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)

+#define QSPI_USE_MUTUAL_EXCLUSION           TRUE

+#endif

+

+/*===========================================================================*/

+/* SDC driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Number of initialization attempts before rejecting the card.

+ * @note    Attempts are performed at 10mS intervals.

+ */

+#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)

+#define SDC_INIT_RETRY                      100

+#endif

+

+/**

+ * @brief   Include support for MMC cards.

+ * @note    MMC support is not yet implemented so this option must be kept

+ *          at @p FALSE.

+ */

+#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)

+#define SDC_MMC_SUPPORT                     FALSE

+#endif

+

+/**

+ * @brief   Delays insertions.

+ * @details If enabled this options inserts delays into the MMC waiting

+ *          routines releasing some extra CPU time for the threads with

+ *          lower priority, this may slow down the driver a bit however.

+ */

+#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)

+#define SDC_NICE_WAITING                    TRUE

+#endif

+

+/**

+ * @brief   OCR initialization constant for V20 cards.

+ */

+#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__)

+#define SDC_INIT_OCR_V20                    0x50FF8000U

+#endif

+

+/**

+ * @brief   OCR initialization constant for non-V20 cards.

+ */

+#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__)

+#define SDC_INIT_OCR                        0x80100000U

+#endif

+

+/*===========================================================================*/

+/* SERIAL driver related settings.                                           */

+/*===========================================================================*/

+

+/**

+ * @brief   Default bit rate.

+ * @details Configuration parameter, this is the baud rate selected for the

+ *          default configuration.

+ */

+#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)

+#define SERIAL_DEFAULT_BITRATE              38400

+#endif

+

+/**

+ * @brief   Serial buffers size.

+ * @details Configuration parameter, you can change the depth of the queue

+ *          buffers depending on the requirements of your application.

+ * @note    The default is 16 bytes for both the transmission and receive

+ *          buffers.

+ */

+#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)

+#define SERIAL_BUFFERS_SIZE                 16

+#endif

+

+/*===========================================================================*/

+/* SERIAL_USB driver related setting.                                        */

+/*===========================================================================*/

+

+/**

+ * @brief   Serial over USB buffers size.

+ * @details Configuration parameter, the buffer size must be a multiple of

+ *          the USB data endpoint maximum packet size.

+ * @note    The default is 256 bytes for both the transmission and receive

+ *          buffers.

+ */

+#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)

+#define SERIAL_USB_BUFFERS_SIZE             256

+#endif

+

+/**

+ * @brief   Serial over USB number of buffers.

+ * @note    The default is 2 buffers.

+ */

+#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)

+#define SERIAL_USB_BUFFERS_NUMBER           2

+#endif

+

+/*===========================================================================*/

+/* SPI driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables synchronous APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)

+#define SPI_USE_WAIT                        TRUE

+#endif

+

+/**

+ * @brief   Enables circular transfers APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__)

+#define SPI_USE_CIRCULAR                    FALSE

+#endif

+

+

+/**

+ * @brief   Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)

+#define SPI_USE_MUTUAL_EXCLUSION            TRUE

+#endif

+

+/**

+ * @brief   Handling method for SPI CS line.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__)

+#define SPI_SELECT_MODE                     SPI_SELECT_MODE_PAD

+#endif

+

+/*===========================================================================*/

+/* UART driver related settings.                                             */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables synchronous APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)

+#define UART_USE_WAIT                       FALSE

+#endif

+

+/**

+ * @brief   Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)

+#define UART_USE_MUTUAL_EXCLUSION           FALSE

+#endif

+

+/*===========================================================================*/

+/* USB driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables synchronous APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)

+#define USB_USE_WAIT                        FALSE

+#endif

+

+#endif /* HALCONF_H */

+

+/** @} */

diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-HTTPS-SEC/cfg/mcuconf.h b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-HTTPS-SEC/cfg/mcuconf.h
new file mode 100644
index 000000000..4af515d48
--- /dev/null
+++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-HTTPS-SEC/cfg/mcuconf.h
@@ -0,0 +1,143 @@
+/*

+    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+#ifndef MCUCONF_H

+#define MCUCONF_H

+

+#define SAMA5D2x_MCUCONF

+

+/*

+ * HAL driver system settings.

+ */

+#define SAMA_HAL_IS_SECURE                  TRUE

+#define SAMA_NO_INIT                        TRUE

+#define SAMA_MOSCRC_ENABLED                 FALSE

+#define SAMA_MOSCXT_ENABLED                 TRUE

+#define SAMA_MOSC_SEL                       SAMA_MOSC_MOSCXT

+#define SAMA_OSC_SEL                        SAMA_OSC_OSCXT

+#define SAMA_MCK_SEL                        SAMA_MCK_PLLA_CLK

+#define SAMA_MCK_PRES_VALUE                 1

+#define SAMA_MCK_MDIV_VALUE                 3

+#define SAMA_PLLA_MUL_VALUE                 83

+#define SAMA_PLLADIV2_EN                    TRUE

+#define SAMA_H64MX_H32MX_RATIO              2

+

+/*

+ * SPI driver system settings.

+ */

+#define SAMA_SPI_USE_SPI0                   FALSE

+#define SAMA_SPI_USE_SPI1                   FALSE

+#define SAMA_SPI_USE_FLEXCOM0               FALSE

+#define SAMA_SPI_USE_FLEXCOM1               FALSE

+#define SAMA_SPI_USE_FLEXCOM2               FALSE

+#define SAMA_SPI_USE_FLEXCOM3               FALSE

+#define SAMA_SPI_USE_FLEXCOM4               FALSE

+#define SAMA_SPI_SPI0_DMA_IRQ_PRIORITY      4

+#define SAMA_SPI_SPI1_DMA_IRQ_PRIORITY      4

+#define SAMA_SPI_FLEXCOM0_DMA_IRQ_PRIORITY  4

+#define SAMA_SPI_FLEXCOM1_DMA_IRQ_PRIORITY  4

+#define SAMA_SPI_FLEXCOM2_DMA_IRQ_PRIORITY  4

+#define SAMA_SPI_FLEXCOM3_DMA_IRQ_PRIORITY  4

+#define SAMA_SPI_FLEXCOM4_DMA_IRQ_PRIORITY  4

+#define SAMA_SPI_DMA_ERROR_HOOK(spip)       osalSysHalt("DMA failure")

+

+/*

+ * SERIAL driver system settings.

+ */

+#define SAMA_SERIAL_USE_UART0               FALSE

+#define SAMA_SERIAL_USE_UART1               TRUE

+#define SAMA_SERIAL_USE_UART2               FALSE

+#define SAMA_SERIAL_USE_UART3               FALSE

+#define SAMA_SERIAL_USE_UART4               FALSE

+#define SAMA_SERIAL_USE_UART5               FALSE

+#define SAMA_SERIAL_USE_FLEXCOM0            FALSE

+#define SAMA_SERIAL_USE_FLEXCOM1            FALSE

+#define SAMA_SERIAL_USE_FLEXCOM2            FALSE

+#define SAMA_SERIAL_USE_FLEXCOM3            FALSE

+#define SAMA_SERIAL_USE_FLEXCOM4            FALSE

+#define SAMA_SERIAL_UART0_IRQ_PRIORITY      4

+#define SAMA_SERIAL_UART1_IRQ_PRIORITY      4

+#define SAMA_SERIAL_UART2_IRQ_PRIORITY      4

+#define SAMA_SERIAL_UART3_IRQ_PRIORITY      4

+#define SAMA_SERIAL_UART4_IRQ_PRIORITY      4

+#define SAMA_SERIAL_FLEXCOM0_IRQ_PRIORITY   4

+#define SAMA_SERIAL_FLEXCOM1_IRQ_PRIORITY   4

+#define SAMA_SERIAL_FLEXCOM2_IRQ_PRIORITY   4

+#define SAMA_SERIAL_FLEXCOM3_IRQ_PRIORITY   4

+#define SAMA_SERIAL_FLEXCOM4_IRQ_PRIORITY   4

+

+/*

+ * ST driver settings.

+ */

+#define SAMA_ST_USE_PIT                     FALSE

+#define SAMA_ST_USE_TC0                     FALSE

+#define SAMA_ST_USE_TC1                     TRUE

+

+/*

+ * SECUMOD driver settings.

+ */

+#define HAL_USE_SECUMOD                     FALSE

+

+/*

+ * SDMMC driver settings.

+ */

+#define HAL_USE_SDMMC                       FALSE

+

+/*

+ * TC driver system settings.

+ */

+#define HAL_USE_TC                          FALSE

+#define SAMA_USE_TC0                        FALSE

+#define SAMA_USE_TC1                        FALSE

+#define SAMA_TC0_IRQ_PRIORITY               2

+#define SAMA_TC1_IRQ_PRIORITY               2

+

+/*

+ * UART driver system settings.

+ */

+#define SAMA_UART_USE_UART0                 FALSE

+#define SAMA_UART_USE_UART1                 FALSE

+#define SAMA_UART_USE_UART2                 FALSE

+#define SAMA_UART_USE_UART3                 FALSE

+#define SAMA_UART_USE_UART4                 FALSE

+#define SAMA_UART_USE_FLEXCOM0              FALSE

+#define SAMA_UART_USE_FLEXCOM1              FALSE

+#define SAMA_UART_USE_FLEXCOM2              FALSE

+#define SAMA_UART_USE_FLEXCOM3              FALSE

+#define SAMA_UART_USE_FLEXCOM4              FALSE

+#define SAMA_UART_UART0_IRQ_PRIORITY        4

+#define SAMA_UART_UART1_IRQ_PRIORITY        4

+#define SAMA_UART_UART2_IRQ_PRIORITY        4

+#define SAMA_UART_UART3_IRQ_PRIORITY        4

+#define SAMA_UART_UART4_IRQ_PRIORITY        4

+#define SAMA_UART_FLEXCOM0_IRQ_PRIORITY     4

+#define SAMA_UART_FLEXCOM1_IRQ_PRIORITY     4

+#define SAMA_UART_FLEXCOM2_IRQ_PRIORITY     4

+#define SAMA_UART_FLEXCOM3_IRQ_PRIORITY     4

+#define SAMA_UART_FLEXCOM4_IRQ_PRIORITY     4

+#define SAMA_UART_UART0_DMA_IRQ_PRIORITY    4

+#define SAMA_UART_UART1_DMA_IRQ_PRIORITY    4

+#define SAMA_UART_UART2_DMA_IRQ_PRIORITY    4

+#define SAMA_UART_UART3_DMA_IRQ_PRIORITY    4

+#define SAMA_UART_UART4_DMA_IRQ_PRIORITY    4

+#define SAMA_UART_FLEXCOM0_DMA_IRQ_PRIORITY 4

+#define SAMA_UART_FLEXCOM1_DMA_IRQ_PRIORITY 4

+#define SAMA_UART_FLEXCOM2_DMA_IRQ_PRIORITY 4

+#define SAMA_UART_FLEXCOM3_DMA_IRQ_PRIORITY 4

+#define SAMA_UART_FLEXCOM4_DMA_IRQ_PRIORITY 4

+#define SAMA_UART_DMA_ERROR_HOOK(uartp)     osalSysHalt("DMA failure")

+

+#endif /* MCUCONF_H */

diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-HTTPS-SEC/cfg/user_settings.h b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-HTTPS-SEC/cfg/user_settings.h
new file mode 100644
index 000000000..006ad54e6
--- /dev/null
+++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-HTTPS-SEC/cfg/user_settings.h
@@ -0,0 +1,91 @@
+#include <stdint.h>
+
+/* Configuration */
+
+#define WOLFSSL_GENERAL_ALIGNMENT 4
+#define HAVE_TM_TYPE
+
+/* ChibiOS + Lwip */
+#define HAVE_LWIP_NATIVE 
+#define WOLFSSL_CHIBIOS 
+#define USER_TICKS 
+#define WOLFSSL_USER_CURRTIME 
+#define XMALLOC_OVERRIDE 
+//#define USE_WOLF_TIME_T
+#define XTIME(tl)       (epochTime())
+
+/* Lwip API used with wolfssl */
+#define WOLFSSL_USE_SOCKET
+//#define WOLFSSL_USE_NETCONN
+
+//#define WOLFCRYPT_ONLY
+
+/* ARM  */
+		
+#define RSA_LOW_MEM
+#define NO_OLD_RNGNAME
+#define NO_OLD_WC_NAMES
+#define SMALL_SESSION_CACHE
+#define WOLFSSL_SMALL_STACK
+
+#define TFM_ARM
+#define SINGLE_THREADED
+#define NO_SIG_WRAPPER
+		
+/* Cipher features */
+//#define USE_FAST_MATH
+//#define ALT_ECC_SIZE
+
+#define HAVE_TLS_EXTENSIONS
+#define HAVE_FFDHE_2048
+#define HAVE_CHACHA 
+#define HAVE_POLY1305 
+#define HAVE_ECC
+#define HAVE_CURVE25519
+#define CURVED25519_SMALL
+#define HAVE_ONE_TIME_AUTH
+#define WOLFSSL_DH_CONST
+		
+/* HW RNG support */
+
+//unsigned int chibios_rand_generate(void);
+//int custom_rand_generate_block(unsigned char* output, unsigned int sz);
+
+//#define CUSTOM_RAND_GENERATE chibios_rand_generate
+//#define CUSTOM_RAND_TYPE uint32_t
+
+#define HAVE_ED25519
+#define HAVE_POLY1305
+#define HAVE_SHA512
+#define WOLFSSL_SHA512
+
+/* Size/speed config */
+//#define USE_SLOW_SHA2
+
+/* Robustness */
+#define TFM_TIMING_RESISTANT
+#define ECC_TIMING_RESISTANT
+#define WC_RSA_BLINDING
+
+#define WOLFSSL_STATIC_RSA
+
+/* Remove Features */
+#define NO_WRITEV
+//#define NO_DEV_RANDOM
+#define NO_FILESYSTEM
+//#define NO_CERTS
+#define NO_MAIN_DRIVER
+#define NO_MD4
+#define NO_RABBIT
+#define NO_HC128
+#define NO_DSA
+#define NO_PWDBASED
+#define NO_PSK
+#define NO_64BIT
+#define NO_DES3
+#define NO_RC4
+
+/* Realloc (to use without USE_FAST_MATH) */
+
+void *chHeapRealloc (void *addr, uint32_t size);
+#define XREALLOC(p,n,h,t) chHeapRealloc( (p) , (n) )
diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-HTTPS-SEC/cfg/wolfssl.mk b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-HTTPS-SEC/cfg/wolfssl.mk
new file mode 100644
index 000000000..5884b876b
--- /dev/null
+++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-HTTPS-SEC/cfg/wolfssl.mk
@@ -0,0 +1,95 @@
+# List of the required lwIP files.
+WOLFSSL = 	$(CHIBIOS)/ext/wolfssl
+
+WOLFBINDSRC = \
+
+WOLFCRYPTSRC = \
+	$(WOLFSSL)/wolfcrypt/src/sha.c \
+	$(WOLFSSL)/wolfcrypt/src/ge_low_mem.c \
+	$(WOLFSSL)/wolfcrypt/src/compress.c \
+	$(WOLFSSL)/wolfcrypt/src/chacha20_poly1305.c \
+	$(WOLFSSL)/wolfcrypt/src/des3.c \
+	$(WOLFSSL)/wolfcrypt/src/fe_low_mem.c \
+	$(WOLFSSL)/wolfcrypt/src/hmac.c \
+	$(WOLFSSL)/wolfcrypt/src/asm.c \
+	$(WOLFSSL)/wolfcrypt/src/camellia.c \
+	$(WOLFSSL)/wolfcrypt/src/ecc.c \
+	$(WOLFSSL)/wolfcrypt/src/ecc_fp.c \
+	$(WOLFSSL)/wolfcrypt/src/ripemd.c \
+	$(WOLFSSL)/wolfcrypt/src/rsa.c \
+	$(WOLFSSL)/wolfcrypt/src/wc_port.c \
+	$(WOLFSSL)/wolfcrypt/src/arc4.c \
+	$(WOLFSSL)/wolfcrypt/src/srp.c \
+	$(WOLFSSL)/wolfcrypt/src/random.c \
+	$(WOLFSSL)/wolfcrypt/src/idea.c \
+	$(WOLFSSL)/wolfcrypt/src/blake2b.c \
+	$(WOLFSSL)/wolfcrypt/src/error.c \
+	$(WOLFSSL)/wolfcrypt/src/dh.c \
+	$(WOLFSSL)/wolfcrypt/src/asn.c \
+	$(WOLFSSL)/wolfcrypt/src/cmac.c \
+	$(WOLFSSL)/wolfcrypt/src/signature.c \
+	$(WOLFSSL)/wolfcrypt/src/pwdbased.c \
+	$(WOLFSSL)/wolfcrypt/src/chacha.c \
+	$(WOLFSSL)/wolfcrypt/src/md5.c \
+	$(WOLFSSL)/wolfcrypt/src/aes.c \
+	$(WOLFSSL)/wolfcrypt/src/wolfmath.c \
+	$(WOLFSSL)/wolfcrypt/src/memory.c \
+	$(WOLFSSL)/wolfcrypt/src/logging.c \
+	$(WOLFSSL)/wolfcrypt/src/tfm.c \
+	$(WOLFSSL)/wolfcrypt/src/coding.c \
+	$(WOLFSSL)/wolfcrypt/src/rabbit.c \
+	$(WOLFSSL)/wolfcrypt/src/pkcs12.c \
+	$(WOLFSSL)/wolfcrypt/src/md2.c \
+	$(WOLFSSL)/wolfcrypt/src/ge_operations.c \
+	$(WOLFSSL)/wolfcrypt/src/sha512.c \
+	$(WOLFSSL)/wolfcrypt/src/sha3.c \
+	$(WOLFSSL)/wolfcrypt/src/port/nrf51.c \
+	$(WOLFSSL)/wolfcrypt/src/port/pic32/pic32mz-crypt.c \
+	$(WOLFSSL)/wolfcrypt/src/port/atmel/atmel.c \
+	$(WOLFSSL)/wolfcrypt/src/port/nxp/ksdk_port.c \
+	$(WOLFSSL)/wolfcrypt/src/port/ti/ti-des3.c \
+	$(WOLFSSL)/wolfcrypt/src/port/ti/ti-ccm.c \
+	$(WOLFSSL)/wolfcrypt/src/port/ti/ti-hash.c \
+	$(WOLFSSL)/wolfcrypt/src/port/ti/ti-aes.c \
+	$(WOLFSSL)/wolfcrypt/src/port/arm/armv8-aes.c \
+	$(WOLFSSL)/wolfcrypt/src/port/arm/armv8-sha256.c \
+	$(WOLFSSL)/wolfcrypt/src/port/xilinx/xil-aesgcm.c \
+	$(WOLFSSL)/wolfcrypt/src/port/xilinx/xil-sha3.c \
+	$(WOLFSSL)/wolfcrypt/src/hash.c \
+	$(WOLFSSL)/wolfcrypt/src/curve25519.c \
+	$(WOLFSSL)/wolfcrypt/src/integer.c \
+	$(WOLFSSL)/wolfcrypt/src/wolfevent.c \
+	$(WOLFSSL)/wolfcrypt/src/dsa.c \
+	$(WOLFSSL)/wolfcrypt/src/pkcs7.c \
+	$(WOLFSSL)/wolfcrypt/src/wc_encrypt.c \
+	$(WOLFSSL)/wolfcrypt/src/cpuid.c \
+	$(WOLFSSL)/wolfcrypt/src/sha256.c \
+	$(WOLFSSL)/wolfcrypt/src/md4.c \
+	$(WOLFSSL)/wolfcrypt/src/fe_operations.c \
+	$(WOLFSSL)/wolfcrypt/src/ed25519.c \
+	$(WOLFSSL)/wolfcrypt/src/poly1305.c \
+	$(WOLFSSL)/wolfcrypt/src/hc128.c \
+
+WOLFSSLSRC = \
+	$(WOLFSSL)/src/internal.c \
+	$(WOLFSSL)/src/tls.c \
+	$(WOLFSSL)/src/keys.c \
+	$(WOLFSSL)/src/crl.c \
+	$(WOLFSSL)/src/ssl.c \
+	$(WOLFSSL)/src/wolfio.c \
+	$(WOLFSSL)/src/sniffer.c \
+	$(WOLFSSL)/src/ocsp.c \
+	$(WOLFSSL)/src/tls13.c
+
+
+WOLFSRC = $(WOLFBINDSRC) $(WOLFCRYPTSRC) $(WOLFSSLSRC)
+
+WOLFINC = \
+        $(WOLFSSL)/wolfcrypt/include \
+        $(WOLFSSL)/wolfssl/include \
+		$(WOLFSSL)
+
+# Shared variables
+ALLCSRC += $(WOLFSRC)
+ALLINC  += $(WOLFINC)
+