git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1771 35acf78f-673a-0410-8e92-d51de3d6d3f4

2 files changed, 21 insertions, 20 deletions

diff --git a/demos/ARMCM3-STM32F103-FATFS-GCC/Makefile b/demos/ARMCM3-STM32F103-FATFS-GCC/Makefile
index a4822a4c7..ced25453b 100644
--- a/demos/ARMCM3-STM32F103-FATFS-GCC/Makefile
+++ b/demos/ARMCM3-STM32F103-FATFS-GCC/Makefile
@@ -60,7 +60,7 @@ CHIBIOS = ../..
 include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk

 include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk

 include $(CHIBIOS)/os/hal/hal.mk

-include $(CHIBIOS)/os/ports/GCC/ARMCM3/port.mk

+include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F103/port.mk

 include $(CHIBIOS)/os/kernel/kernel.mk

 include $(CHIBIOS)/test/test.mk

 include $(CHIBIOS)/ext/fatfs/fatfs.mk

@@ -104,7 +104,7 @@ TCPPSRC =
 

 # List ASM source files here

 ASMSRC = $(PORTASM) \

-         $(CHIBIOS)/os/ports/GCC/ARMCM3/STM32F103/vectors.s

+         $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F103/vectors.s

 

 INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \

          $(HALINC) $(PLATFORMINC) $(BOARDINC) \

@@ -156,7 +156,7 @@ CPPWARN = -Wall -Wextra
 #

 

 # List all default C defines here, like -D_DEBUG=1

-DDEFS = -DSTDOUT_SD=SD2 -DSTDIN_SD=SD2

+DDEFS = -DSTM32F10X_MD -DSTDOUT_SD=SD2 -DSTDIN_SD=SD2

 

 # List all default ASM defines here, like -D_DEBUG=1

 DADEFS =

diff --git a/demos/ARMCM3-STM32F103-FATFS-GCC/mcuconf.h b/demos/ARMCM3-STM32F103-FATFS-GCC/mcuconf.h
index f7ce9ef55..ae6a7a125 100644
--- a/demos/ARMCM3-STM32F103-FATFS-GCC/mcuconf.h
+++ b/demos/ARMCM3-STM32F103-FATFS-GCC/mcuconf.h
@@ -25,10 +25,11 @@
  * is enabled in halconf.h.

  *

  * IRQ priorities:

- * 0xF0         Lowest, priority level reserved for PENDSV.

- * 0xE0...0x40  Normal IRQs priority levels (0x80 used by SYSTICK).

- * 0x30         Used by SVCALL, do not share.

- * 0x20...0x00  Fast interrupts, can preempt the kernel but cannot use it.

+ * 15           Lowest, priority level reserved for PENDSV.

+ * 14...4       Normal IRQs priority levels (0x80 used by SYSTICK).

+ * 3            Used by SVCALL, do not share.

+ * 2...0        Fast interrupts, can preempt the kernel but cannot use it

+ *              directly.

  *

  * DMA priorities:

  * 0...3        Lowest...Highest.

@@ -44,14 +45,14 @@
  */

 #define USE_STM32_ADC1              TRUE

 #define STM32_ADC1_DMA_PRIORITY     3

-#define STM32_ADC1_IRQ_PRIORITY     0x50

+#define STM32_ADC1_IRQ_PRIORITY     CORTEX_PRIORITY(5)

 #define STM32_ADC1_DMA_ERROR_HOOK() chSysHalt()

 

 /*

  * CAN driver system settings.

  */

 #define USE_STM32_CAN1              TRUE

-#define STM32_CAN1_IRQ_PRIORITY     0xB0

+#define STM32_CAN1_IRQ_PRIORITY     CORTEX_PRIORITY(11)

 

 /*

  * PWM driver system settings.

@@ -60,10 +61,10 @@
 #define USE_STM32_PWM2              FALSE

 #define USE_STM32_PWM3              FALSE

 #define USE_STM32_PWM4              FALSE

-#define STM32_PWM1_IRQ_PRIORITY     0x70

-#define STM32_PWM2_IRQ_PRIORITY     0x70

-#define STM32_PWM3_IRQ_PRIORITY     0x70

-#define STM32_PWM4_IRQ_PRIORITY     0x70

+#define STM32_PWM1_IRQ_PRIORITY     CORTEX_PRIORITY(7)

+#define STM32_PWM2_IRQ_PRIORITY     CORTEX_PRIORITY(7)

+#define STM32_PWM3_IRQ_PRIORITY     CORTEX_PRIORITY(7)

+#define STM32_PWM4_IRQ_PRIORITY     CORTEX_PRIORITY(7)

 

 /*

  * SERIAL driver system settings.

@@ -75,12 +76,12 @@
 #define USE_STM32_UART4             FALSE

 #define USE_STM32_UART5             FALSE

 #endif

-#define STM32_USART1_PRIORITY       0xC0

-#define STM32_USART2_PRIORITY       0xC0

-#define STM32_USART3_PRIORITY       0xC0

+#define STM32_USART1_PRIORITY       CORTEX_PRIORITY(12)

+#define STM32_USART2_PRIORITY       CORTEX_PRIORITY(12)

+#define STM32_USART3_PRIORITY       CORTEX_PRIORITY(12)

 #if defined(STM32F10X_HD) || defined(STM32F10X_CL)

-#define STM32_UART4_PRIORITY        0xC0

-#define STM32_UART5_PRIORITY        0xC0

+#define STM32_UART4_PRIORITY        CORTEX_PRIORITY(12)

+#define STM32_UART5_PRIORITY        CORTEX_PRIORITY(12)

 #endif

 

 /*

@@ -90,6 +91,6 @@
 #define USE_STM32_SPI2              TRUE

 #define STM32_SPI1_DMA_PRIORITY     2

 #define STM32_SPI2_DMA_PRIORITY     2

-#define STM32_SPI1_IRQ_PRIORITY     0xA0

-#define STM32_SPI2_IRQ_PRIORITY     0xA0

+#define STM32_SPI1_IRQ_PRIORITY     CORTEX_PRIORITY(10)

+#define STM32_SPI2_IRQ_PRIORITY     CORTEX_PRIORITY(10)

 #define STM32_SPI1_DMA_ERROR_HOOK() chSysHalt()