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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2010-11-15 19:44:09 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2010-11-15 19:44:09 +0000
commit5962467685985de2d79a85a1fcf8b1961d3d72de (patch)
tree5c788196a537443c252e27c06e07faf711d7e44a /boards
parentb28de36fe95f0755d01a32c33e6f5faffb0af753 (diff)
downloadChibiOS-5962467685985de2d79a85a1fcf8b1961d3d72de.tar.gz
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Added STM32VL-Discovery demo. Changes to all the board files.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2370 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'boards')
-rw-r--r--boards/EA_LPCXPRESSO_BB_1114/board.c12
-rw-r--r--boards/EA_LPCXPRESSO_BB_1343/board.c12
-rw-r--r--boards/OLIMEX_LPC_P2148/board.c14
-rw-r--r--boards/OLIMEX_MSP430_P1611/board.c27
-rw-r--r--boards/OLIMEX_SAM7_EX256/board.c14
-rw-r--r--boards/OLIMEX_SAM7_P256/board.c14
-rw-r--r--boards/OLIMEX_STM32_H103/board.c14
-rw-r--r--boards/OLIMEX_STM32_P103/board.c14
-rw-r--r--boards/RAISONANCE_REVA_STM8S/board.c16
-rw-r--r--boards/ST_STM3210C_EVAL/board.c14
-rw-r--r--boards/ST_STM32VL_DISCOVERY/board.c63
-rw-r--r--boards/ST_STM32VL_DISCOVERY/board.h136
-rw-r--r--boards/ST_STM32VL_DISCOVERY/board.mk5
-rw-r--r--boards/ST_STM8L_DISCOVERY/board.c17
-rw-r--r--boards/ST_STM8S_DISCOVERY/board.c16
15 files changed, 388 insertions, 0 deletions
diff --git a/boards/EA_LPCXPRESSO_BB_1114/board.c b/boards/EA_LPCXPRESSO_BB_1114/board.c
index 79a2f790c..60fb7eed3 100644
--- a/boards/EA_LPCXPRESSO_BB_1114/board.c
+++ b/boards/EA_LPCXPRESSO_BB_1114/board.c
@@ -20,6 +20,18 @@
#include "ch.h"
#include "hal.h"
+/**
+ * @brief PAL setup.
+ * @details Digital I/O ports static configuration as defined in @p board.h.
+ * This variable is used by the HAL when initializing the PAL driver.
+ */
+const PALConfig pal_default_config = {
+ {VAL_GPIO0DATA, VAL_GPIO0DIR},
+ {VAL_GPIO1DATA, VAL_GPIO1DIR},
+ {VAL_GPIO2DATA, VAL_GPIO2DIR},
+ {VAL_GPIO3DATA, VAL_GPIO3DIR},
+};
+
/*
* Early initialization code.
* This initialization is performed just after reset before BSS and DATA
diff --git a/boards/EA_LPCXPRESSO_BB_1343/board.c b/boards/EA_LPCXPRESSO_BB_1343/board.c
index fa2ab83cc..4055ee116 100644
--- a/boards/EA_LPCXPRESSO_BB_1343/board.c
+++ b/boards/EA_LPCXPRESSO_BB_1343/board.c
@@ -20,6 +20,18 @@
#include "ch.h"
#include "hal.h"
+/**
+ * @brief PAL setup.
+ * @details Digital I/O ports static configuration as defined in @p board.h.
+ * This variable is used by the HAL when initializing the PAL driver.
+ */
+const PALConfig pal_default_config = {
+ {VAL_GPIO0DATA, VAL_GPIO0DIR},
+ {VAL_GPIO1DATA, VAL_GPIO1DIR},
+ {VAL_GPIO2DATA, VAL_GPIO2DIR},
+ {VAL_GPIO3DATA, VAL_GPIO3DIR},
+};
+
/*
* Early initialization code.
* This initialization is performed just after reset before BSS and DATA
diff --git a/boards/OLIMEX_LPC_P2148/board.c b/boards/OLIMEX_LPC_P2148/board.c
index a1ffef73b..26cce1d90 100644
--- a/boards/OLIMEX_LPC_P2148/board.c
+++ b/boards/OLIMEX_LPC_P2148/board.c
@@ -22,6 +22,20 @@
#define VAL_TC0_PRESCALER 0
+/**
+ * @brief PAL setup.
+ * @details Digital I/O ports static configuration as defined in @p board.h.
+ * This variable is used by the HAL when initializing the PAL driver.
+ */
+const PALConfig pal_default_config =
+{
+ VAL_PINSEL0,
+ VAL_PINSEL1,
+ VAL_PINSEL2,
+ {VAL_FIO0PIN, VAL_FIO0DIR},
+ {VAL_FIO1PIN, VAL_FIO1DIR}
+};
+
/*
* Timer 0 IRQ handling here.
*/
diff --git a/boards/OLIMEX_MSP430_P1611/board.c b/boards/OLIMEX_MSP430_P1611/board.c
index 8bfb0666c..072b1dd5a 100644
--- a/boards/OLIMEX_MSP430_P1611/board.c
+++ b/boards/OLIMEX_MSP430_P1611/board.c
@@ -22,6 +22,33 @@
#include "ch.h"
#include "hal.h"
+/**
+ * @brief PAL setup.
+ * @details Digital I/O ports static configuration as defined in @p board.h.
+ * This variable is used by the HAL when initializing the PAL driver.
+ */
+const PALConfig pal_default_config =
+{
+#if defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__)
+ {VAL_P1OUT, VAL_P1DIR},
+#endif
+#if defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__)
+ {VAL_P2OUT, VAL_P2DIR},
+#endif
+#if defined(__MSP430_HAS_PORT3__) || defined(__MSP430_HAS_PORT3_R__)
+ {VAL_P3OUT, VAL_P3DIR},
+#endif
+#if defined(__MSP430_HAS_PORT4__) || defined(__MSP430_HAS_PORT4_R__)
+ {VAL_P4OUT, VAL_P4DIR},
+#endif
+#if defined(__MSP430_HAS_PORT5__) || defined(__MSP430_HAS_PORT5_R__)
+ {VAL_P5OUT, VAL_P5DIR},
+#endif
+#if defined(__MSP430_HAS_PORT6__) || defined(__MSP430_HAS_PORT6_R__)
+ {VAL_P6OUT, VAL_P6DIR},
+#endif
+};
+
CH_IRQ_HANDLER(TIMERA0_VECTOR) {
CH_IRQ_PROLOGUE();
diff --git a/boards/OLIMEX_SAM7_EX256/board.c b/boards/OLIMEX_SAM7_EX256/board.c
index c918bda35..38c84fc1d 100644
--- a/boards/OLIMEX_SAM7_EX256/board.c
+++ b/boards/OLIMEX_SAM7_EX256/board.c
@@ -20,6 +20,20 @@
#include "ch.h"
#include "hal.h"
+/**
+ * @brief PAL setup.
+ * @details Digital I/O ports static configuration as defined in @p board.h.
+ * This variable is used by the HAL when initializing the PAL driver.
+ */
+const PALConfig pal_default_config =
+{
+ {VAL_PIOA_ODSR, VAL_PIOA_OSR, VAL_PIOA_PUSR},
+#if (SAM7_PLATFORM == SAM7X128) || (SAM7_PLATFORM == SAM7X256) || \
+ (SAM7_PLATFORM == SAM7X512)
+ {VAL_PIOB_ODSR, VAL_PIOB_OSR, VAL_PIOB_PUSR}
+#endif
+};
+
/*
* SYS IRQ handling here.
*/
diff --git a/boards/OLIMEX_SAM7_P256/board.c b/boards/OLIMEX_SAM7_P256/board.c
index 0090353fa..12b221930 100644
--- a/boards/OLIMEX_SAM7_P256/board.c
+++ b/boards/OLIMEX_SAM7_P256/board.c
@@ -20,6 +20,20 @@
#include "ch.h"
#include "hal.h"
+/**
+ * @brief PAL setup.
+ * @details Digital I/O ports static configuration as defined in @p board.h.
+ * This variable is used by the HAL when initializing the PAL driver.
+ */
+const PALConfig pal_default_config =
+{
+ {VAL_PIOA_ODSR, VAL_PIOA_OSR, VAL_PIOA_PUSR},
+#if (SAM7_PLATFORM == SAM7X128) || (SAM7_PLATFORM == SAM7X256) || \
+ (SAM7_PLATFORM == SAM7X512)
+ {VAL_PIOB_ODSR, VAL_PIOB_OSR, VAL_PIOB_PUSR}
+#endif
+};
+
/*
* SYS IRQ handling here.
*/
diff --git a/boards/OLIMEX_STM32_H103/board.c b/boards/OLIMEX_STM32_H103/board.c
index 77f958101..1f48eb629 100644
--- a/boards/OLIMEX_STM32_H103/board.c
+++ b/boards/OLIMEX_STM32_H103/board.c
@@ -20,6 +20,20 @@
#include "ch.h"
#include "hal.h"
+/**
+ * @brief PAL setup.
+ * @details Digital I/O ports static configuration as defined in @p board.h.
+ * This variable is used by the HAL when initializing the PAL driver.
+ */
+const PALConfig pal_default_config =
+{
+ {VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},
+ {VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
+ {VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
+ {VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
+ {VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
+};
+
/*
* Early initialization code.
* This initialization is performed just after reset before BSS and DATA
diff --git a/boards/OLIMEX_STM32_P103/board.c b/boards/OLIMEX_STM32_P103/board.c
index 77f958101..1f48eb629 100644
--- a/boards/OLIMEX_STM32_P103/board.c
+++ b/boards/OLIMEX_STM32_P103/board.c
@@ -20,6 +20,20 @@
#include "ch.h"
#include "hal.h"
+/**
+ * @brief PAL setup.
+ * @details Digital I/O ports static configuration as defined in @p board.h.
+ * This variable is used by the HAL when initializing the PAL driver.
+ */
+const PALConfig pal_default_config =
+{
+ {VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},
+ {VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
+ {VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
+ {VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
+ {VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
+};
+
/*
* Early initialization code.
* This initialization is performed just after reset before BSS and DATA
diff --git a/boards/RAISONANCE_REVA_STM8S/board.c b/boards/RAISONANCE_REVA_STM8S/board.c
index 9c785627c..770b51efb 100644
--- a/boards/RAISONANCE_REVA_STM8S/board.c
+++ b/boards/RAISONANCE_REVA_STM8S/board.c
@@ -20,6 +20,22 @@
#include "ch.h"
#include "hal.h"
+/**
+ * @brief PAL setup.
+ * @details Digital I/O ports static configuration as defined in @p board.h.
+ */
+ROMCONST PALConfig pal_default_config =
+{
+ {
+ {VAL_GPIOAODR, 0, VAL_GPIOADDR, VAL_GPIOACR1, VAL_GPIOACR2},
+ {VAL_GPIOBODR, 0, VAL_GPIOBDDR, VAL_GPIOBCR1, VAL_GPIOBCR2},
+ {VAL_GPIOCODR, 0, VAL_GPIOCDDR, VAL_GPIOCCR1, VAL_GPIOCCR2},
+ {VAL_GPIODODR, 0, VAL_GPIODDDR, VAL_GPIODCR1, VAL_GPIODCR2},
+ {VAL_GPIOEODR, 0, VAL_GPIOEDDR, VAL_GPIOECR1, VAL_GPIOECR2},
+ {VAL_GPIOFODR, 0, VAL_GPIOFDDR, VAL_GPIOFCR1, VAL_GPIOFCR2},
+ {VAL_GPIOGODR, 0, VAL_GPIOGDDR, VAL_GPIOGCR1, VAL_GPIOGCR2},
+};
+
/*
* TIM 2 clock after the prescaler.
*/
diff --git a/boards/ST_STM3210C_EVAL/board.c b/boards/ST_STM3210C_EVAL/board.c
index e9179f9e9..0dfa60bfc 100644
--- a/boards/ST_STM3210C_EVAL/board.c
+++ b/boards/ST_STM3210C_EVAL/board.c
@@ -20,6 +20,20 @@
#include "ch.h"
#include "hal.h"
+/**
+ * @brief PAL setup.
+ * @details Digital I/O ports static configuration as defined in @p board.h.
+ * This variable is used by the HAL when initializing the PAL driver.
+ */
+const PALConfig pal_default_config =
+{
+ {VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},
+ {VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
+ {VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
+ {VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
+ {VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
+};
+
/*
* Early initialization code.
* This initialization is performed just after reset before BSS and DATA
diff --git a/boards/ST_STM32VL_DISCOVERY/board.c b/boards/ST_STM32VL_DISCOVERY/board.c
new file mode 100644
index 000000000..1f48eb629
--- /dev/null
+++ b/boards/ST_STM32VL_DISCOVERY/board.c
@@ -0,0 +1,63 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#include "ch.h"
+#include "hal.h"
+
+/**
+ * @brief PAL setup.
+ * @details Digital I/O ports static configuration as defined in @p board.h.
+ * This variable is used by the HAL when initializing the PAL driver.
+ */
+const PALConfig pal_default_config =
+{
+ {VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},
+ {VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
+ {VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
+ {VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
+ {VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
+};
+
+/*
+ * Early initialization code.
+ * This initialization is performed just after reset before BSS and DATA
+ * segments initialization.
+ */
+void hwinit0(void) {
+
+ stm32_clock_init();
+}
+
+/*
+ * Late initialization code.
+ * This initialization is performed after BSS and DATA segments initialization
+ * and before invoking the main() function.
+ */
+void hwinit1(void) {
+
+ /*
+ * HAL initialization.
+ */
+ halInit();
+
+ /*
+ * ChibiOS/RT initialization.
+ */
+ chSysInit();
+}
diff --git a/boards/ST_STM32VL_DISCOVERY/board.h b/boards/ST_STM32VL_DISCOVERY/board.h
new file mode 100644
index 000000000..a63c71aad
--- /dev/null
+++ b/boards/ST_STM32VL_DISCOVERY/board.h
@@ -0,0 +1,136 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+/*
+ * Setup for STMicroelectronics STM32VL-Discovery board.
+ */
+
+/*
+ * Board identifier.
+ */
+#define BOARD_ST_STM32VL_DISCOVERY
+#define BOARD_NAME "ST STM32VL-Discovery"
+
+/*
+ * Board frequencies.
+ */
+#define STM32_LSECLK 32768
+#define STM32_HSECLK 8000000
+
+/*
+ * MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h.
+ */
+#define STM32F100xB
+
+/*
+ * IO pins assignments.
+ */
+#define GPIOA_BUTTON 0
+#define GPIOA_SPI1NSS 4
+
+#define GPIOB_SPI2NSS 12
+
+#define GPIOC_LED4 8
+#define GPIOC_LED3 9
+
+/*
+ * I/O ports initial setup, this configuration is established soon after reset
+ * in the initialization code.
+ *
+ * The digits have the following meaning:
+ * 0 - Analog input.
+ * 1 - Push Pull output 10MHz.
+ * 2 - Push Pull output 2MHz.
+ * 3 - Push Pull output 50MHz.
+ * 4 - Digital input.
+ * 5 - Open Drain output 10MHz.
+ * 6 - Open Drain output 2MHz.
+ * 7 - Open Drain output 50MHz.
+ * 8 - Digital input with PullUp or PullDown resistor depending on ODR.
+ * 9 - Alternate Push Pull output 10MHz.
+ * A - Alternate Push Pull output 2MHz.
+ * B - Alternate Push Pull output 50MHz.
+ * C - Reserved.
+ * D - Alternate Open Drain output 10MHz.
+ * E - Alternate Open Drain output 2MHz.
+ * F - Alternate Open Drain output 50MHz.
+ * Please refer to the STM32 Reference Manual for details.
+ */
+
+/*
+ * Port A setup.
+ * Everything input with pull-up except:
+ * PA0 - Normal input (BUTTON).
+ * PA2 - Alternate output (USART2 TX).
+ * PA3 - Normal input (USART2 RX).
+ * PA4 - Push pull output (SPI1 NSS), initially high state.
+ * PA5 - Alternate output (SPI1 SCK).
+ * PA6 - Normal input (SPI1 MISO).
+ * PA7 - Alternate output (SPI1 MOSI).
+ * PA9 - Alternate output (USART1 TX).
+ * PA10 - Normal input (USART1 RX).
+ */
+#define VAL_GPIOACRL 0xB4B34B84 /* PA7...PA0 */
+#define VAL_GPIOACRH 0x888884B8 /* PA15...PA8 */
+#define VAL_GPIOAODR 0xFFFFFFFF
+
+/*
+ * Port B setup.
+ * Everything input with pull-up except:
+ * PB12 - Push pull output (SPI2 NSS), initially high state.
+ * PB13 - Alternate output (SPI2 SCK).
+ * PB14 - Normal input (SPI2 MISO).
+ * PB15 - Alternate output (SPI2 MOSI).
+ */
+#define VAL_GPIOBCRL 0x88888888 /* PB7...PB0 */
+#define VAL_GPIOBCRH 0xB4B38888 /* PB15...PB8 */
+#define VAL_GPIOBODR 0xFFFFFFFF
+
+/*
+ * Port C setup.
+ * Everything input with pull-up except:
+ * PC8 - Push-pull output (LED4), initially low state.
+ * PC9 - Push-pull output (LED3), initially low state.
+ */
+#define VAL_GPIOCCRL 0x88888888 /* PC7...PC0 */
+#define VAL_GPIOCCRH 0x88888833 /* PC15...PC8 */
+#define VAL_GPIOCODR 0xFFFFFCFF
+
+/*
+ * Port D setup.
+ * Everything input with pull-up except:
+ * PD0 - Normal input (XTAL).
+ * PD1 - Normal input (XTAL).
+ */
+#define VAL_GPIODCRL 0x88888844 /* PD7...PD0 */
+#define VAL_GPIODCRH 0x88888888 /* PD15...PD8 */
+#define VAL_GPIODODR 0xFFFFFFFF
+
+/*
+ * Port E setup.
+ * Everything input with pull-up except:
+ */
+#define VAL_GPIOECRL 0x88888888 /* PE7...PE0 */
+#define VAL_GPIOECRH 0x88888888 /* PE15...PE8 */
+#define VAL_GPIOEODR 0xFFFFFFFF
+
+#endif /* _BOARD_H_ */
diff --git a/boards/ST_STM32VL_DISCOVERY/board.mk b/boards/ST_STM32VL_DISCOVERY/board.mk
new file mode 100644
index 000000000..36467943c
--- /dev/null
+++ b/boards/ST_STM32VL_DISCOVERY/board.mk
@@ -0,0 +1,5 @@
+# List of all the board related files.
+BOARDSRC = ${CHIBIOS}/boards/ST_STM32VL_DISCOVERY/board.c
+
+# Required include directories
+BOARDINC = ${CHIBIOS}/boards/ST_STM32VL_DISCOVERY
diff --git a/boards/ST_STM8L_DISCOVERY/board.c b/boards/ST_STM8L_DISCOVERY/board.c
index 8a013fa26..c7c44809e 100644
--- a/boards/ST_STM8L_DISCOVERY/board.c
+++ b/boards/ST_STM8L_DISCOVERY/board.c
@@ -20,6 +20,23 @@
#include "ch.h"
#include "hal.h"
+/**
+ * @brief PAL setup.
+ * @details Digital I/O ports static configuration as defined in @p board.h.
+ * This variable is used by the HAL when initializing the PAL driver.
+ */
+ROMCONST PALConfig pal_default_config =
+{
+ {
+ {VAL_GPIOAODR, 0, VAL_GPIOADDR, VAL_GPIOACR1, VAL_GPIOACR2},
+ {VAL_GPIOBODR, 0, VAL_GPIOBDDR, VAL_GPIOBCR1, VAL_GPIOBCR2},
+ {VAL_GPIOCODR, 0, VAL_GPIOCDDR, VAL_GPIOCCR1, VAL_GPIOCCR2},
+ {VAL_GPIODODR, 0, VAL_GPIODDDR, VAL_GPIODCR1, VAL_GPIODCR2},
+ {VAL_GPIOEODR, 0, VAL_GPIOEDDR, VAL_GPIOECR1, VAL_GPIOECR2},
+ {VAL_GPIOFODR, 0, VAL_GPIOFDDR, VAL_GPIOFCR1, VAL_GPIOFCR2},
+ }
+};
+
/*
* TIM 2 clock after the prescaler.
*/
diff --git a/boards/ST_STM8S_DISCOVERY/board.c b/boards/ST_STM8S_DISCOVERY/board.c
index 201a2b239..0d41f79ff 100644
--- a/boards/ST_STM8S_DISCOVERY/board.c
+++ b/boards/ST_STM8S_DISCOVERY/board.c
@@ -20,6 +20,22 @@
#include "ch.h"
#include "hal.h"
+/**
+ * @brief PAL setup.
+ * @details Digital I/O ports static configuration as defined in @p board.h.
+ */
+ROMCONST PALConfig pal_default_config =
+{
+ {
+ {VAL_GPIOAODR, 0, VAL_GPIOADDR, VAL_GPIOACR1, VAL_GPIOACR2},
+ {VAL_GPIOBODR, 0, VAL_GPIOBDDR, VAL_GPIOBCR1, VAL_GPIOBCR2},
+ {VAL_GPIOCODR, 0, VAL_GPIOCDDR, VAL_GPIOCCR1, VAL_GPIOCCR2},
+ {VAL_GPIODODR, 0, VAL_GPIODDDR, VAL_GPIODCR1, VAL_GPIODCR2},
+ {VAL_GPIOEODR, 0, VAL_GPIOEDDR, VAL_GPIOECR1, VAL_GPIOECR2},
+ {VAL_GPIOFODR, 0, VAL_GPIOFDDR, VAL_GPIOFCR1, VAL_GPIOFCR2},
+ {VAL_GPIOGODR, 0, VAL_GPIOGDDR, VAL_GPIOGCR1, VAL_GPIOGCR2},
+};
+
/*
* TIM 2 clock after the prescaler.
*/