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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-11-10 14:36:26 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-11-10 14:36:26 +0000 |
| commit | 2e065803c90233b5ae5cd094cdbf45efa32a4b19 (patch) | |
| tree | bec05ca166e9d4cdb9c17d5d367701945a8b13e2 /boards/ST_STM8L_DISCOVERY/board.h | |
| parent | e5c365f61563007712f5f28500e04ba61e33994a (diff) | |
| download | ChibiOS-2e065803c90233b5ae5cd094cdbf45efa32a4b19.tar.gz ChibiOS-2e065803c90233b5ae5cd094cdbf45efa32a4b19.tar.bz2 ChibiOS-2e065803c90233b5ae5cd094cdbf45efa32a4b19.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2341 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'boards/ST_STM8L_DISCOVERY/board.h')
| -rw-r--r-- | boards/ST_STM8L_DISCOVERY/board.h | 163 |
1 files changed, 163 insertions, 0 deletions
diff --git a/boards/ST_STM8L_DISCOVERY/board.h b/boards/ST_STM8L_DISCOVERY/board.h new file mode 100644 index 000000000..756c8976a --- /dev/null +++ b/boards/ST_STM8L_DISCOVERY/board.h @@ -0,0 +1,163 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+/*
+ * Setup for STMicroelectronics STM8L-Discovery board.
+ */
+
+/*
+ * Board identifiers.
+ */
+#define BOARD_ST_STM8S_DISCOVERY
+#define BOARD_NAME "ST STM8L-Discovery"
+
+/*
+ * Board frequencies and bypass modes.
+ *
+ * The bypass must be set to TRUE if the chip is driven by an external
+ * oscillator rather than a crystal. Frequency must be set to zero if
+ * the clock source is not used at all.
+ * The following constants are used by the HAL low level driver for
+ * correct clock initialization.
+ */
+#define HSECLK 0
+#define HSEBYPASS FALSE
+#define LSECLK 32768
+#define LSEBYPASS FALSE
+
+/*
+ * MCU model used on the board.
+ */
+#define STM8L152C6
+#define STM8L15X_MD
+
+/*
+ * Pin definitions.
+ */
+#define PA_OSC_IN 2
+#define PA_OSC_OUT 3
+#define PA_LCD_COM0 4
+#define PA_LCD_COM1 5
+#define PA_LCD_COM2 6
+#define PA_LCD_SEG0 7
+
+#define PB_LCD_SEG10 0
+#define PB_LCD_SEG11 1
+#define PB_LCD_SEG12 2
+#define PB_LCD_SEG13 3
+#define PB_LCD_SEG14 4
+#define PB_LCD_SEG15 5
+#define PB_LCD_SEG16 6
+#define PB_LCD_SEG17 7
+
+#define PC_UNUSED 0
+#define PC_BUTTON 1
+#define PC_LCD_SEG22 2
+#define PC_LCD_SEG23 3
+#define PC_IDD_CNT_EN 4
+#define PC_LED4 7
+
+#define PD_LCD_SEG7 0
+#define PD_LCD_COM3 1
+#define PD_LCD_SEG8 2
+#define PD_LCD_SEG9 3
+#define PD_LCD_SEG18 4
+#define PD_LCD_SEG19 5
+#define PD_LCD_SEG20 6
+#define PD_LCD_SEG21 7
+
+#define PE_LCD_SEG1 0
+#define PE_LCD_SEG2 1
+#define PE_LCD_SEG3 2
+#define PE_LCD_SEG4 3
+#define PE_LCD_SEG5 4
+#define PE_LCD_SEG6 5
+#define PE_IDD_WAKEUP 6
+#define PE_LED3 7
+
+#define PF0_IDD_MEASUREMENT 0
+
+/*
+ * Port A initial setup.
+ */
+#define VAL_GPIOAODR 0
+#define VAL_GPIOADDR 0 /* All inputs. */
+#define VAL_GPIOACR1 0xFF /* All pull-up. */
+#define VAL_GPIOACR2 0
+
+/*
+ * Port B initial setup.
+ */
+#define VAL_GPIOBODR 0
+#define VAL_GPIOBDDR 0 /* All inputs. */
+#define VAL_GPIOBCR1 0xFF /* All pull-up. */
+#define VAL_GPIOBCR2 0
+
+/*
+ * Port C initial setup.
+ */
+#define VAL_GPIOCODR (1 < PC_LED4)
+#define VAL_GPIOCDDR (1 < PC_LED4)
+#define VAL_GPIOCCR1 0xFF /* All pull-up/open drain. */
+#define VAL_GPIOCCR2 0
+
+/*
+ * Port D initial setup.
+ */
+#define VAL_GPIODODR 0
+#define VAL_GPIODDDR 0 /* All inputs. */
+#define VAL_GPIODCR1 0xFF /* All pull-up. */
+#define VAL_GPIODCR2 0
+
+/*
+ * Port E initial setup.
+ */
+#define VAL_GPIOEODR (1 < PE_LED3)
+#define VAL_GPIOEDDR (1 < PE_LED3)
+#define VAL_GPIOECR1 0xFF /* All pull-up/open drain. */
+#define VAL_GPIOECR2 0
+
+/*
+ * Port F initial setup.
+ */
+#define VAL_GPIOFODR 0
+#define VAL_GPIOFDDR 0 /* All inputs. */
+#define VAL_GPIOFCR1 0xFF /* All pull-up. */
+#define VAL_GPIOFCR2 0
+
+/*
+ * Port G initial setup (not present but still initialized).
+ */
+#define VAL_GPIOGODR 0
+#define VAL_GPIOGDDR 0 /* All inputs. */
+#define VAL_GPIOGCR1 0xFF /* All pull-up. */
+#define VAL_GPIOGCR2 0
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+ void hwinit(void);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BOARD_H_ */
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