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author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-09-17 06:48:56 +0000 |
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committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-09-17 06:48:56 +0000 |
commit | eea844796a2cdbea9f4ddf51f9766ff3964984b6 (patch) | |
tree | 293cb5ca8e8c0cfe5c037432010c2868a1e2eeac /boards/ST_STM32L_DISCOVERY | |
parent | 06d3e6325be3061cc281b3aa49fcb983998fc4cb (diff) | |
download | ChibiOS-eea844796a2cdbea9f4ddf51f9766ff3964984b6.tar.gz ChibiOS-eea844796a2cdbea9f4ddf51f9766ff3964984b6.tar.bz2 ChibiOS-eea844796a2cdbea9f4ddf51f9766ff3964984b6.zip |
Fixed paths in IAR project for STM32L152-Discovery board.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3322 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'boards/ST_STM32L_DISCOVERY')
-rw-r--r-- | boards/ST_STM32L_DISCOVERY/board.h | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/boards/ST_STM32L_DISCOVERY/board.h b/boards/ST_STM32L_DISCOVERY/board.h index d95480c15..845113f57 100644 --- a/boards/ST_STM32L_DISCOVERY/board.h +++ b/boards/ST_STM32L_DISCOVERY/board.h @@ -105,8 +105,8 @@ PIN_PUDR_FLOATING(14) | \
PIN_PUDR_FLOATING(15)))
#define VAL_GPIOA_ODR 0xFFFFFFFF
-#define VAL_GPIOA_AFRL 0x00000000
-#define VAL_GPIOA_AFRH 0x00000000
+#define VAL_GPIOA_AFRL 0x00000000
+#define VAL_GPIOA_AFRH 0x00000000
/*
* Port B setup.
@@ -127,8 +127,8 @@ PIN_PUDR_FLOATING(GPIOB_LED4) | \
PIN_PUDR_FLOATING(GPIOB_LED3)))
#define VAL_GPIOB_ODR 0xFFFFFF3F
-#define VAL_GPIOB_AFRL 0x00000000
-#define VAL_GPIOB_AFRH 0x00000000
+#define VAL_GPIOB_AFRL 0x00000000
+#define VAL_GPIOB_AFRH 0x00000000
/*
* Port C setup.
@@ -142,8 +142,8 @@ #define VAL_GPIOC_PUPDR (~(PIN_PUDR_FLOATING(15) | \
PIN_PUDR_FLOATING(14)))
#define VAL_GPIOC_ODR 0xFFFFFFFF
-#define VAL_GPIOC_AFRL 0x00000000
-#define VAL_GPIOC_AFRH 0x00000000
+#define VAL_GPIOC_AFRL 0x00000000
+#define VAL_GPIOC_AFRH 0x00000000
/*
* Port D setup.
@@ -154,8 +154,8 @@ #define VAL_GPIOD_OSPEEDR 0xFFFFFFFF
#define VAL_GPIOD_PUPDR 0xFFFFFFFF
#define VAL_GPIOD_ODR 0xFFFFFFFF
-#define VAL_GPIOD_AFRL 0x00000000
-#define VAL_GPIOD_AFRH 0x00000000
+#define VAL_GPIOD_AFRL 0x00000000
+#define VAL_GPIOD_AFRH 0x00000000
/*
* Port E setup.
@@ -166,8 +166,8 @@ #define VAL_GPIOE_OSPEEDR 0xFFFFFFFF
#define VAL_GPIOE_PUPDR 0xFFFFFFFF
#define VAL_GPIOE_ODR 0xFFFFFFFF
-#define VAL_GPIOE_AFRL 0x00000000
-#define VAL_GPIOE_AFRH 0x00000000
+#define VAL_GPIOE_AFRL 0x00000000
+#define VAL_GPIOE_AFRH 0x00000000
/*
* Port H setup.
@@ -178,8 +178,8 @@ #define VAL_GPIOH_OSPEEDR 0xFFFFFFFF
#define VAL_GPIOH_PUPDR 0xFFFFFFFF
#define VAL_GPIOH_ODR 0xFFFFFFFF
-#define VAL_GPIOH_AFRL 0x00000000
-#define VAL_GPIOH_AFRH 0x00000000
+#define VAL_GPIOH_AFRL 0x00000000
+#define VAL_GPIOH_AFRH 0x00000000
#if !defined(_FROM_ASM_)
#ifdef __cplusplus
|