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author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-05-14 06:43:02 +0000 |
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committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-05-14 06:43:02 +0000 |
commit | 55b7744199ce9771ac761fc708d173bc487145e8 (patch) | |
tree | 3b7a61cd3019849544e2bbe25ace9ff658a75e75 /boards/ST_STM3210C_EVAL | |
parent | fee72530476c5b9eed43fde792df9de367d56800 (diff) | |
download | ChibiOS-55b7744199ce9771ac761fc708d173bc487145e8.tar.gz ChibiOS-55b7744199ce9771ac761fc708d173bc487145e8.tar.bz2 ChibiOS-55b7744199ce9771ac761fc708d173bc487145e8.zip |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1916 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'boards/ST_STM3210C_EVAL')
-rw-r--r-- | boards/ST_STM3210C_EVAL/board.c | 6 | ||||
-rw-r--r-- | boards/ST_STM3210C_EVAL/board.h | 36 |
2 files changed, 26 insertions, 16 deletions
diff --git a/boards/ST_STM3210C_EVAL/board.c b/boards/ST_STM3210C_EVAL/board.c index 77f958101..e9179f9e9 100644 --- a/boards/ST_STM3210C_EVAL/board.c +++ b/boards/ST_STM3210C_EVAL/board.c @@ -43,6 +43,12 @@ void hwinit1(void) { halInit();
/*
+ * Remap USART2 to the PD5/PD6 pins, done after halInit since HAL resets
+ * these.
+ */
+ AFIO->MAPR |= AFIO_MAPR_USART2_REMAP;
+
+ /*
* ChibiOS/RT initialization.
*/
chSysInit();
diff --git a/boards/ST_STM3210C_EVAL/board.h b/boards/ST_STM3210C_EVAL/board.h index f6e623335..9117aa52d 100644 --- a/boards/ST_STM3210C_EVAL/board.h +++ b/boards/ST_STM3210C_EVAL/board.h @@ -38,7 +38,7 @@ /*
* MCU type, this macro is used by both the ST library and the ChibiOS/RT
- * native STM32 HAL. + * native STM32 HAL.
*/
#define STM32F10X_CL
@@ -73,41 +73,45 @@ /*
* Port A setup.
- * Everything input with pull-up except:
+ * Everything input except:
*/
-#define VAL_GPIOACRL 0x88888888 /* PA7...PA0 */
-#define VAL_GPIOACRH 0x88888888 /* PA15...PA8 */
+#define VAL_GPIOACRL 0x44444444 /* PA7...PA0 */
+#define VAL_GPIOACRH 0x44444444 /* PA15...PA8 */
#define VAL_GPIOAODR 0xFFFFFFFF
/*
* Port B setup.
- * Everything input with pull-up except:
+ * Everything input except:
*/
-#define VAL_GPIOBCRL 0x88888888 /* PB7...PB0 */
-#define VAL_GPIOBCRH 0x88888888 /* PB15...PB8 */
+#define VAL_GPIOBCRL 0x44444444 /* PB7...PB0 */
+#define VAL_GPIOBCRH 0x44444444 /* PB15...PB8 */
#define VAL_GPIOBODR 0xFFFFFFFF
/*
* Port C setup.
- * Everything input with pull-up except:
+ * Everything input except:
*/
-#define VAL_GPIOCCRL 0x88888888 /* PC7...PC0 */
-#define VAL_GPIOCCRH 0x88888888 /* PC15...PC8 */
+#define VAL_GPIOCCRL 0x44444444 /* PC7...PC0 */
+#define VAL_GPIOCCRH 0x44444444 /* PC15...PC8 */
#define VAL_GPIOCODR 0xFFFFFFFF
/*
* Port D setup.
- * Everything input with pull-up except:
+ * Everything input except:
+ * PD5 - USART2TX (remapped) AF PP Output
+ * PD6 - USART2RX (remapped) Digital Input
+ * PD7 - LED (LD1) PP Output
*/
-#define VAL_GPIODCRL 0x88888888 /* PD7...PD0 */
-#define VAL_GPIODCRH 0x88888888 /* PD15...PD8 */
-#define VAL_GPIODODR 0xFFFFFFFF
+#define VAL_GPIODCRL 0x34B44444 /* PD7...PD0 */
+#define VAL_GPIODCRH 0x44444444 /* PD15...PD8 */
+#define VAL_GPIODODR 0x0F0FFFFF
/*
* Port E setup.
+ * Everything input except:
*/
-#define VAL_GPIOECRL 0x88888888 /* PE7...PE0 */
-#define VAL_GPIOECRH 0x88888888 /* PE15...PE8 */
+#define VAL_GPIOECRL 0x44444444 /* PE7...PE0 */
+#define VAL_GPIOECRH 0x44444444 /* PE15...PE8 */
#define VAL_GPIOEODR 0xFFFFFFFF
#endif /* _BOARD_H_ */
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