diff options
| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2008-02-15 16:12:41 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2008-02-15 16:12:41 +0000 |
| commit | fd63d45d5f642ae22e8de45faa09a795231fea1b (patch) | |
| tree | 6618e617ea205096f343db497665ce677e752510 | |
| parent | d88047aa532f2416c3d3bec2db322b503e2e4585 (diff) | |
| download | ChibiOS-fd63d45d5f642ae22e8de45faa09a795231fea1b.tar.gz ChibiOS-fd63d45d5f642ae22e8de45faa09a795231fea1b.tar.bz2 ChibiOS-fd63d45d5f642ae22e8de45faa09a795231fea1b.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@192 35acf78f-673a-0410-8e92-d51de3d6d3f4
| -rw-r--r-- | demos/ARM7-AT91SAM7X-GCC/board.c | 61 | ||||
| -rw-r--r-- | ports/ARM7-AT91SAM7X/GCC/crt0.s | 4 |
2 files changed, 63 insertions, 2 deletions
diff --git a/demos/ARM7-AT91SAM7X-GCC/board.c b/demos/ARM7-AT91SAM7X-GCC/board.c index 2ebad09e2..bc0d46189 100644 --- a/demos/ARM7-AT91SAM7X-GCC/board.c +++ b/demos/ARM7-AT91SAM7X-GCC/board.c @@ -21,5 +21,66 @@ #include "at91lib/AT91SAM7X256.h"
+extern void FiqHandler(void);
+
+__attribute__((interrupt("IRQ")))
+static void SpuriousHandler(void) {
+
+ AT91C_BASE_AIC->AIC_EOICR = (AT91_REG)AT91C_BASE_AIC;
+}
+
void hwinit(void) {
+ int i;
+ AT91PS_PMC pmcp = AT91C_BASE_PMC;
+ AT91PS_AIC aicp = AT91C_BASE_AIC;
+
+ /*
+ * Flash Memory: 1 wait state, about 50 cycles in a microsecond.
+ */
+ AT91C_BASE_MC->MC_FMR = (AT91C_MC_FMCN & (50 << 16)) | AT91C_MC_FWS_1FWS;
+
+ /*
+ * Watchdog disabled.
+ */
+ AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;
+
+ /*
+ * Enables the main oscillator and waits 56 slow cycles as startup time.
+ */
+ pmcp->PMC_MOR = (AT91C_CKGR_OSCOUNT & (7 << 8)) | AT91C_CKGR_MOSCEN;
+ while (!(pmcp->PMC_SR & AT91C_PMC_MOSCS))
+ ;
+
+ /*
+ * PLL setup: DIV = 14, MUL = 72, PLLCOUNT = 10
+ * PLLfreq = 96109714 Hz (rounded)
+ */
+ pmcp->PMC_PLLR = (AT91C_CKGR_DIV & 14) |
+ (AT91C_CKGR_PLLCOUNT & (10 << 8)) |
+ (AT91C_CKGR_MUL & (72 << 16));
+ while (!(pmcp->PMC_SR & (AT91C_PMC_LOCK)))
+ ;
+
+ /*
+ * Master clock = PLLfreq / 2 = 48054858 Hz (rounded)
+ */
+ pmcp->PMC_MCKR = AT91C_PMC_CSS_PLL_CLK | AT91C_PMC_PRES_CLK_2;
+ while (!(pmcp->PMC_SR & (AT91C_PMC_MCKRDY)))
+ ;
+
+ /*
+ * Default AIC setup, the device drivers will modify it as needed.
+ */
+ aicp->AIC_SVR[0] = (AT91_REG)FiqHandler;
+ for (i = 1; i < 31; i++) {
+ aicp->AIC_SVR[i] = (AT91_REG)NULL;
+ aicp->AIC_EOICR = (AT91_REG)i;
+ }
+ aicp->AIC_SPU = (AT91_REG)SpuriousHandler;
+
+ /*
+ * I/O setup, enable clocks, initially all pins are inputs with pullups.
+ */
+ pmcp->PMC_PCER = (1 << AT91C_ID_PIOA) | (1 << AT91C_ID_PIOB);
+ AT91C_BASE_PIOA->PIO_PER = 0xFFFFFFFF;
}
diff --git a/ports/ARM7-AT91SAM7X/GCC/crt0.s b/ports/ARM7-AT91SAM7X/GCC/crt0.s index d501770c8..a4fd53db3 100644 --- a/ports/ARM7-AT91SAM7X/GCC/crt0.s +++ b/ports/ARM7-AT91SAM7X/GCC/crt0.s @@ -47,8 +47,8 @@ _start: ldr pc, _prefetch
ldr pc, _abort
nop
- ldr pc, [pc,#-0xFF0] /* VIC - IRQ Vector Register */
- ldr pc, _fiq
+ ldr pc, [pc,#-0xF20] /* AIC - AIC_IVR */
+ ldr pc, [pc,#-0xF20] /* AIC - AIC_FVR */
_undefined:
.word UndHandler
|