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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2007-12-07 13:28:54 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2007-12-07 13:28:54 +0000
commitf477fa23bfacbeedc2a666af056842c45417413f (patch)
tree0bd7314baafe5e8a3fb6c30fb8d12e64b4095de3
parentbef9d20d8eb9186a4f03c397ae880be7cad7efe1 (diff)
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@127 35acf78f-673a-0410-8e92-d51de3d6d3f4
-rw-r--r--demos/ARM7-LPC214x-GCC/chcore2.s9
1 files changed, 6 insertions, 3 deletions
diff --git a/demos/ARM7-LPC214x-GCC/chcore2.s b/demos/ARM7-LPC214x-GCC/chcore2.s
index a450d9b74..22a819c72 100644
--- a/demos/ARM7-LPC214x-GCC/chcore2.s
+++ b/demos/ARM7-LPC214x-GCC/chcore2.s
@@ -47,9 +47,9 @@ threadstart:
bx r0
.code 16
mov r0, r5
- mov lr, pc
- bx r4
+ bl jmpr4
bl chThdExit
+jmpr4: bx r4
.code 32
#endif
@@ -202,14 +202,17 @@ UART1IrqHandler:
* Common exit point for all IRQ routines, it performs the rescheduling if
* required.
*/
-IrqCommon:
#ifdef THUMB_NO_INTERWORKING
.code 16
+.globl IrqCommon
+IrqCommon:
bl chSchRescRequiredI
mov lr, pc
bx lr
.code 32
#else
+.globl IrqCommon
+IrqCommon:
bl chSchRescRequiredI
#endif
cmp r0, #0 // Simply returns if a