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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2009-10-11 10:23:27 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2009-10-11 10:23:27 +0000
commitf3237c7de5960e0c604554cbc783c8a2df8c592e (patch)
treededc15ae87530cdd8048b4259736efa50c720f22
parent803895890d200c84ee2914fdc1cb246e94202eeb (diff)
downloadChibiOS-f3237c7de5960e0c604554cbc783c8a2df8c592e.tar.gz
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1211 35acf78f-673a-0410-8e92-d51de3d6d3f4
-rw-r--r--demos/ARM7-AT91SAM7X-UIP-GCC/Makefile201
-rw-r--r--demos/ARM7-AT91SAM7X-UIP-GCC/board.c187
-rw-r--r--demos/ARM7-AT91SAM7X-UIP-GCC/board.h78
-rw-r--r--demos/ARM7-AT91SAM7X-UIP-GCC/ch.ld98
-rw-r--r--demos/ARM7-AT91SAM7X-UIP-GCC/chconf.h377
-rw-r--r--demos/ARM7-AT91SAM7X-UIP-GCC/main.c72
-rw-r--r--demos/ARM7-AT91SAM7X-UIP-GCC/readme.txt34
-rw-r--r--demos/ARM7-AT91SAM7X-UIP-GCC/web/cc-arch.h9
-rw-r--r--demos/ARM7-AT91SAM7X-UIP-GCC/web/clock-arch.h42
-rw-r--r--demos/ARM7-AT91SAM7X-UIP-GCC/web/uip-conf.h159
-rw-r--r--demos/ARM7-AT91SAM7X-UIP-GCC/web/webthread.c179
-rw-r--r--demos/ARM7-AT91SAM7X-UIP-GCC/web/webthread.h31
12 files changed, 1467 insertions, 0 deletions
diff --git a/demos/ARM7-AT91SAM7X-UIP-GCC/Makefile b/demos/ARM7-AT91SAM7X-UIP-GCC/Makefile
new file mode 100644
index 000000000..95d046fef
--- /dev/null
+++ b/demos/ARM7-AT91SAM7X-UIP-GCC/Makefile
@@ -0,0 +1,201 @@
+##############################################################################
+# Build global options
+# NOTE: Can be overridden externally.
+#
+
+# Compiler options here.
+ifeq ($(USE_OPT),)
+ USE_OPT = -O2 -ggdb -fomit-frame-pointer -mabi=apcs-gnu
+endif
+
+# C++ specific options here (added to USE_OPT).
+ifeq ($(USE_CPPOPT),)
+ USE_CPPOPT = -fno-rtti
+endif
+
+# Enable this if you want the linker to remove unused code and data
+ifeq ($(USE_LINK_GC),)
+ USE_LINK_GC = yes
+endif
+
+# If enabled, this option allows to compile the application in THUMB mode.
+ifeq ($(USE_THUMB),)
+ USE_THUMB = no
+endif
+
+# Enable register caching optimization (read documentation).
+ifeq ($(USE_CURRP_CACHING),)
+ USE_CURRP_CACHING = no
+endif
+
+#
+# Build global options
+##############################################################################
+
+##############################################################################
+# Project, sources and paths
+#
+
+# Define project name here
+PROJECT = ch
+
+# Define linker script file here
+LDSCRIPT= ch.ld
+
+# Imported source files
+CHIBIOS = ../..
+include ${CHIBIOS}/os/ports/GCC/ARM7/port.mk
+include ${CHIBIOS}/os/kernel/kernel.mk
+include ${CHIBIOS}/test/test.mk
+
+# List of the required uIP source files.
+USRC = ${CHIBIOS}/ext/uip-1.0/uip/uip_arp.c \
+ ${CHIBIOS}/ext/uip-1.0/uip/psock.c \
+ ${CHIBIOS}/ext/uip-1.0/uip/uip.c \
+ ${CHIBIOS}/ext/uip-1.0/apps/webserver/httpd.c \
+ ${CHIBIOS}/ext/uip-1.0/apps/webserver/http-strings.c \
+ ${CHIBIOS}/ext/uip-1.0/apps/webserver/httpd-fs.c \
+ ${CHIBIOS}/ext/uip-1.0/apps/webserver/httpd-cgi.c
+
+# C sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CSRC = ${PORTSRC} \
+ ${KERNSRC} \
+ ${TESTSRC} \
+ ${USRC} \
+ ${CHIBIOS}/os/io/pal.c \
+ ${CHIBIOS}/os/io/serial.c \
+ ${CHIBIOS}/os/io/mii.c \
+ ${CHIBIOS}/os/io/mac.c \
+ ${CHIBIOS}/os/io/platforms/AT91SAM7X/pal_lld.c \
+ ${CHIBIOS}/os/io/platforms/AT91SAM7X/serial_lld.c \
+ ${CHIBIOS}/os/io/platforms/AT91SAM7X/mii_lld.c \
+ ${CHIBIOS}/os/io/platforms/AT91SAM7X/mac_lld.c \
+ ${CHIBIOS}/os/io/platforms/AT91SAM7X/at91lib/aic.c \
+ ${CHIBIOS}/os/various/evtimer.c \
+ web/webthread.c \
+ board.c main.c
+# ${CHIBIOS}/os/io/platforms/AT91SAM7X/sam7x_emac.c \
+
+# C++ sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CPPSRC =
+
+# C sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+ACSRC =
+
+# C++ sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+ACPPSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+TCSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+TCPPSRC =
+
+# List ASM source files here
+ASMSRC = $(PORTASM) \
+ ${CHIBIOS}/os/ports/GCC/ARM7/AT91SAM7X/vectors.s
+
+INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
+ ${CHIBIOS}/os/io \
+ ${CHIBIOS}/os/io/platforms/AT91SAM7X \
+ ${CHIBIOS}/os/various \
+ ${CHIBIOS}/os/ports/GCC/ARM7/AT91SAM7X \
+ ./web ${CHIBIOS}/ext/uip-1.0/uip ${CHIBIOS}/ext/uip-1.0/apps/webserver
+
+#
+# Project, sources and paths
+##############################################################################
+
+##############################################################################
+# Compiler settings
+#
+
+MCU = arm7tdmi
+
+TRGT = arm-elf-
+CC = $(TRGT)gcc
+CPPC = $(TRGT)g++
+# Enable loading with g++ only if you need C++ runtime support.
+# NOTE: You can use C++ even without C++ support if you are careful. C++
+# runtime support makes code size explode.
+LD = $(TRGT)gcc
+#LD = $(TRGT)g++
+CP = $(TRGT)objcopy
+AS = $(TRGT)gcc -x assembler-with-cpp
+OD = $(TRGT)objdump
+HEX = $(CP) -O ihex
+BIN = $(CP) -O binary
+
+# ARM-specific options here
+AOPT =
+
+# THUMB-specific options here
+TOPT = -mthumb -DTHUMB
+
+# Define C warning options here
+CWARN = -Wall -Wstrict-prototypes
+
+# Define C++ warning options here
+CPPWARN = -Wall
+
+#
+# Compiler settings
+##############################################################################
+
+##############################################################################
+# Start of default section
+#
+
+# List all default C defines here, like -D_DEBUG=1
+DDEFS =
+
+# List all default ASM defines here, like -D_DEBUG=1
+DADEFS =
+
+# List all default directories to look for include files here
+DINCDIR =
+
+# List the default directory to look for the libraries here
+DLIBDIR =
+
+# List all default libraries here
+DLIBS =
+
+#
+# End of default section
+##############################################################################
+
+##############################################################################
+# Start of user section
+#
+
+# List all user C define here, like -D_DEBUG=1
+UDEFS =
+
+# Define ASM defines here
+UADEFS =
+
+# List all user directories here
+UINCDIR =
+
+# List the user directory to look for the libraries here
+ULIBDIR =
+
+# List all user libraries here
+ULIBS =
+
+#
+# End of user defines
+##############################################################################
+
+include ${CHIBIOS}/os/ports/GCC/ARM/rules.mk
diff --git a/demos/ARM7-AT91SAM7X-UIP-GCC/board.c b/demos/ARM7-AT91SAM7X-UIP-GCC/board.c
new file mode 100644
index 000000000..348f4bb99
--- /dev/null
+++ b/demos/ARM7-AT91SAM7X-UIP-GCC/board.c
@@ -0,0 +1,187 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#include <ch.h>
+#include <pal.h>
+#include <serial.h>
+#include <mac.h>
+
+#include "board.h"
+#include "at91lib/aic.h"
+
+
+/*
+ * FIQ Handler weak symbol defined in vectors.s.
+ */
+void FiqHandler(void);
+
+static CH_IRQ_HANDLER(SpuriousHandler) {
+
+ CH_IRQ_PROLOGUE();
+
+ AT91C_BASE_AIC->AIC_EOICR = 0;
+
+ CH_IRQ_EPILOGUE();
+}
+
+/*
+ * SYS IRQ handling here.
+ */
+static CH_IRQ_HANDLER(SYSIrqHandler) {
+
+ CH_IRQ_PROLOGUE();
+
+ if (AT91C_BASE_PITC->PITC_PISR & AT91C_PITC_PITS) {
+ (void) AT91C_BASE_PITC->PITC_PIVR;
+ chSysLockFromIsr();
+ chSysTimerHandlerI();
+ chSysUnlockFromIsr();
+ }
+ AT91C_BASE_AIC->AIC_EOICR = 0;
+
+ CH_IRQ_EPILOGUE();
+}
+
+/*
+ * Digital I/O ports static configuration as defined in @p board.h.
+ */
+static const AT91SAM7XPIOConfig config =
+{
+ {VAL_PIOA_ODSR, VAL_PIOA_OSR, VAL_PIOA_PUSR},
+ {VAL_PIOB_ODSR, VAL_PIOB_OSR, VAL_PIOB_PUSR}
+};
+
+/*
+ * Early initialization code.
+ * This initialization is performed just after reset before BSS and DATA
+ * segments initialization.
+ */
+void hwinit0(void) {
+ /*
+ * Flash Memory: 1 wait state, about 50 cycles in a microsecond.
+ */
+ AT91C_BASE_MC->MC_FMR = (AT91C_MC_FMCN & (50 << 16)) | AT91C_MC_FWS_1FWS;
+
+ /*
+ * Watchdog disabled.
+ */
+ AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;
+
+ /*
+ * Enables the main oscillator and waits 56 slow cycles as startup time.
+ */
+ AT91C_BASE_PMC->PMC_MOR = (AT91C_CKGR_OSCOUNT & (7 << 8)) | AT91C_CKGR_MOSCEN;
+ while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCS))
+ ;
+
+ /*
+ * PLL setup: DIV = 14, MUL = 72, PLLCOUNT = 10
+ * PLLfreq = 96109714 Hz (rounded)
+ */
+ AT91C_BASE_PMC->PMC_PLLR = (AT91C_CKGR_DIV & 14) |
+ (AT91C_CKGR_PLLCOUNT & (10 << 8)) |
+ (AT91C_CKGR_MUL & (72 << 16));
+ while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCK))
+ ;
+
+ /*
+ * Master clock = PLLfreq / 2 = 48054858 Hz (rounded)
+ */
+ AT91C_BASE_PMC->PMC_MCKR = AT91C_PMC_CSS_PLL_CLK | AT91C_PMC_PRES_CLK_2;
+ while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY))
+ ;
+
+ /*
+ * PIO initialization.
+ */
+ palInit(&config);
+}
+
+/*
+ * Late initialization code.
+ * This initialization is performed after BSS and DATA segments initialization
+ * and before invoking the main() function.
+ */
+void hwinit1(void) {
+ int i;
+
+ /*
+ * Default AIC setup, the device drivers will modify it as needed.
+ */
+ AT91C_BASE_AIC->AIC_ICCR = 0xFFFFFFFF;
+ AT91C_BASE_AIC->AIC_SVR[0] = (AT91_REG)FiqHandler;
+ for (i = 1; i < 31; i++) {
+ AT91C_BASE_AIC->AIC_SVR[i] = (AT91_REG)NULL;
+ AT91C_BASE_AIC->AIC_EOICR = (AT91_REG)i;
+ }
+ AT91C_BASE_AIC->AIC_SPU = (AT91_REG)SpuriousHandler;
+
+ /*
+ * LCD pins setup.
+ */
+ palClearPad(IOPORT2, PIOB_LCD_BL);
+ palSetPadMode(IOPORT2, PIOB_LCD_BL, PAL_MODE_OUTPUT_PUSHPULL);
+
+ palSetPad(IOPORT1, PIOA_LCD_RESET);
+ palSetPadMode(IOPORT1, PIOA_LCD_RESET, PAL_MODE_OUTPUT_PUSHPULL);
+
+ /*
+ * Joystick and buttons setup.
+ */
+ palSetGroupMode(IOPORT1,
+ PIOA_B1_MASK | PIOA_B2_MASK | PIOA_B3_MASK |
+ PIOA_B4_MASK | PIOA_B5_MASK,
+ PAL_MODE_INPUT);
+ palSetGroupMode(IOPORT2, PIOB_SW1_MASK | PIOB_SW2_MASK, PAL_MODE_INPUT);
+
+ /*
+ * MMC/SD slot setup.
+ */
+ palSetGroupMode(IOPORT2,
+ PIOB_MMC_WP_MASK | PIOB_MMC_CP_MASK,
+ PAL_MODE_INPUT);
+
+ /*
+ * PIT Initialization.
+ */
+ AIC_ConfigureIT(AT91C_ID_SYS,
+ AT91C_AIC_SRCTYPE_HIGH_LEVEL | (AT91C_AIC_PRIOR_HIGHEST - 1),
+ SYSIrqHandler);
+ AIC_EnableIT(AT91C_ID_SYS);
+ AT91C_BASE_PITC->PITC_PIMR = (MCK / 16 / CH_FREQUENCY) - 1;
+ AT91C_BASE_PITC->PITC_PIMR |= AT91C_PITC_PITEN | AT91C_PITC_PITIEN;
+
+ /*
+ * Serial driver initialization, RTS/CTS pins enabled for USART0 only.
+ */
+ sdInit();
+ AT91C_BASE_PIOA->PIO_PDR = AT91C_PA3_RTS0 | AT91C_PA4_CTS0;
+ AT91C_BASE_PIOA->PIO_ASR = AT91C_PIO_PA3 | AT91C_PIO_PA4;
+ AT91C_BASE_PIOA->PIO_PPUDR = AT91C_PIO_PA3 | AT91C_PIO_PA4;
+
+ /*
+ * EMAC driver initialization.
+ */
+ macInit();
+
+ /*
+ * ChibiOS/RT initialization.
+ */
+ chSysInit();
+}
diff --git a/demos/ARM7-AT91SAM7X-UIP-GCC/board.h b/demos/ARM7-AT91SAM7X-UIP-GCC/board.h
new file mode 100644
index 000000000..c56f50258
--- /dev/null
+++ b/demos/ARM7-AT91SAM7X-UIP-GCC/board.h
@@ -0,0 +1,78 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+#include "at91lib/AT91SAM7X256.h"
+
+#define BOARD_OLIMEX_SAM7_EX256
+
+#define CLK 18432000
+#define MCK 48054857
+
+/*
+ * Initial I/O setup.
+ */
+#define VAL_PIOA_ODSR 0x00000000 /* Output data. */
+#define VAL_PIOA_OSR 0x00000000 /* Direction. */
+#define VAL_PIOA_PUSR 0xFFFFFFFF /* Pull-up. */
+
+#define VAL_PIOB_ODSR 0x00000000 /* Output data. */
+#define VAL_PIOB_OSR 0x00000000 /* Direction. */
+#define VAL_PIOB_PUSR 0xFFFFFFFF /* Pull-up. */
+
+/*
+ * I/O definitions.
+ */
+#define PIOA_LCD_RESET 2
+#define PIOA_LCD_RESET_MASK (1 << PIOA_LCD_RESET)
+#define PIOA_B1 7
+#define PIOA_B1_MASK (1 << PIOA_B1)
+#define PIOA_B2 8
+#define PIOA_B2_MASK (1 << PIOA_B2)
+#define PIOA_B3 9
+#define PIOA_B3_MASK (1 << PIOA_B3)
+#define PIOA_B4 14
+#define PIOA_B4_MASK (1 << PIOA_B4)
+#define PIOA_B5 15
+#define PIOA_B5_MASK (1 << PIOA_B5)
+#define PIOA_USB_PUP 25
+#define PIOA_USB_PUP_MASK (1 << PIOA_USB_PUP)
+#define PIOA_USB_PR 26
+#define PIOA_USB_PR_MASK (1 << PIOA_USB_PR)
+
+#define PIOB_PHY_PD 18
+#define PIOB_PHY_PD_MASK (1 << PIOB_PHY_PD)
+#define PIOB_AUDIO_OUT 19
+#define PIOB_AUDIO_OUT_MASK (1 << PIOB_AUDIO_OUT)
+#define PIOB_LCD_BL 20
+#define PIOB_LCD_BL_MASK (1 << PIOB_LCD_BL)
+#define PIOB_MMC_WP 22
+#define PIOB_MMC_WP_MASK (1 << PIOB_MMC_WP)
+#define PIOB_MMC_CP 23
+#define PIOB_MMC_CP_MASK (1 << PIOB_MMC_CP)
+#define PIOB_SW1 24
+#define PIOB_SW1_MASK (1 << PIOB_SW1)
+#define PIOB_SW2 25
+#define PIOB_SW2_MASK (1 << PIOB_SW2)
+#define PIOB_PHY_IRQ 26
+#define PIOB_PHY_IRQ_MASK (1 << PIOB_PHY_IRQ)
+
+#endif /* _BOARD_H_ */
diff --git a/demos/ARM7-AT91SAM7X-UIP-GCC/ch.ld b/demos/ARM7-AT91SAM7X-UIP-GCC/ch.ld
new file mode 100644
index 000000000..944a7f29d
--- /dev/null
+++ b/demos/ARM7-AT91SAM7X-UIP-GCC/ch.ld
@@ -0,0 +1,98 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/*
+ * AT91SAM7X256 memory setup.
+ */
+__und_stack_size__ = 0x0004;
+__abt_stack_size__ = 0x0004;
+__fiq_stack_size__ = 0x0010;
+__irq_stack_size__ = 0x0080;
+__svc_stack_size__ = 0x0004;
+__sys_stack_size__ = 0x0400;
+__stacks_total_size__ = __und_stack_size__ + __abt_stack_size__ + __fiq_stack_size__ + __irq_stack_size__ + __svc_stack_size__ + __sys_stack_size__;
+
+MEMORY
+{
+ flash : org = 0x100000, len = 256k
+ ram : org = 0x200020, len = 64k - 0x20
+}
+
+__ram_start__ = ORIGIN(ram);
+__ram_size__ = LENGTH(ram);
+__ram_end__ = __ram_start__ + __ram_size__;
+
+SECTIONS
+{
+ . = 0;
+
+ .text : ALIGN(16) SUBALIGN(16)
+ {
+ _text = .;
+ KEEP(*(vectors))
+ *(.text)
+ *(.text.*);
+ *(.rodata);
+ *(.rodata.*);
+ *(.glue_7t);
+ *(.glue_7);
+ *(.gcc*);
+ *(.ctors);
+ *(.dtors);
+ . = ALIGN(4);
+ _etext = .;
+ } > flash
+
+ _textdata = _etext;
+
+ .data :
+ {
+ _data = .;
+ *(.data)
+ . = ALIGN(4);
+ *(.data.*)
+ . = ALIGN(4);
+ *(.ramtext)
+ . = ALIGN(4);
+ _edata = .;
+ } > ram AT > flash
+
+ .bss :
+ {
+ _bss_start = .;
+ *(.bss)
+ . = ALIGN(4);
+ *(.bss.*)
+ . = ALIGN(4);
+ *(COMMON)
+ . = ALIGN(4);
+ _bss_end = .;
+ } > ram
+
+ /DISCARD/ :
+ {
+ *(.eh_*)
+ }
+}
+
+PROVIDE(end = .);
+_end = .;
+
+__heap_base__ = _end;
+__heap_end__ = __ram_end__ - __stacks_total_size__;
diff --git a/demos/ARM7-AT91SAM7X-UIP-GCC/chconf.h b/demos/ARM7-AT91SAM7X-UIP-GCC/chconf.h
new file mode 100644
index 000000000..3c6353168
--- /dev/null
+++ b/demos/ARM7-AT91SAM7X-UIP-GCC/chconf.h
@@ -0,0 +1,377 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file src/templates/chconf.h
+ * @brief Configuration file template.
+ * @addtogroup Config
+ * @{
+ */
+
+#ifndef _CHCONF_H_
+#define _CHCONF_H_
+
+/*===========================================================================*/
+/* Kernel parameters. */
+/*===========================================================================*/
+
+/**
+ * Frequency of the system timer that drives the system ticks. This also
+ * defines the system tick time unit.
+ */
+#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__)
+#define CH_FREQUENCY 1000
+#endif
+
+/**
+ * This constant is the number of system ticks allowed for the threads before
+ * preemption occurs. This option is only meaningful if the option
+ * @p CH_USE_ROUNDROBIN is also active.
+ */
+#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__)
+#define CH_TIME_QUANTUM 20
+#endif
+
+/**
+ * If enabled then the use of nested @p chSysLock() / @p chSysUnlock()
+ * operations is allowed.<br>
+ * For performance and code size reasons the recommended setting is to leave
+ * this option disabled.<br>
+ * You can use this option if you need to merge ChibiOS/RT with external
+ * libraries that require nested lock/unlock operations.
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__)
+#define CH_USE_NESTED_LOCKS FALSE
+#endif
+
+/**
+ * If specified then the kernel performs the round robin scheduling algorithm
+ * on threads of equal priority.
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_ROUNDROBIN) || defined(__DOXYGEN__)
+#define CH_USE_ROUNDROBIN TRUE
+#endif
+
+/**
+ * Number of RAM bytes to use as system heap. If set to zero then the whole
+ * available RAM is used as system heap.
+ * @note In order to use the whole RAM as system heap the linker script must
+ * provide the @p __heap_base__ and @p __heap_end__ symbols.
+ * @note Requires @p CH_USE_HEAP.
+ */
+#if !defined(CH_HEAP_SIZE) || defined(__DOXYGEN__)
+#define CH_HEAP_SIZE 0
+#endif
+
+/*===========================================================================*/
+/* Performance options. */
+/*===========================================================================*/
+
+/**
+ * If specified then time efficient rather than space efficient code is used
+ * when two possible implementations exist.
+ * @note This is not related to the compiler optimization options.
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)
+#define CH_OPTIMIZE_SPEED TRUE
+#endif
+
+/**
+ * If enabled defines a CPU register to be used as storage for the global
+ * @p currp variable. Caching this variable in a register can greatly
+ * improve both space and time efficiency of the generated code. Another side
+ * effect is that one less register has to be saved during the context switch
+ * resulting in lower RAM usage and faster code.
+ * @note This option is only usable with the GCC compiler and is only useful
+ * on processors with many registers like ARM cores.
+ * @note If this option is enabled then ALL the libraries linked to the
+ * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
+ * -ffixed-@<reg@>.
+ * @note This option must be enabled in the Makefile, it is listed here for
+ * documentation.
+ */
+#if defined(__DOXYGEN__)
+#define CH_CURRP_REGISTER_CACHE "reg"
+#endif
+
+/*===========================================================================*/
+/* Subsystem options. */
+/*===========================================================================*/
+
+/**
+ * If specified then the @p chThdWait() function is included in the kernel.
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__)
+#define CH_USE_WAITEXIT TRUE
+#endif
+
+/**
+ * If specified then the Semaphores APIs are included in the kernel.
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__)
+#define CH_USE_SEMAPHORES TRUE
+#endif
+
+/**
+ * If enabled then the threads are enqueued on semaphores by priority rather
+ * than FIFO order.
+ * @note The default is @p FALSE. Enable this if you have special requirements.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__)
+#define CH_USE_SEMAPHORES_PRIORITY FALSE
+#endif
+
+/**
+ * If specified then the Semaphores the @p chSemWaitSignal() API is included
+ * in the kernel.
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__)
+#define CH_USE_SEMSW TRUE
+#endif
+
+/**
+ * If specified then the Mutexes APIs are included in the kernel.
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__)
+#define CH_USE_MUTEXES TRUE
+#endif
+
+/**
+ * If specified then the Conditional Variables APIs are included in the kernel.
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_MUTEXES.
+ */
+#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__)
+#define CH_USE_CONDVARS TRUE
+#endif
+
+/**
+ * If specified then the Conditional Variables APIs are included in the kernel.
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_CONDVARS.
+ */
+#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__)
+#define CH_USE_CONDVARS_TIMEOUT TRUE
+#endif
+
+/**
+ * If specified then the Event flags APIs are included in the kernel.
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__)
+#define CH_USE_EVENTS TRUE
+#endif
+
+/**
+ * If specified then the @p chEvtWaitXXXTimeout() functions are included in
+ * the kernel.
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_EVENTS.
+ */
+#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__)
+#define CH_USE_EVENTS_TIMEOUT TRUE
+#endif
+
+/**
+ * If specified then the Synchronous Messages APIs are included in the kernel.
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__)
+#define CH_USE_MESSAGES TRUE
+#endif
+
+/**
+ * If enabled then messages are served by priority rather than in FIFO order.
+ * @note The default is @p FALSE. Enable this if you have special requirements.
+ * @note Requires @p CH_USE_MESSAGES.
+ */
+#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__)
+#define CH_USE_MESSAGES_PRIORITY FALSE
+#endif
+
+/**
+ * If specified then the Asynchronous Messages (Mailboxes) APIs are included
+ * in the kernel.
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__)
+#define CH_USE_MAILBOXES TRUE
+#endif
+
+/**
+ * If specified then the I/O queues APIs are included in the kernel.
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__)
+#define CH_USE_QUEUES TRUE
+#endif
+
+/**
+ * If specified then the memory heap allocator APIs are included in the kernel.
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_MUTEXES or @p CH_USE_SEMAPHORES.
+ * @note Mutexes are recommended.
+ */
+#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__)
+#define CH_USE_HEAP TRUE
+#endif
+
+/**
+ * If enabled enforces the use of the C-runtime @p malloc() and @p free()
+ * functions as backend for the system heap allocator.
+ * @note The default is @p FALSE.
+ * @note Requires @p CH_USE_HEAP.
+ */
+#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__)
+#define CH_USE_MALLOC_HEAP FALSE
+#endif
+
+/**
+ * If specified then the memory pools allocator APIs are included in the
+ * kernel.
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__)
+#define CH_USE_MEMPOOLS TRUE
+#endif
+
+/**
+ * If specified then the dynamic threads creation APIs are included in the
+ * kernel.
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_WAITEXIT.
+ */
+#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__)
+#define CH_USE_DYNAMIC TRUE
+#endif
+
+/*===========================================================================*/
+/* Debug options. */
+/*===========================================================================*/
+
+/**
+ * Debug option, if enabled then the checks on the API functions input
+ * parameters are activated.
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_CHECKS FALSE
+#endif
+
+/**
+ * Debug option, if enabled then all the assertions in the kernel code are
+ * activated. This includes consistency checks inside the kernel, runtime
+ * anomalies and port-defined checks.
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_ASSERTS FALSE
+#endif
+
+/**
+ * Debug option, if enabled the context switch circular trace buffer is
+ * activated.
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_TRACE FALSE
+#endif
+
+/**
+ * Debug option, if enabled a runtime stack check is performed.
+ * @note The stack check is performed in a architecture/port dependent way. It
+ * may not be implemented at all.
+ */
+#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_STACK_CHECK FALSE
+#endif
+
+/**
+ * Debug option, if enabled the threads working area is filled with a byte
+ * pattern when a thread is created.
+ */
+#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
+#define CH_DBG_FILL_THREADS FALSE
+#endif
+
+/**
+ * Debug option, if enabled a field is added to the @p Thread structure that
+ * counts the system ticks occurred while executing the thread.
+ */
+#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)
+#define CH_DBG_THREADS_PROFILING TRUE
+#endif
+
+/*===========================================================================*/
+/* Kernel hooks. */
+/*===========================================================================*/
+
+/**
+ * User fields added to the end of the @p Thread structure.
+ */
+#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__)
+#define THREAD_EXT_FIELDS \
+struct { \
+ /* Add thread custom fields here.*/ \
+};
+#endif
+
+/**
+ * User initialization code added to the @p chThdInit() API.
+ * @note It is invoked from within @p chThdInit().
+ */
+#if !defined(THREAD_EXT_INIT) || defined(__DOXYGEN__)
+#define THREAD_EXT_INIT(tp) { \
+ /* Add thread initialization code here.*/ \
+}
+#endif
+
+/**
+ * User finalization code added to the @p chThdExit() API.
+ * @note It is inserted into lock zone.
+ */
+#if !defined(THREAD_EXT_EXIT) || defined(__DOXYGEN__)
+#define THREAD_EXT_EXIT(tp) { \
+ /* Add thread finalization code here.*/ \
+}
+#endif
+
+/**
+ * Code inserted inside the idle thread loop immediately after an interrupt
+ * resumed execution.
+ */
+#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__)
+#define IDLE_LOOP_HOOK() { \
+ /* Idle loop code here.*/ \
+}
+#endif
+
+#endif /* _CHCONF_H_ */
+
+/** @} */
diff --git a/demos/ARM7-AT91SAM7X-UIP-GCC/main.c b/demos/ARM7-AT91SAM7X-UIP-GCC/main.c
new file mode 100644
index 000000000..0474ce008
--- /dev/null
+++ b/demos/ARM7-AT91SAM7X-UIP-GCC/main.c
@@ -0,0 +1,72 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#include <ch.h>
+#include <pal.h>
+#include <test.h>
+#include <serial.h>
+
+#include "board.h"
+
+#include "web/webthread.h"
+
+static WORKING_AREA(waWebThread, 512);
+static WORKING_AREA(waThread1, 128);
+
+static msg_t Thread1(void *arg) {
+
+ while (TRUE) {
+ palSetPad(IOPORT2, PIOB_LCD_BL);
+ chThdSleepMilliseconds(100);
+ palClearPad(IOPORT2, PIOB_LCD_BL);
+ chThdSleepMilliseconds(900);
+ }
+ return 0;
+}
+
+/*
+ * Entry point, note, the main() function is already a thread in the system
+ * on entry.
+ */
+int main(int argc, char **argv) {
+
+ /*
+ * Activates the serial driver 2 using the driver default configuration.
+ */
+ sdStart(&SD1, NULL);
+
+ /*
+ * Creates the blinker and web server threads.
+ */
+ chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
+ chThdCreateStatic(waWebThread, sizeof(waWebThread), LOWPRIO, WebThread, NULL);
+
+ /*
+ * Normal main() thread activity.
+ */
+ while (TRUE) {
+ chThdSleepMilliseconds(500);
+ if (!palReadPad(IOPORT2, PIOB_SW1))
+ sdWrite(&SD1, (uint8_t *)"Hello World!\r\n", 14);
+ if (!palReadPad(IOPORT2, PIOB_SW2))
+ TestThread(&SD1);
+ }
+
+ return 0;
+}
diff --git a/demos/ARM7-AT91SAM7X-UIP-GCC/readme.txt b/demos/ARM7-AT91SAM7X-UIP-GCC/readme.txt
new file mode 100644
index 000000000..129f245c2
--- /dev/null
+++ b/demos/ARM7-AT91SAM7X-UIP-GCC/readme.txt
@@ -0,0 +1,34 @@
+*****************************************************************************
+** ChibiOS/RT port for ARM7TDMI AT91SAM7X256. **
+*****************************************************************************
+
+** TARGET **
+
+The demo runs on an Olimex SAM7-EX256 board.
+
+** The Demo **
+
+The demo currently just flashes the LCD background using a thread and serves
+HTTP requests at address 192.168.1.20 on port 80 (remember to change it IP
+address into webthread.c in order to adapt it to your network settings).
+The button SW1 prints an "Hello World!" string on COM1, the button SW2
+activates che ChibiOS/RT test suite, output on COM1.
+
+** Build Procedure **
+
+The demo was built using the YAGARTO toolchain but any toolchain based on GCC
+and GNU userspace programs will work.
+The demo requires the patcher uIP 1.0 stack, see: ./ext/readme.txt
+
+** Notes **
+
+Some files used by the demo are not part of ChibiOS/RT but are Atmel copyright
+and are licensed under a different license, see the header present in all the
+source files under ./demos/AT91SAM7X256/at91lib for details.
+Also note that not all the files present in the Atmel library are distribuited
+with ChibiOS/RT, you can find the whole library on the Atmel web site:
+
+ http://www.atmel.com
+
+The uIP stack also has its own license, please read the info into the included
+uIP distribution files.
diff --git a/demos/ARM7-AT91SAM7X-UIP-GCC/web/cc-arch.h b/demos/ARM7-AT91SAM7X-UIP-GCC/web/cc-arch.h
new file mode 100644
index 000000000..744cf56ef
--- /dev/null
+++ b/demos/ARM7-AT91SAM7X-UIP-GCC/web/cc-arch.h
@@ -0,0 +1,9 @@
+#ifndef __CC_ARCH_H__
+#define __CC_ARCH_H__
+
+#define PACK_STRUCT_FIELD(x) x __attribute__((packed))
+#define PACK_STRUCT_STRUCT __attribute__((packed))
+#define PACK_STRUCT_BEGIN
+#define PACK_STRUCT_END
+
+#endif /* __CC_ARCH_H__ */
diff --git a/demos/ARM7-AT91SAM7X-UIP-GCC/web/clock-arch.h b/demos/ARM7-AT91SAM7X-UIP-GCC/web/clock-arch.h
new file mode 100644
index 000000000..e205f9c8d
--- /dev/null
+++ b/demos/ARM7-AT91SAM7X-UIP-GCC/web/clock-arch.h
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2006, Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Institute nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * This file is part of the uIP TCP/IP stack
+ *
+ * $Id: clock-arch.h,v 1.2 2006/06/12 08:00:31 adam Exp $
+ */
+
+#ifndef __CLOCK_ARCH_H__
+#define __CLOCK_ARCH_H__
+
+#include <ch.h>
+
+typedef systime_t clock_time_t;
+#define CLOCK_CONF_SECOND CH_FREQUENCY
+
+#endif /* __CLOCK_ARCH_H__ */
diff --git a/demos/ARM7-AT91SAM7X-UIP-GCC/web/uip-conf.h b/demos/ARM7-AT91SAM7X-UIP-GCC/web/uip-conf.h
new file mode 100644
index 000000000..b6a17c970
--- /dev/null
+++ b/demos/ARM7-AT91SAM7X-UIP-GCC/web/uip-conf.h
@@ -0,0 +1,159 @@
+/**
+ * \addtogroup uipopt
+ * @{
+ */
+
+/**
+ * \name Project-specific configuration options
+ * @{
+ *
+ * uIP has a number of configuration options that can be overridden
+ * for each project. These are kept in a project-specific uip-conf.h
+ * file and all configuration names have the prefix UIP_CONF.
+ */
+
+/*
+ * Copyright (c) 2006, Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Institute nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * This file is part of the uIP TCP/IP stack
+ *
+ * $Id: uip-conf.h,v 1.6 2006/06/12 08:00:31 adam Exp $
+ */
+
+/**
+ * \file
+ * An example uIP configuration file
+ * \author
+ * Adam Dunkels <adam@sics.se>
+ */
+
+#ifndef __UIP_CONF_H__
+#define __UIP_CONF_H__
+
+#include <stdint.h>
+
+#include <cc-arch.h> /* patched */
+
+/**
+ * 8 bit datatype
+ *
+ * This typedef defines the 8-bit type used throughout uIP.
+ *
+ * \hideinitializer
+ */
+typedef uint8_t u8_t;
+
+/**
+ * 16 bit datatype
+ *
+ * This typedef defines the 16-bit type used throughout uIP.
+ *
+ * \hideinitializer
+ */
+typedef uint16_t u16_t;
+
+/**
+ * Statistics datatype
+ *
+ * This typedef defines the dataype used for keeping statistics in
+ * uIP.
+ *
+ * \hideinitializer
+ */
+typedef unsigned short uip_stats_t;
+
+/**
+ * Maximum number of TCP connections.
+ *
+ * \hideinitializer
+ */
+#define UIP_CONF_MAX_CONNECTIONS 40
+
+/**
+ * Maximum number of listening TCP ports.
+ *
+ * \hideinitializer
+ */
+#define UIP_CONF_MAX_LISTENPORTS 40
+
+/**
+ * uIP buffer size.
+ *
+ * \hideinitializer
+ */
+#define UIP_CONF_BUFFER_SIZE 1518
+
+/**
+ * CPU byte order.
+ *
+ * \hideinitializer
+ */
+#define UIP_CONF_BYTE_ORDER LITTLE_ENDIAN
+
+/**
+ * Logging on or off
+ *
+ * \hideinitializer
+ */
+#define UIP_CONF_LOGGING 0
+
+/**
+ * UDP support on or off
+ *
+ * \hideinitializer
+ */
+#define UIP_CONF_UDP 0
+
+/**
+ * UDP checksums on or off
+ *
+ * \hideinitializer
+ */
+#define UIP_CONF_UDP_CHECKSUMS 1
+
+/**
+ * uIP statistics on or off
+ *
+ * \hideinitializer
+ */
+#define UIP_CONF_STATISTICS 1
+
+/* Here we include the header file for the application(s) we use in
+ our project. */
+/*#include "smtp.h"*/
+/*#include "hello-world.h"*/
+/*#include "telnetd.h"*/
+#include "webserver.h"
+/*#include "dhcpc.h"*/
+/*#include "resolv.h"*/
+/*#include "webclient.h"*/
+
+#endif /* __UIP_CONF_H__ */
+
+/** @} */
+/** @} */
diff --git a/demos/ARM7-AT91SAM7X-UIP-GCC/web/webthread.c b/demos/ARM7-AT91SAM7X-UIP-GCC/web/webthread.c
new file mode 100644
index 000000000..12c3b8405
--- /dev/null
+++ b/demos/ARM7-AT91SAM7X-UIP-GCC/web/webthread.c
@@ -0,0 +1,179 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#include <string.h>
+
+#include <ch.h>
+#include <evtimer.h>
+#include <mac.h>
+
+#include <uip.h>
+#include <uip_arp.h>
+#include <httpd.h>
+#include <clock-arch.h>
+
+#define IPADDR0 192
+#define IPADDR1 168
+#define IPADDR2 1
+#define IPADDR3 20
+
+#define SEND_TIMEOUT 50
+
+static const struct uip_eth_addr macaddr = {
+ {0xC2, 0xAF, 0x51, 0x03, 0xCF, 0x46}
+};
+
+#define BUF ((struct uip_eth_hdr *)&uip_buf[0])
+
+/*
+ * uIP send function wrapping the EMAC functions.
+ */
+static void network_device_send(void) {
+ MACTransmitDescriptor td;
+
+ if (macWaitTransmitDescriptor(&ETH1, &td, MS2ST(SEND_TIMEOUT)) == RDY_OK) {
+ if(uip_len <= UIP_LLH_LEN + UIP_TCPIP_HLEN)
+ macWriteTransmitDescriptor(&td, uip_buf, uip_len);
+ else {
+ macWriteTransmitDescriptor(&td, uip_buf, UIP_LLH_LEN + UIP_TCPIP_HLEN);
+ macWriteTransmitDescriptor(&td, uip_appdata,
+ uip_len - (UIP_LLH_LEN + UIP_TCPIP_HLEN));
+ }
+ macReleaseTransmitDescriptor(&td);
+ }
+ /* Dropped... */
+}
+
+/*
+ * uIP receive function wrapping the EMAC function.
+ */
+static size_t network_device_read(void) {
+ MACReceiveDescriptor rd;
+ size_t size;
+
+ if (macWaitReceiveDescriptor(&ETH1, &rd, TIME_IMMEDIATE) != RDY_OK)
+ return 0;
+ size = rd.rd_size;
+ macReadReceiveDescriptor(&rd, uip_buf, size);
+ macReleaseReceiveDescriptor(&rd);
+ return size;
+}
+
+void clock_init(void) {}
+
+clock_time_t clock_time( void )
+{
+ return chTimeNow();
+}
+
+/*
+ * TCP/IP periodic timer.
+ */
+static void PeriodicTimerHandler(eventid_t id) {
+ int i;
+
+ for (i = 0; i < UIP_CONNS; i++) {
+ uip_periodic(i);
+ if (uip_len > 0) {
+ uip_arp_out();
+ network_device_send();
+ }
+ }
+}
+
+/*
+ * ARP periodic timer.
+ */
+static void ARPTimerHandler(eventid_t id) {
+
+ (void)macPollLinkStatus(&ETH1);
+ uip_arp_timer();
+}
+
+/*
+ * Ethernet frame received.
+ */
+static void FrameReceivedHandler(eventid_t id) {
+
+ while ((uip_len = network_device_read()) > 0) {
+ if (BUF->type == HTONS(UIP_ETHTYPE_IP)) {
+ uip_arp_ipin();
+ uip_input();
+ if (uip_len > 0) {
+ uip_arp_out();
+ network_device_send();
+ }
+ }
+ else if (BUF->type == HTONS(UIP_ETHTYPE_ARP)) {
+ uip_arp_arpin();
+ if (uip_len > 0)
+ network_device_send();
+ }
+ }
+}
+
+#define FRAME_RECEIVED_ID 0
+#define PERIODIC_TIMER_ID 1
+#define ARP_TIMER_ID 2
+
+static const evhandler_t evhndl[] = {
+ FrameReceivedHandler,
+ PeriodicTimerHandler,
+ ARPTimerHandler
+};
+
+msg_t WebThread(void *p) {
+ EvTimer evt1, evt2;
+ EventListener el0, el1, el2;
+ uip_ipaddr_t ipaddr;
+
+ /*
+ * Event sources setup.
+ */
+ chEvtRegister(macGetReceiveEventSource(&ETH1), &el0, FRAME_RECEIVED_ID);
+ chEvtPend(EVENT_MASK(FRAME_RECEIVED_ID)); /* In case some frames are already buffered */
+
+ evtInit(&evt1, MS2ST(500));
+ evtStart(&evt1);
+ chEvtRegister(&evt1.et_es, &el1, PERIODIC_TIMER_ID);
+
+ evtInit(&evt2, S2ST(10));
+ evtStart(&evt2);
+ chEvtRegister(&evt2.et_es, &el2, ARP_TIMER_ID);
+
+ /*
+ * EMAC settings.
+ */
+ macSetAddress(&ETH1, &macaddr.addr[0]);
+ (void)macPollLinkStatus(&ETH1);
+
+ /*
+ * uIP initialization.
+ */
+ uip_init();
+ uip_setethaddr(macaddr);
+ uip_ipaddr(ipaddr, IPADDR0, IPADDR1, IPADDR2, IPADDR3);
+ uip_sethostaddr(ipaddr);
+ httpd_init();
+
+ while (TRUE) {
+ chEvtDispatch(evhndl, chEvtWaitOne(ALL_EVENTS));
+ }
+ return 0;
+}
diff --git a/demos/ARM7-AT91SAM7X-UIP-GCC/web/webthread.h b/demos/ARM7-AT91SAM7X-UIP-GCC/web/webthread.h
new file mode 100644
index 000000000..bd71b4dc4
--- /dev/null
+++ b/demos/ARM7-AT91SAM7X-UIP-GCC/web/webthread.h
@@ -0,0 +1,31 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#ifndef _WEBTHREAD_H_
+#define _WEBTHREAD_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+ msg_t WebThread(void *p);
+ #ifdef __cplusplus
+}
+#endif
+
+#endif /* _WEBTHREAD_H_ */