diff options
| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-11-04 09:40:51 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-11-04 09:40:51 +0000 |
| commit | efb5332373ccaa36b2d2e465b3bceb2b7f4b7655 (patch) | |
| tree | 58e3a6adbd48cfb42d6d4dfe4ae36d362b00fc44 | |
| parent | 8b0021db47f08c7523609987d87be34176bbe9d4 (diff) | |
| download | ChibiOS-efb5332373ccaa36b2d2e465b3bceb2b7f4b7655.tar.gz ChibiOS-efb5332373ccaa36b2d2e465b3bceb2b7f4b7655.tar.bz2 ChibiOS-efb5332373ccaa36b2d2e465b3bceb2b7f4b7655.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7473 35acf78f-673a-0410-8e92-d51de3d6d3f4
25 files changed, 1444 insertions, 63 deletions
diff --git a/demos/STM32/NIL-STM32F303-DISCOVERY/Makefile b/demos/STM32/NIL-STM32F303-DISCOVERY/Makefile index 78ef4614f..fc04b60e7 100644 --- a/demos/STM32/NIL-STM32F303-DISCOVERY/Makefile +++ b/demos/STM32/NIL-STM32F303-DISCOVERY/Makefile @@ -83,10 +83,10 @@ PROJECT = ch CHIBIOS = ../../..
include $(CHIBIOS)/os/hal/hal.mk
include $(CHIBIOS)/os/hal/boards/ST_STM32F3_DISCOVERY/board.mk
-include $(CHIBIOS)/os/hal/ports/STM32/STM32F30x/platform.mk
+include $(CHIBIOS)/os/hal/ports/STM32/STM32F3xx/platform.mk
include $(CHIBIOS)/os/hal/osal/nil/osal.mk
include $(CHIBIOS)/os/nil/nil.mk
-include $(CHIBIOS)/os/nil/ports/ARMCMx/compilers/GCC/mk/port_stm32f30x.mk
+include $(CHIBIOS)/os/nil/ports/ARMCMx/compilers/GCC/mk/port_stm32f3xx.mk
include $(CHIBIOS)/test/nil/test.mk
# Define linker script file here
diff --git a/demos/STM32/NIL-STM32F303-DISCOVERY/mcuconf.h b/demos/STM32/NIL-STM32F303-DISCOVERY/mcuconf.h index 28b5e1351..ddbcd459a 100644 --- a/demos/STM32/NIL-STM32F303-DISCOVERY/mcuconf.h +++ b/demos/STM32/NIL-STM32F303-DISCOVERY/mcuconf.h @@ -28,7 +28,7 @@ * 0...3 Lowest...Highest.
*/
-#define STM32F30x_MCUCONF
+#define STM32F3xx_MCUCONF
/*
* HAL driver system settings.
diff --git a/demos/various/RT-Win32-Simulator/Makefile b/demos/various/RT-Win32-Simulator/Makefile new file mode 100644 index 000000000..d6499dd77 --- /dev/null +++ b/demos/various/RT-Win32-Simulator/Makefile @@ -0,0 +1,150 @@ +#
+# !!!! Do NOT edit this makefile with an editor which replace tabs by spaces !!!!
+#
+##############################################################################################
+#
+# On command line:
+#
+# make all = Create project
+#
+# make clean = Clean project files.
+#
+# To rebuild project do "make clean" and "make all".
+#
+
+##############################################################################################
+# Start of default section
+#
+
+TRGT = mingw32-
+CC = $(TRGT)gcc
+AS = $(TRGT)gcc -x assembler-with-cpp
+
+# List all default C defines here, like -D_DEBUG=1
+DDEFS = -DSIMULATOR -DSHELL_USE_IPRINTF=FALSE
+
+# List all default ASM defines here, like -D_DEBUG=1
+DADEFS =
+
+# List all default directories to look for include files here
+DINCDIR =
+
+# List the default directory to look for the libraries here
+DLIBDIR =
+
+# List all default libraries here
+DLIBS = -lws2_32
+
+#
+# End of default section
+##############################################################################################
+
+##############################################################################################
+# Start of user section
+#
+
+# Define project name here
+PROJECT = ch
+
+# Define linker script file here
+LDSCRIPT =
+
+# List all user C define here, like -D_DEBUG=1
+UDEFS =
+
+# Define ASM defines here
+UADEFS =
+
+# Imported source files
+CHIBIOS = ../../..
+include $(CHIBIOS)/os/hal/boards/simulator/board.mk
+include ${CHIBIOS}/os/hal/hal.mk
+include ${CHIBIOS}/os/hal/ports/simulator/win32/platform.mk
+include ${CHIBIOS}/os/rt/ports/SIMIA32/compilers/GCC/port.mk
+include ${CHIBIOS}/os/rt/rt.mk
+include ${CHIBIOS}/test/rt/test.mk
+
+# List C source files here
+SRC = ${PORTSRC} \
+ ${KERNSRC} \
+ ${TESTSRC} \
+ ${HALSRC} \
+ ${PLATFORMSRC} \
+ $(BOARDSRC) \
+ ${CHIBIOS}/os/various/shell.c \
+ ${CHIBIOS}/os/various/memstreams.c \
+ ${CHIBIOS}/os/various/chprintf.c \
+ main.c
+
+# List ASM source files here
+ASRC =
+
+# List all user directories here
+UINCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
+ $(HALINC) $(PLATFORMINC) $(BOARDINC) \
+ ${CHIBIOS}/os/various
+
+# List the user directory to look for the libraries here
+ULIBDIR =
+
+# List all user libraries here
+ULIBS =
+
+# Define optimisation level here
+OPT = -ggdb -O2 -fomit-frame-pointer
+
+#
+# End of user defines
+##############################################################################################
+
+
+INCDIR = $(patsubst %,-I%,$(DINCDIR) $(UINCDIR))
+LIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR))
+DEFS = $(DDEFS) $(UDEFS)
+ADEFS = $(DADEFS) $(UADEFS)
+OBJS = $(ASRC:.s=.o) $(SRC:.c=.o)
+LIBS = $(DLIBS) $(ULIBS)
+
+LDFLAGS = -Wl,-Map=$(PROJECT).map,--cref,--no-warn-mismatch $(LIBDIR)
+ASFLAGS = -Wa,-amhls=$(<:.s=.lst) $(ADEFS)
+CPFLAGS = $(OPT) -Wall -Wextra -Wstrict-prototypes -fverbose-asm -Wa,-alms=$(<:.c=.lst) $(DEFS)
+
+# Generate dependency information
+CPFLAGS += -MD -MP -MF .dep/$(@F).d
+
+#
+# makefile rules
+#
+
+all: $(OBJS) $(PROJECT).exe
+
+%.o : %.c
+ $(CC) -c $(CPFLAGS) -I . $(INCDIR) $< -o $@
+
+%.o : %.s
+ $(AS) -c $(ASFLAGS) $< -o $@
+
+%exe: $(OBJS)
+ $(CC) $(OBJS) $(LDFLAGS) $(LIBS) -o $@
+
+gcov:
+ -mkdir gcov
+ $(COV) -u $(subst /,\,$(SRC))
+ -mv *.gcov ./gcov
+
+clean:
+ -rm -f $(OBJS)
+ -rm -f $(PROJECT).exe
+ -rm -f $(PROJECT).map
+ -rm -f $(SRC:.c=.c.bak)
+ -rm -f $(SRC:.c=.lst)
+ -rm -f $(ASRC:.s=.s.bak)
+ -rm -f $(ASRC:.s=.lst)
+ -rm -fR .dep
+
+#
+# Include the dependency files, should be the last of the makefile
+#
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
+
+# *** EOF ***
diff --git a/demos/various/RT-Win32-Simulator/chconf.h b/demos/various/RT-Win32-Simulator/chconf.h new file mode 100644 index 000000000..896f8b437 --- /dev/null +++ b/demos/various/RT-Win32-Simulator/chconf.h @@ -0,0 +1,498 @@ +/*
+ ChibiOS - Copyright (C) 2006-2014 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file templates/chconf.h
+ * @brief Configuration file template.
+ * @details A copy of this file must be placed in each project directory, it
+ * contains the application specific kernel settings.
+ *
+ * @addtogroup config
+ * @details Kernel related settings and hooks.
+ * @{
+ */
+
+#ifndef _CHCONF_H_
+#define _CHCONF_H_
+
+/*===========================================================================*/
+/**
+ * @name System timers settings
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief System time counter resolution.
+ * @note Allowed values are 16 or 32 bits.
+ */
+#define CH_CFG_ST_RESOLUTION 32
+
+/**
+ * @brief System tick frequency.
+ * @details Frequency of the system timer that drives the system ticks. This
+ * setting also defines the system tick time unit.
+ */
+#define CH_CFG_ST_FREQUENCY 1000
+
+/**
+ * @brief Time delta constant for the tick-less mode.
+ * @note If this value is zero then the system uses the classic
+ * periodic tick. This value represents the minimum number
+ * of ticks that is safe to specify in a timeout directive.
+ * The value one is not valid, timeouts are rounded up to
+ * this value.
+ */
+#define CH_CFG_ST_TIMEDELTA 1
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Kernel parameters and options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Round robin interval.
+ * @details This constant is the number of system ticks allowed for the
+ * threads before preemption occurs. Setting this value to zero
+ * disables the preemption for threads with equal priority and the
+ * round robin becomes cooperative. Note that higher priority
+ * threads can still preempt, the kernel is always preemptive.
+ * @note Disabling the round robin preemption makes the kernel more compact
+ * and generally faster.
+ * @note The round robin preemption is not supported in tickless mode and
+ * must be set to zero in that case.
+ */
+#define CH_CFG_TIME_QUANTUM 20
+
+/**
+ * @brief Managed RAM size.
+ * @details Size of the RAM area to be managed by the OS. If set to zero
+ * then the whole available RAM is used. The core memory is made
+ * available to the heap allocator and/or can be used directly through
+ * the simplified core memory allocator.
+ *
+ * @note In order to let the OS manage the whole RAM the linker script must
+ * provide the @p __heap_base__ and @p __heap_end__ symbols.
+ * @note Requires @p CH_CFG_USE_MEMCORE.
+ */
+#define CH_CFG_MEMCORE_SIZE 0x20000
+
+/**
+ * @brief Idle thread automatic spawn suppression.
+ * @details When this option is activated the function @p chSysInit()
+ * does not spawn the idle thread. The application @p main()
+ * function becomes the idle thread and must implement an
+ * infinite loop. */
+#define CH_CFG_NO_IDLE_THREAD FALSE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Performance options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief OS optimization.
+ * @details If enabled then time efficient rather than space efficient code
+ * is used when two possible implementations exist.
+ *
+ * @note This is not related to the compiler optimization options.
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_OPTIMIZE_SPEED TRUE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Subsystem options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Time Measurement APIs.
+ * @details If enabled then the time measurement APIs are included in
+ * the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_TM FALSE
+
+/**
+ * @brief Threads registry APIs.
+ * @details If enabled then the registry APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_REGISTRY TRUE
+
+/**
+ * @brief Threads synchronization APIs.
+ * @details If enabled then the @p chThdWait() function is included in
+ * the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_WAITEXIT TRUE
+
+/**
+ * @brief Semaphores APIs.
+ * @details If enabled then the Semaphores APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_SEMAPHORES TRUE
+
+/**
+ * @brief Semaphores queuing mode.
+ * @details If enabled then the threads are enqueued on semaphores by
+ * priority rather than in FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special
+ * requirements.
+ * @note Requires @p CH_CFG_USE_SEMAPHORES.
+ */
+#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
+
+/**
+ * @brief Mutexes APIs.
+ * @details If enabled then the mutexes APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_MUTEXES TRUE
+
+/**
+ * @brief Enables recursive behavior on mutexes.
+ * @note Recursive mutexes are heavier and have an increased
+ * memory footprint.
+ *
+ * @note The default is @p FALSE.
+ * @note Requires @p CH_CFG_USE_MUTEXES.
+ */
+#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
+
+/**
+ * @brief Conditional Variables APIs.
+ * @details If enabled then the conditional variables APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_MUTEXES.
+ */
+#define CH_CFG_USE_CONDVARS TRUE
+
+/**
+ * @brief Conditional Variables APIs with timeout.
+ * @details If enabled then the conditional variables APIs with timeout
+ * specification are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_CONDVARS.
+ */
+#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
+
+/**
+ * @brief Events Flags APIs.
+ * @details If enabled then the event flags APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_EVENTS TRUE
+
+/**
+ * @brief Events Flags APIs with timeout.
+ * @details If enabled then the events APIs with timeout specification
+ * are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_EVENTS.
+ */
+#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
+
+/**
+ * @brief Synchronous Messages APIs.
+ * @details If enabled then the synchronous messages APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_MESSAGES TRUE
+
+/**
+ * @brief Synchronous Messages queuing mode.
+ * @details If enabled then messages are served by priority rather than in
+ * FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special
+ * requirements.
+ * @note Requires @p CH_CFG_USE_MESSAGES.
+ */
+#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
+
+/**
+ * @brief Mailboxes APIs.
+ * @details If enabled then the asynchronous messages (mailboxes) APIs are
+ * included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_SEMAPHORES.
+ */
+#define CH_CFG_USE_MAILBOXES TRUE
+
+/**
+ * @brief I/O Queues APIs.
+ * @details If enabled then the I/O queues APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_QUEUES TRUE
+
+/**
+ * @brief Core Memory Manager APIs.
+ * @details If enabled then the core memory manager APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_MEMCORE TRUE
+
+/**
+ * @brief Heap Allocator APIs.
+ * @details If enabled then the memory heap allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
+ * @p CH_CFG_USE_SEMAPHORES.
+ * @note Mutexes are recommended.
+ */
+#define CH_CFG_USE_HEAP TRUE
+
+/**
+ * @brief Memory Pools Allocator APIs.
+ * @details If enabled then the memory pools allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_MEMPOOLS TRUE
+
+/**
+ * @brief Dynamic Threads APIs.
+ * @details If enabled then the dynamic threads creation APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_WAITEXIT.
+ * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
+ */
+#define CH_CFG_USE_DYNAMIC TRUE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Debug options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Debug option, kernel statistics.
+ *
+ * @note The default is @p FALSE.
+ */
+#define CH_DBG_STATISTICS FALSE
+
+/**
+ * @brief Debug option, system state check.
+ * @details If enabled the correct call protocol for system APIs is checked
+ * at runtime.
+ *
+ * @note The default is @p FALSE.
+ */
+#define CH_DBG_SYSTEM_STATE_CHECK FALSE
+
+/**
+ * @brief Debug option, parameters checks.
+ * @details If enabled then the checks on the API functions input
+ * parameters are activated.
+ *
+ * @note The default is @p FALSE.
+ */
+#define CH_DBG_ENABLE_CHECKS FALSE
+
+/**
+ * @brief Debug option, consistency checks.
+ * @details If enabled then all the assertions in the kernel code are
+ * activated. This includes consistency checks inside the kernel,
+ * runtime anomalies and port-defined checks.
+ *
+ * @note The default is @p FALSE.
+ */
+#define CH_DBG_ENABLE_ASSERTS FALSE
+
+/**
+ * @brief Debug option, trace buffer.
+ * @details If enabled then the context switch circular trace buffer is
+ * activated.
+ *
+ * @note The default is @p FALSE.
+ */
+#define CH_DBG_ENABLE_TRACE FALSE
+
+/**
+ * @brief Debug option, stack checks.
+ * @details If enabled then a runtime stack check is performed.
+ *
+ * @note The default is @p FALSE.
+ * @note The stack check is performed in a architecture/port dependent way.
+ * It may not be implemented or some ports.
+ * @note The default failure mode is to halt the system with the global
+ * @p panic_msg variable set to @p NULL.
+ */
+#define CH_DBG_ENABLE_STACK_CHECK FALSE
+
+/**
+ * @brief Debug option, stacks initialization.
+ * @details If enabled then the threads working area is filled with a byte
+ * value when a thread is created. This can be useful for the
+ * runtime measurement of the used stack.
+ *
+ * @note The default is @p FALSE.
+ */
+#define CH_DBG_FILL_THREADS FALSE
+
+/**
+ * @brief Debug option, threads profiling.
+ * @details If enabled then a field is added to the @p thread_t structure that
+ * counts the system ticks occurred while executing the thread.
+ *
+ * @note The default is @p FALSE.
+ * @note This debug option is not currently compatible with the
+ * tickless mode.
+ */
+#define CH_DBG_THREADS_PROFILING FALSE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Kernel hooks
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Threads descriptor structure extension.
+ * @details User fields added to the end of the @p thread_t structure.
+ */
+#define CH_CFG_THREAD_EXTRA_FIELDS \
+ /* Add threads custom fields here.*/
+
+/**
+ * @brief Threads initialization hook.
+ * @details User initialization code added to the @p chThdInit() API.
+ *
+ * @note It is invoked from within @p chThdInit() and implicitly from all
+ * the threads creation APIs.
+ */
+#define CH_CFG_THREAD_INIT_HOOK(tp) { \
+ /* Add threads initialization code here.*/ \
+}
+
+/**
+ * @brief Threads finalization hook.
+ * @details User finalization code added to the @p chThdExit() API.
+ *
+ * @note It is inserted into lock zone.
+ * @note It is also invoked when the threads simply return in order to
+ * terminate.
+ */
+#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
+ /* Add threads finalization code here.*/ \
+}
+
+/**
+ * @brief Context switch hook.
+ * @details This hook is invoked just before switching between threads.
+ */
+#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
+ /* System halt code here.*/ \
+}
+
+/**
+ * @brief Idle thread enter hook.
+ * @note This hook is invoked within a critical zone, no OS functions
+ * should be invoked from here.
+ * @note This macro can be used to activate a power saving mode.
+ */
+#define CH_CFG_IDLE_ENTER_HOOK() { \
+}
+
+/**
+ * @brief Idle thread leave hook.
+ * @note This hook is invoked within a critical zone, no OS functions
+ * should be invoked from here.
+ * @note This macro can be used to deactivate a power saving mode.
+ */
+#define CH_CFG_IDLE_LEAVE_HOOK() { \
+}
+
+/**
+ * @brief Idle Loop hook.
+ * @details This hook is continuously invoked by the idle thread loop.
+ */
+#define CH_CFG_IDLE_LOOP_HOOK() { \
+ /* Idle loop code here.*/ \
+}
+
+/**
+ * @brief System tick event hook.
+ * @details This hook is invoked in the system tick handler immediately
+ * after processing the virtual timers queue.
+ */
+#define CH_CFG_SYSTEM_TICK_HOOK() { \
+ /* System tick event code here.*/ \
+}
+
+/**
+ * @brief System halt hook.
+ * @details This hook is invoked in case to a system halting error before
+ * the system is halted.
+ */
+#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
+ /* System halt code here.*/ \
+}
+
+/** @} */
+
+/*===========================================================================*/
+/* Port-specific settings (override port settings defaulted in chcore.h). */
+/*===========================================================================*/
+
+#endif /* _CHCONF_H_ */
+
+/** @} */
diff --git a/demos/various/RT-Win32-Simulator/halconf.h b/demos/various/RT-Win32-Simulator/halconf.h new file mode 100644 index 000000000..99b24a1f5 --- /dev/null +++ b/demos/various/RT-Win32-Simulator/halconf.h @@ -0,0 +1,312 @@ +/*
+ ChibiOS - Copyright (C) 2006-2014 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file templates/halconf.h
+ * @brief HAL configuration header.
+ * @details HAL configuration file, this file allows to enable or disable the
+ * various device drivers from your application. You may also use
+ * this file in order to override the device drivers default settings.
+ *
+ * @addtogroup HAL_CONF
+ * @{
+ */
+
+#ifndef _HALCONF_H_
+#define _HALCONF_H_
+
+/*#include "mcuconf.h"*/
+
+/**
+ * @brief Enables the TM subsystem.
+ */
+#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
+#define HAL_USE_TM FALSE
+#endif
+
+/**
+ * @brief Enables the PAL subsystem.
+ */
+#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
+#define HAL_USE_PAL TRUE
+#endif
+
+/**
+ * @brief Enables the ADC subsystem.
+ */
+#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
+#define HAL_USE_ADC FALSE
+#endif
+
+/**
+ * @brief Enables the CAN subsystem.
+ */
+#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
+#define HAL_USE_CAN FALSE
+#endif
+
+/**
+ * @brief Enables the EXT subsystem.
+ */
+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
+#define HAL_USE_EXT FALSE
+#endif
+
+/**
+ * @brief Enables the GPT subsystem.
+ */
+#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
+#define HAL_USE_GPT FALSE
+#endif
+
+/**
+ * @brief Enables the I2C subsystem.
+ */
+#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
+#define HAL_USE_I2C FALSE
+#endif
+
+/**
+ * @brief Enables the ICU subsystem.
+ */
+#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
+#define HAL_USE_ICU FALSE
+#endif
+
+/**
+ * @brief Enables the MAC subsystem.
+ */
+#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
+#define HAL_USE_MAC FALSE
+#endif
+
+/**
+ * @brief Enables the MMC_SPI subsystem.
+ */
+#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_MMC_SPI FALSE
+#endif
+
+/**
+ * @brief Enables the PWM subsystem.
+ */
+#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
+#define HAL_USE_PWM FALSE
+#endif
+
+/**
+ * @brief Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC FALSE
+#endif
+
+/**
+ * @brief Enables the SDC subsystem.
+ */
+#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
+#define HAL_USE_SDC FALSE
+#endif
+
+/**
+ * @brief Enables the SERIAL subsystem.
+ */
+#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL TRUE
+#endif
+
+/**
+ * @brief Enables the SERIAL over USB subsystem.
+ */
+#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL_USB FALSE
+#endif
+
+/**
+ * @brief Enables the SPI subsystem.
+ */
+#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_SPI FALSE
+#endif
+
+/**
+ * @brief Enables the UART subsystem.
+ */
+#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
+#define HAL_USE_UART FALSE
+#endif
+
+/**
+ * @brief Enables the USB subsystem.
+ */
+#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
+#define HAL_USE_USB FALSE
+#endif
+
+/*===========================================================================*/
+/* ADC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
+#define ADC_USE_WAIT TRUE
+#endif
+
+/**
+ * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define ADC_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* CAN driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Sleep mode related APIs inclusion switch.
+ */
+#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
+#define CAN_USE_SLEEP_MODE TRUE
+#endif
+
+/*===========================================================================*/
+/* I2C driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables the mutual exclusion APIs on the I2C bus.
+ */
+#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define I2C_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* MAC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
+#define MAC_USE_ZERO_COPY FALSE
+#endif
+
+/**
+ * @brief Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
+#define MAC_USE_EVENTS TRUE
+#endif
+
+/*===========================================================================*/
+/* MMC_SPI driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ * routines releasing some extra CPU time for the threads with
+ * lower priority, this may slow down the driver a bit however.
+ * This option is recommended also if the SPI driver does not
+ * use a DMA channel and heavily loads the CPU.
+ */
+#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
+#define MMC_NICE_WAITING TRUE
+#endif
+
+/*===========================================================================*/
+/* SDC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Number of initialization attempts before rejecting the card.
+ * @note Attempts are performed at 10mS intervals.
+ */
+#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
+#define SDC_INIT_RETRY 100
+#endif
+
+/**
+ * @brief Include support for MMC cards.
+ * @note MMC support is not yet implemented so this option must be kept
+ * at @p FALSE.
+ */
+#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
+#define SDC_MMC_SUPPORT FALSE
+#endif
+
+/**
+ * @brief Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ * routines releasing some extra CPU time for the threads with
+ * lower priority, this may slow down the driver a bit however.
+ */
+#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
+#define SDC_NICE_WAITING TRUE
+#endif
+
+/*===========================================================================*/
+/* SERIAL driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Default bit rate.
+ * @details Configuration parameter, this is the baud rate selected for the
+ * default configuration.
+ */
+#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
+#define SERIAL_DEFAULT_BITRATE 38400
+#endif
+
+/**
+ * @brief Serial buffers size.
+ * @details Configuration parameter, you can change the depth of the queue
+ * buffers depending on the requirements of your application.
+ * @note The default is 64 bytes for both the transmission and receive
+ * buffers.
+ */
+#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_BUFFERS_SIZE 32
+#endif
+
+/*===========================================================================*/
+/* SPI driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
+#define SPI_USE_WAIT TRUE
+#endif
+
+/**
+ * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define SPI_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+#endif /* _HALCONF_H_ */
+
+/** @} */
diff --git a/demos/various/RT-Win32-Simulator/main.c b/demos/various/RT-Win32-Simulator/main.c new file mode 100644 index 000000000..e904850d5 --- /dev/null +++ b/demos/various/RT-Win32-Simulator/main.c @@ -0,0 +1,253 @@ +/*
+ ChibiOS - Copyright (C) 2006-2014 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#include "ch.h"
+#include "hal.h"
+#include "test.h"
+#include "shell.h"
+#include "chprintf.h"
+
+#define SHELL_WA_SIZE THD_WA_SIZE(4096)
+#define CONSOLE_WA_SIZE THD_WA_SIZE(4096)
+#define TEST_WA_SIZE THD_WA_SIZE(4096)
+
+#define cputs(msg) chMsgSend(cdtp, (msg_t)msg)
+
+static Thread *cdtp;
+static Thread *shelltp1;
+static Thread *shelltp2;
+
+static void cmd_mem(BaseSequentialStream *chp, int argc, char *argv[]) {
+ size_t n, size;
+
+ (void)argv;
+ if (argc > 0) {
+ chprintf(chp, "Usage: mem\r\n");
+ return;
+ }
+ n = chHeapStatus(NULL, &size);
+ chprintf(chp, "core free memory : %u bytes\r\n", chCoreStatus());
+ chprintf(chp, "heap fragments : %u\r\n", n);
+ chprintf(chp, "heap free total : %u bytes\r\n", size);
+}
+
+static void cmd_threads(BaseSequentialStream *chp, int argc, char *argv[]) {
+ static const char *states[] = {THD_STATE_NAMES};
+ Thread *tp;
+
+ (void)argv;
+ if (argc > 0) {
+ chprintf(chp, "Usage: threads\r\n");
+ return;
+ }
+ chprintf(chp, " addr stack prio refs state time\r\n");
+ tp = chRegFirstThread();
+ do {
+ chprintf(chp, "%.8lx %.8lx %4lu %4lu %9s %lu\r\n",
+ (uint32_t)tp, (uint32_t)tp->p_ctx.esp,
+ (uint32_t)tp->p_prio, (uint32_t)(tp->p_refs - 1),
+ states[tp->p_state], (uint32_t)tp->p_time);
+ tp = chRegNextThread(tp);
+ } while (tp != NULL);
+}
+
+static void cmd_test(BaseSequentialStream *chp, int argc, char *argv[]) {
+ Thread *tp;
+
+ (void)argv;
+ if (argc > 0) {
+ chprintf(chp, "Usage: test\r\n");
+ return;
+ }
+ tp = chThdCreateFromHeap(NULL, TEST_WA_SIZE, chThdGetPriority(),
+ TestThread, chp);
+ if (tp == NULL) {
+ chprintf(chp, "out of memory\r\n");
+ return;
+ }
+ chThdWait(tp);
+}
+
+static const ShellCommand commands[] = {
+ {"mem", cmd_mem},
+ {"threads", cmd_threads},
+ {"test", cmd_test},
+ {NULL, NULL}
+};
+
+static const ShellConfig shell_cfg1 = {
+ (BaseSequentialStream *)&SD1,
+ commands
+};
+
+static const ShellConfig shell_cfg2 = {
+ (BaseSequentialStream *)&SD2,
+ commands
+};
+
+/*
+ * Console print server done using synchronous messages. This makes the access
+ * to the C printf() thread safe and the print operation atomic among threads.
+ * In this example the message is the zero terminated string itself.
+ */
+static msg_t console_thread(void *arg) {
+
+ (void)arg;
+ while (!chThdShouldTerminate()) {
+ Thread *tp = chMsgWait();
+ puts((char *)chMsgGet(tp));
+ fflush(stdout);
+ chMsgRelease(tp, RDY_OK);
+ }
+ return 0;
+}
+
+/**
+ * @brief Shell termination handler.
+ *
+ * @param[in] id event id.
+ */
+static void termination_handler(eventid_t id) {
+
+ (void)id;
+ if (shelltp1 && chThdTerminated(shelltp1)) {
+ chThdWait(shelltp1);
+ shelltp1 = NULL;
+ chThdSleepMilliseconds(10);
+ cputs("Init: shell on SD1 terminated");
+ chSysLock();
+ chOQResetI(&SD1.oqueue);
+ chSysUnlock();
+ }
+ if (shelltp2 && chThdTerminated(shelltp2)) {
+ chThdWait(shelltp2);
+ shelltp2 = NULL;
+ chThdSleepMilliseconds(10);
+ cputs("Init: shell on SD2 terminated");
+ chSysLock();
+ chOQResetI(&SD2.oqueue);
+ chSysUnlock();
+ }
+}
+
+static EventListener sd1fel, sd2fel;
+
+/**
+ * @brief SD1 status change handler.
+ *
+ * @param[in] id event id.
+ */
+static void sd1_handler(eventid_t id) {
+ flagsmask_t flags;
+
+ (void)id;
+ flags = chEvtGetAndClearFlags(&sd1fel);
+ if ((flags & CHN_CONNECTED) && (shelltp1 == NULL)) {
+ cputs("Init: connection on SD1");
+ shelltp1 = shellCreate(&shell_cfg1, SHELL_WA_SIZE, NORMALPRIO + 1);
+ }
+ if (flags & CHN_DISCONNECTED) {
+ cputs("Init: disconnection on SD1");
+ chSysLock();
+ chIQResetI(&SD1.iqueue);
+ chSysUnlock();
+ }
+}
+
+/**
+ * @brief SD2 status change handler.
+ *
+ * @param[in] id event id.
+ */
+static void sd2_handler(eventid_t id) {
+ flagsmask_t flags;
+
+ (void)id;
+ flags = chEvtGetAndClearFlags(&sd2fel);
+ if ((flags & CHN_CONNECTED) && (shelltp2 == NULL)) {
+ cputs("Init: connection on SD2");
+ shelltp2 = shellCreate(&shell_cfg2, SHELL_WA_SIZE, NORMALPRIO + 10);
+ }
+ if (flags & CHN_DISCONNECTED) {
+ cputs("Init: disconnection on SD2");
+ chSysLock();
+ chIQResetI(&SD2.iqueue);
+ chSysUnlock();
+ }
+}
+
+static evhandler_t fhandlers[] = {
+ termination_handler,
+ sd1_handler,
+ sd2_handler
+};
+
+/*------------------------------------------------------------------------*
+ * Simulator main. *
+ *------------------------------------------------------------------------*/
+int main(void) {
+ EventListener tel;
+
+ /*
+ * System initializations.
+ * - HAL initialization, this also initializes the configured device drivers
+ * and performs the board-specific initializations.
+ * - Kernel initialization, the main() function becomes a thread and the
+ * RTOS is active.
+ */
+ halInit();
+ chSysInit();
+
+ /*
+ * Serial ports (simulated) initialization.
+ */
+ sdStart(&SD1, NULL);
+ sdStart(&SD2, NULL);
+
+ /*
+ * Shell manager initialization.
+ */
+ shellInit();
+ chEvtRegister(&shell_terminated, &tel, 0);
+
+ /*
+ * Console thread started.
+ */
+ cdtp = chThdCreateFromHeap(NULL, CONSOLE_WA_SIZE, NORMALPRIO + 1,
+ console_thread, NULL);
+
+ /*
+ * Initializing connection/disconnection events.
+ */
+ cputs("Shell service started on SD1, SD2");
+ cputs(" - Listening for connections on SD1");
+ chEvtRegister(chnGetEventSource(&SD1), &sd1fel, 1);
+ cputs(" - Listening for connections on SD2");
+ chEvtRegister(chnGetEventSource(&SD2), &sd2fel, 2);
+
+ /*
+ * Events servicing loop.
+ */
+ while (!chThdShouldTerminate())
+ chEvtDispatch(fhandlers, chEvtWaitOne(ALL_EVENTS));
+
+ /*
+ * Clean simulator exit.
+ */
+ chEvtUnregister(chnGetEventSource(&SD1), &sd1fel);
+ chEvtUnregister(chnGetEventSource(&SD2), &sd2fel);
+ return 0;
+}
diff --git a/demos/various/RT-Win32-Simulator/readme.txt b/demos/various/RT-Win32-Simulator/readme.txt new file mode 100644 index 000000000..e72e2e0a3 --- /dev/null +++ b/demos/various/RT-Win32-Simulator/readme.txt @@ -0,0 +1,33 @@ +*****************************************************************************
+** ChibiOS/RT port for x86 into a Win32 process **
+*****************************************************************************
+
+** TARGET **
+
+The demo runs under any Windows version as an application program. The serial
+I/O is simulated over TCP/IP sockets.
+
+** The Demo **
+
+The demo listens on the two serial ports, when a connection is detected a
+thread is started that serves a small command shell.
+The demo shows how to create/terminate threads at runtime, how to listen to
+events, how to work with serial ports, how to use the messages.
+You can develop your ChibiOS/RT application using this demo as a simulator
+then you can recompile it for a different architecture.
+See demo.c for details.
+
+** Build Procedure **
+
+The demo was built using the MinGW toolchain.
+
+** Connect to the demo **
+
+In order to connect to the demo a telnet client is required. A good choice
+is PuTTY:
+
+http://www.putty.org/
+
+Host Name: 127.0.0.1
+Port: 29001 and/or 29002
+Connection Type: Raw
diff --git a/os/hal/boards/ST_EVB_SPC560B/board.c b/os/hal/boards/ST_EVB_SPC560B/board.c new file mode 100644 index 000000000..4ecf10fd9 --- /dev/null +++ b/os/hal/boards/ST_EVB_SPC560B/board.c @@ -0,0 +1,66 @@ +/*
+ SPC5 HAL - Copyright (C) 2013 STMicroelectronics
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#include "hal.h"
+
+#if HAL_USE_PAL || defined(__DOXYGEN__)
+/* Initial setup of all defined pads, the list is terminated by a {-1, 0, 0}.*/
+static const spc_siu_init_t spc_siu_init[] = {
+ {PCR(PORT_B, PB_LIN0_TDX), PAL_HIGH, PAL_MODE_OUTPUT_ALTERNATE(1)},
+ {PCR(PORT_B, PB_LIN0_RDX), PAL_HIGH, PAL_MODE_INPUT},
+ {PCR(PORT_E, PE_BUTTON1), PAL_LOW, PAL_MODE_INPUT},
+ {PCR(PORT_E, PE_BUTTON2), PAL_LOW, PAL_MODE_INPUT},
+ {PCR(PORT_E, PE_BUTTON3), PAL_LOW, PAL_MODE_INPUT},
+ {PCR(PORT_E, PE_BUTTON4), PAL_LOW, PAL_MODE_INPUT},
+ {PCR(PORT_E, PE_LED1), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
+ {PCR(PORT_E, PE_LED2), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
+ {PCR(PORT_E, PE_LED3), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
+ {PCR(PORT_E, PE_LED4), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
+ {-1, 0, 0}
+};
+
+/* Initialization array for the PSMI registers.*/
+static const uint8_t spc_padsels_init[SPC5_SIUL_NUM_PADSELS] = {
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/**
+ * @brief PAL setup.
+ */
+const PALConfig pal_default_config = {
+ PAL_MODE_UNCONNECTED, /* Default mode for all undefined pads. */
+ spc_siu_init,
+ spc_padsels_init
+};
+#endif
+
+/*
+ * Early initialization code.
+ * This initialization must be performed just after stack setup and before
+ * any other initialization.
+ */
+void __early_init(void) {
+
+ spc_clock_init();
+}
+
+/*
+ * Board-specific initialization code.
+ */
+void boardInit(void) {
+
+}
diff --git a/os/hal/boards/ST_EVB_SPC560B/board.h b/os/hal/boards/ST_EVB_SPC560B/board.h new file mode 100644 index 000000000..ef2132778 --- /dev/null +++ b/os/hal/boards/ST_EVB_SPC560B/board.h @@ -0,0 +1,73 @@ +/*
+ SPC5 HAL - Copyright (C) 2013 STMicroelectronics
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+/*
+ * Setup for a generic SPC560Bxx proto board.
+ */
+
+/*
+ * Board identifiers.
+ */
+#define BOARD_GENERIC_SPC560BC
+#define BOARD_NAME "EVB with SPC560Bxx Mini Module"
+
+/*
+ * Device identifier.
+ */
+#define _SPC560B60L7_
+
+/*
+ * Board frequencies.
+ */
+#if !defined(SPC5_XOSC_CLK)
+#define SPC5_XOSC_CLK 8000000
+#endif
+
+/*
+ * I/O definitions.
+ */
+#define PB_LIN0_TDX 2
+#define PB_LIN0_RDX 3
+
+#define PE_BUTTON1 0
+#define PE_BUTTON2 1
+#define PE_BUTTON3 2
+#define PE_BUTTON4 3
+
+#define PE_LED1 4
+#define PE_LED2 5
+#define PE_LED3 6
+#define PE_LED4 7
+
+/*
+ * Support macros.
+ */
+#define PCR(port, pin) (((port) * 16) + (pin))
+
+#if !defined(_FROM_ASM_)
+#ifdef __cplusplus
+extern "C" {
+#endif
+ void boardInit(void);
+#ifdef __cplusplus
+}
+#endif
+#endif /* _FROM_ASM_ */
+
+#endif /* _BOARD_H_ */
diff --git a/os/hal/boards/ST_EVB_SPC560B/board.mk b/os/hal/boards/ST_EVB_SPC560B/board.mk new file mode 100644 index 000000000..4aa644777 --- /dev/null +++ b/os/hal/boards/ST_EVB_SPC560B/board.mk @@ -0,0 +1,5 @@ +# List of all the board related files.
+BOARDSRC = ${CHIBIOS}/os/hal/boards/ST_EVB_SPC560B/board.c
+
+# Required include directories
+BOARDINC = ${CHIBIOS}/os/hal/boards/ST_EVB_SPC560B
diff --git a/os/nil/ports/ARMCMx/compilers/GCC/niltypes.h b/os/nil/ports/ARMCMx/compilers/GCC/niltypes.h index 30750c31d..a594d8ad9 100644 --- a/os/nil/ports/ARMCMx/compilers/GCC/niltypes.h +++ b/os/nil/ports/ARMCMx/compilers/GCC/niltypes.h @@ -59,6 +59,15 @@ typedef int32_t cnt_t; /**< Generic signed counter. */ typedef uint32_t ucnt_t; /**< Generic unsigned counter. */
/**
+ * @brief Type of system time.
+ */
+#if (NIL_CFG_ST_RESOLUTION == 32) || defined(__DOXYGEN__)
+typedef uint32_t systime_t;
+#else
+typedef uint16_t systime_t;
+#endif
+
+/**
* @brief ROM constant modifier.
* @note It is set to use the "const" keyword in this port.
*/
diff --git a/os/nil/ports/ARMCMx/nilcore.h b/os/nil/ports/ARMCMx/nilcore.h index eb6fc0f0c..8a9d98b8f 100644 --- a/os/nil/ports/ARMCMx/nilcore.h +++ b/os/nil/ports/ARMCMx/nilcore.h @@ -128,15 +128,6 @@ #if !defined(_FROM_ASM_)
/**
- * @brief Type of system time.
- */
-#if (NIL_CFG_ST_RESOLUTION == 32) || defined(__DOXYGEN__)
-typedef uint32_t systime_t;
-#else
-typedef uint16_t systime_t;
-#endif
-
-/**
* @brief Type of a generic ARM register.
*/
typedef void *regarm_t;
diff --git a/os/nil/ports/AVR/compilers/GCC/niltypes.h b/os/nil/ports/AVR/compilers/GCC/niltypes.h index 022ec9d56..a5a74d48f 100644 --- a/os/nil/ports/AVR/compilers/GCC/niltypes.h +++ b/os/nil/ports/AVR/compilers/GCC/niltypes.h @@ -59,6 +59,15 @@ typedef int8_t cnt_t; /**< Generic signed counter. */ typedef uint8_t ucnt_t; /**< Generic unsigned counter. */
/**
+ * @brief Type of system time.
+ */
+#if (NIL_CFG_ST_RESOLUTION == 32) || defined(__DOXYGEN__)
+typedef uint32_t systime_t;
+#else
+typedef uint16_t systime_t;
+#endif
+
+/**
* @brief ROM constant modifier.
* @note It is set to use the "const" keyword in this port.
*/
diff --git a/os/nil/ports/e200/compilers/GCC/niltypes.h b/os/nil/ports/e200/compilers/GCC/niltypes.h index 6ea0f76de..1b9267801 100644 --- a/os/nil/ports/e200/compilers/GCC/niltypes.h +++ b/os/nil/ports/e200/compilers/GCC/niltypes.h @@ -59,6 +59,15 @@ typedef int32_t cnt_t; /**< Generic signed counter. */ typedef uint32_t ucnt_t; /**< Generic unsigned counter. */
/**
+ * @brief Type of system time.
+ */
+#if (NIL_CFG_ST_RESOLUTION == 32) || defined(__DOXYGEN__)
+typedef uint32_t systime_t;
+#else
+typedef uint16_t systime_t;
+#endif
+
+/**
* @brief ROM constant modifier.
* @note It is set to use the "const" keyword in this port.
*/
diff --git a/os/nil/ports/e200/nilcore.h b/os/nil/ports/e200/nilcore.h index 2fbfbf911..93ca1ea8e 100644 --- a/os/nil/ports/e200/nilcore.h +++ b/os/nil/ports/e200/nilcore.h @@ -151,15 +151,6 @@ #if !defined(_FROM_ASM_)
/**
- * @brief Type of system time.
- */
-#if (NIL_CFG_ST_RESOLUTION == 32) || defined(__DOXYGEN__)
-typedef uint32_t systime_t;
-#else
-typedef uint16_t systime_t;
-#endif
-
-/**
* @brief Type of stack and memory alignment enforcement.
*/
typedef uint64_t stkalign_t;
diff --git a/os/nil/templates/nilcore.h b/os/nil/templates/nilcore.h index a868e74d8..2317ee852 100644 --- a/os/nil/templates/nilcore.h +++ b/os/nil/templates/nilcore.h @@ -109,15 +109,6 @@ #if !defined(_FROM_ASM_)
/**
- * @brief Type of system time.
- */
-#if (NIL_CFG_ST_RESOLUTION == 32) || defined(__DOXYGEN__)
-typedef uint32_t systime_t;
-#else
-typedef uint16_t systime_t;
-#endif
-
-/**
* @brief Type of stack and memory alignment enforcement.
*/
typedef uint64_t stkalign_t;
diff --git a/os/nil/templates/niltypes.h b/os/nil/templates/niltypes.h index c7d535a1a..64ae606ee 100644 --- a/os/nil/templates/niltypes.h +++ b/os/nil/templates/niltypes.h @@ -59,6 +59,15 @@ typedef int32_t cnt_t; /**< Generic signed counter. */ typedef uint32_t ucnt_t; /**< Generic unsigned counter. */
/**
+ * @brief Type of system time.
+ */
+#if (NIL_CFG_ST_RESOLUTION == 32) || defined(__DOXYGEN__)
+typedef uint32_t systime_t;
+#else
+typedef uint16_t systime_t;
+#endif
+
+/**
* @brief ROM constant modifier.
* @note It is set to use the "const" keyword in this port.
*/
diff --git a/os/rt/include/ch.h b/os/rt/include/ch.h index 5e67aa202..d49aa21fb 100644 --- a/os/rt/include/ch.h +++ b/os/rt/include/ch.h @@ -63,8 +63,8 @@ /** @} */
/* Core headers.*/
-#include "chsystypes.h"
#include "chtypes.h"
+#include "chsystypes.h"
#include "chconf.h"
#include "chcore.h"
#include "chdebug.h"
diff --git a/os/rt/include/chsystypes.h b/os/rt/include/chsystypes.h index 6cf0c147b..74a45b8a2 100644 --- a/os/rt/include/chsystypes.h +++ b/os/rt/include/chsystypes.h @@ -46,6 +46,15 @@ /*===========================================================================*/
/**
+ * @brief Type of system time.
+ */
+#if (CH_CFG_ST_RESOLUTION == 32) || defined(__DOXYGEN__)
+typedef uint32_t systime_t;
+#else
+typedef uint16_t systime_t;
+#endif
+
+/**
* @extends threads_queue_t
*
* @brief Type of a thread structure.
diff --git a/os/rt/ports/ARM/chcore.h b/os/rt/ports/ARM/chcore.h index 69c019fdf..8a377010b 100644 --- a/os/rt/ports/ARM/chcore.h +++ b/os/rt/ports/ARM/chcore.h @@ -175,15 +175,6 @@ #if !defined(_FROM_ASM_)
/**
- * @brief Type of system time.
- */
-#if (CH_CFG_ST_RESOLUTION == 32) || defined(__DOXYGEN__)
-typedef uint32_t systime_t;
-#else
-typedef uint16_t systime_t;
-#endif
-
-/**
* @brief Type of stack and memory alignment enforcement.
* @note In this architecture the stack alignment is enforced to 64 bits.
*/
diff --git a/os/rt/ports/ARMCMx/chcore.h b/os/rt/ports/ARMCMx/chcore.h index 0f2030744..773d7a85c 100644 --- a/os/rt/ports/ARMCMx/chcore.h +++ b/os/rt/ports/ARMCMx/chcore.h @@ -129,15 +129,6 @@ #if !defined(_FROM_ASM_)
/**
- * @brief Type of system time.
- */
-#if (CH_CFG_ST_RESOLUTION == 32) || defined(__DOXYGEN__)
-typedef uint32_t systime_t;
-#else
-typedef uint16_t systime_t;
-#endif
-
-/**
* @brief Type of a generic ARM register.
*/
typedef void *regarm_t;
diff --git a/os/rt/ports/AVR/compilers/GCC/chtypes.h b/os/rt/ports/AVR/compilers/GCC/chtypes.h index 56880c08a..4ef04189b 100644 --- a/os/rt/ports/AVR/compilers/GCC/chtypes.h +++ b/os/rt/ports/AVR/compilers/GCC/chtypes.h @@ -62,7 +62,6 @@ typedef int16_t msg_t; /**< Inter-thread message. */ typedef uint8_t eventid_t; /**< Event Id. */
typedef uint8_t eventmask_t; /**< Event mask. */
typedef uint8_t eventflags_t; /**< Event flags. */
-typedef uint16_t systime_t; /**< System time. */
typedef int8_t cnt_t; /**< Resources counter. */
/**
diff --git a/os/rt/ports/SIMIA32/chcore.h b/os/rt/ports/SIMIA32/chcore.h index 70e16199a..9c8cd2587 100644 --- a/os/rt/ports/SIMIA32/chcore.h +++ b/os/rt/ports/SIMIA32/chcore.h @@ -147,7 +147,7 @@ struct port_intctx { * @p port_intctx structure representing the stack pointer
* at context switch time.
*/
-struct port_context {
+struct context {
struct intctx volatile *esp;
};
@@ -230,7 +230,7 @@ struct port_context { #ifdef __cplusplus
extern "C" {
#endif
- __attribute__((fastcall)) void port_switch(Thread *ntp, Thread *otp);
+ __attribute__((fastcall)) void port_switch(thread_t *ntp, thread_t *otp);
__attribute__((cdecl, noreturn)) void _port_thread_start(msg_t (*pf)(void *),
void *p);
void _sim_check_for_interrupts(void);
diff --git a/os/rt/ports/SIMIA32/compilers/GCC/port.mk b/os/rt/ports/SIMIA32/compilers/GCC/port.mk index 8f053abc4..0d5f0903d 100644 --- a/os/rt/ports/SIMIA32/compilers/GCC/port.mk +++ b/os/rt/ports/SIMIA32/compilers/GCC/port.mk @@ -1,6 +1,7 @@ # List of the ChibiOS/RT SIMIA32 port files.
-PORTSRC = ${CHIBIOS}/os/ports/GCC/SIMIA32/chcore.c
+PORTSRC = ${CHIBIOS}/os/rt/ports/SIMIA32/chcore.c
PORTASM =
-PORTINC = ${CHIBIOS}/os/ports/GCC/SIMIA32
+PORTINC = ${CHIBIOS}/os/rt/ports/SIMIA32/compilers/GCC \
+ ${CHIBIOS}/os/rt/ports/SIMIA32
diff --git a/os/rt/ports/e200/chcore.h b/os/rt/ports/e200/chcore.h index 7f97beeff..f5ecf2616 100644 --- a/os/rt/ports/e200/chcore.h +++ b/os/rt/ports/e200/chcore.h @@ -182,15 +182,6 @@ #if !defined(_FROM_ASM_)
/**
- * @brief Type of system time.
- */
-#if (CH_CFG_ST_RESOLUTION == 32) || defined(__DOXYGEN__)
-typedef uint32_t systime_t;
-#else
-typedef uint16_t systime_t;
-#endif
-
-/**
* @brief Type of stack and memory alignment enforcement.
* @note In this architecture the stack alignment is enforced to 64 bits.
*/
|