git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@268 35acf78f-673a-0410-8e92-d51de3d6d3f4

8 files changed, 26 insertions, 21 deletions

diff --git a/demos/ARMCM3-STM32F103-GCC/chconf.h b/demos/ARMCM3-STM32F103-GCC/chconf.h
index c8817f85c..f2b87e5bc 100644
--- a/demos/ARMCM3-STM32F103-GCC/chconf.h
+++ b/demos/ARMCM3-STM32F103-GCC/chconf.h
@@ -158,7 +158,7 @@
  *  @note the debug support is port-dependent, it may be not present on some

  *       targets. In that case stub functions will be included.

  */

-//#define CH_USE_DEBUG

+#define CH_USE_DEBUG

 

 /** Debug option: Includes the threads context switch tracing feature.

  */

diff --git a/demos/ARMCM3-STM32F103-GCC/main.c b/demos/ARMCM3-STM32F103-GCC/main.c
index 234878b7b..270786695 100644
--- a/demos/ARMCM3-STM32F103-GCC/main.c
+++ b/demos/ARMCM3-STM32F103-GCC/main.c
@@ -26,7 +26,7 @@
 /*

  * Red LEDs blinker thread, times are in milliseconds.

  */

-static WorkingArea(waThread1, 64);

+static WorkingArea(waThread1, 128);

 static msg_t Thread1(void *arg) {

 

   while (TRUE) {

diff --git a/ports/ARMCM3/chcore.c b/ports/ARMCM3/chcore.c
index c5424848e..bf0cdc0d9 100644
--- a/ports/ARMCM3/chcore.c
+++ b/ports/ARMCM3/chcore.c
@@ -128,7 +128,7 @@ void PendSVVector(void) {
   }

 

   asm volatile ("pop     {lr}                                   \n\t" \

-                "mov     r3, #0                                 \n\t" \

+                "movs    r3, #0                                 \n\t" \

                 "mrs     %0, PSP" : "=r" (sp_thd) : );

 #ifdef CH_CURRP_REGISTER_CACHE

   asm volatile ("stmdb   %0!, {r3-r6,r8-r11, lr}" :

diff --git a/ports/ARMCM3/chcore.h b/ports/ARMCM3/chcore.h
index e9fc693e0..6c80fdc09 100644
--- a/ports/ARMCM3/chcore.h
+++ b/ports/ARMCM3/chcore.h
@@ -78,16 +78,16 @@ typedef struct {
 }

 

 #define chSysLock() {                                                   \

-  asm volatile ("push    {r12}");                                       \

-  asm volatile ("mov     r12, #0x10");                                  \

-  asm volatile ("msr     BASEPRI, r12");                                \

-  asm volatile ("pop     {r12}");                                       \

+  asm volatile ("push    {r3}");                                        \

+  asm volatile ("movs    r3, #0x10");                                   \

+  asm volatile ("msr     BASEPRI, r3");                                 \

+  asm volatile ("pop     {r3}");                                        \

 }

 #define chSysUnlock() {                                                 \

-  asm volatile ("push    {r12}");                                       \

-  asm volatile ("mov     r12, #0");                                     \

-  asm volatile ("msr     BASEPRI, r12");                                \

-  asm volatile ("pop     {r12}");                                       \

+  asm volatile ("push    {r3}");                                        \

+  asm volatile ("movs    r3, #0");                                      \

+  asm volatile ("msr     BASEPRI, r3");                                 \

+  asm volatile ("pop     {r3}");                                        \

 }

 

 #define INT_REQUIRED_STACK 0

diff --git a/ports/ARMCM3/crt0.s b/ports/ARMCM3/crt0.s
index bd0b8b1a5..2f2ef7eea 100644
--- a/ports/ARMCM3/crt0.s
+++ b/ports/ARMCM3/crt0.s
@@ -63,7 +63,7 @@ dloop:
          * BSS initialization.

          * NOTE: It assumes that the BSS size is a multiple of 4.

          */

-        mov     r0, #0

+        movs    r0, #0

         ldr     r1, =_bss_start

         ldr     r2, =_bss_end

 bloop:

@@ -74,9 +74,10 @@ bloop:
         /*

          * Switches to the Process Stack and disables the interrupts globally.

          */

-        mov     r0, #CONTROL_MODE_PRIVILEGED | CONTROL_USE_PSP

+        movs    r0, #CONTROL_MODE_PRIVILEGED | CONTROL_USE_PSP

         msr     CONTROL, r0

-	mov	r0, #0x10

+        isb

+	movs    r0, #0x10

 	msr	BASEPRI, r0

         cpsie   i

         /*

@@ -86,7 +87,7 @@ bloop:
         /*

          * main(0, NULL).

          */

-        mov     r0, #0

+        movs    r0, #0

         mov     r1, r0

         bl      main

         bl      chSysHalt

diff --git a/readme.txt b/readme.txt
index edda472f9..eb1406a83 100644
--- a/readme.txt
+++ b/readme.txt
@@ -65,6 +65,10 @@ Win32-MinGW            - ChibiOS/RT simulator and demo into a WIN32 process,
 

 *** 0.6.3 ***

 - Fixed a minor error in ./ports/ARM7/vic.h, it should not affect anything.

+- Minor bug fix: now chThdCreate() allows a working area size equal to

+  UserStackSize(0) when in debug mode, it caused an assert panic.

+- Increased the stack size for the threads in the test suite to 128 bytes

+  because THUMB/THUMB2 modes seem to use a lot more stack than ARM mode.

 

 *** 0.6.2 ***

 - NEW: Added C++ wrapper around the ChibiOS/RT core APIs, now it is possible

diff --git a/src/chthreads.c b/src/chthreads.c
index 22c815683..fa32d5e36 100644
--- a/src/chthreads.c
+++ b/src/chthreads.c
@@ -93,7 +93,7 @@ Thread *chThdCreate(tprio_t prio, tmode_t mode, void *workspace,
                     size_t wsize, tfunc_t pf, void *arg) {

   Thread *tp = workspace;

 

-  chDbgAssert((wsize > UserStackSize(0)) && (prio <= HIGHPRIO) &&

+  chDbgAssert((wsize >= UserStackSize(0)) && (prio <= HIGHPRIO) &&

               (workspace != NULL) && (pf != NULL),

               "chthreads.c, chThdCreate()");

 #ifdef CH_USE_DEBUG

diff --git a/test/test.c b/test/test.c
index 4cca26b31..22337132e 100644
--- a/test/test.c
+++ b/test/test.c
@@ -30,11 +30,11 @@ WorkingArea(wsT3, 512);
 WorkingArea(wsT4, 512);

 WorkingArea(wsT5, 512);

 #else

-WorkingArea(wsT1, 64);

-WorkingArea(wsT2, 64);

-WorkingArea(wsT3, 64);

-WorkingArea(wsT4, 64);

-WorkingArea(wsT5, 64);

+WorkingArea(wsT1, 128);

+WorkingArea(wsT2, 128);

+WorkingArea(wsT3, 128);

+WorkingArea(wsT4, 128);

+WorkingArea(wsT5, 128);

 #endif

 static Thread *t1, *t2, *t3, *t4, *t5;