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author | gdisirio <gdisirio@110e8d01-0319-4d1e-a829-52ad28d1bb01> | 2018-10-27 11:37:59 +0000 |
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committer | gdisirio <gdisirio@110e8d01-0319-4d1e-a829-52ad28d1bb01> | 2018-10-27 11:37:59 +0000 |
commit | dde82c6051089a009dd6ca5e440dcfafd33991f0 (patch) | |
tree | b453b665e3dc6684f630eb9629e65659139e699d | |
parent | 79ca268b490e6285d823ca1dd3d82987d30bdd1d (diff) | |
download | ChibiOS-dde82c6051089a009dd6ca5e440dcfafd33991f0.tar.gz ChibiOS-dde82c6051089a009dd6ca5e440dcfafd33991f0.tar.bz2 ChibiOS-dde82c6051089a009dd6ca5e440dcfafd33991f0.zip |
Improved type robustness of STM32 GPIO PAL drivers.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12393 110e8d01-0319-4d1e-a829-52ad28d1bb01
-rw-r--r-- | os/hal/ports/STM32/LLD/GPIOv1/hal_pal_lld.h | 18 | ||||
-rw-r--r-- | os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.h | 14 | ||||
-rw-r--r-- | os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.h | 14 |
3 files changed, 26 insertions, 20 deletions
diff --git a/os/hal/ports/STM32/LLD/GPIOv1/hal_pal_lld.h b/os/hal/ports/STM32/LLD/GPIOv1/hal_pal_lld.h index 387b049df..9ec04153c 100644 --- a/os/hal/ports/STM32/LLD/GPIOv1/hal_pal_lld.h +++ b/os/hal/ports/STM32/LLD/GPIOv1/hal_pal_lld.h @@ -252,7 +252,7 @@ typedef uint32_t iopadid_t; *
* @notapi
*/
-#define pal_lld_readport(port) ((port)->IDR)
+#define pal_lld_readport(port) ((ioportmask_t)((port)->IDR))
/**
* @brief Reads the output latch.
@@ -266,7 +266,7 @@ typedef uint32_t iopadid_t; *
* @notapi
*/
-#define pal_lld_readlatch(port) ((port)->ODR)
+#define pal_lld_readlatch(port) ((ioportmask_t)((port)->ODR))
/**
* @brief Writes on a I/O port.
@@ -281,7 +281,7 @@ typedef uint32_t iopadid_t; *
* @notapi
*/
-#define pal_lld_writeport(port, bits) ((port)->ODR = (bits))
+#define pal_lld_writeport(port, bits) ((port)->ODR = (uint32_t)(bits))
/**
* @brief Sets a bits mask on a I/O port.
@@ -296,7 +296,7 @@ typedef uint32_t iopadid_t; *
* @notapi
*/
-#define pal_lld_setport(port, bits) ((port)->BSRR = (bits))
+#define pal_lld_setport(port, bits) ((port)->BSRR = (uint32_t)(bits))
/**
* @brief Clears a bits mask on a I/O port.
@@ -311,7 +311,7 @@ typedef uint32_t iopadid_t; *
* @notapi
*/
-#define pal_lld_clearport(port, bits) ((port)->BRR = (bits))
+#define pal_lld_clearport(port, bits) ((port)->BRR = (uint32_t)(bits))
/**
* @brief Writes a group of bits.
@@ -329,9 +329,11 @@ typedef uint32_t iopadid_t; *
* @notapi
*/
-#define pal_lld_writegroup(port, mask, offset, bits) \
- ((port)->BSRR = ((~(bits) & (mask)) << (16 + (offset))) | \
- (((bits) & (mask)) << (offset)))
+#define pal_lld_writegroup(port, mask, offset, bits) { \
+ uint32_t w = ((~(uint32_t)(bits) & (uint32_t)(mask)) << (16U + (offset))) | \
+ ((uint32_t)(bits) & (uint32_t)(mask)) << (offset); \
+ (port)->BSRR = w; \
+}
/**
* @brief Pads group mode setup.
diff --git a/os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.h b/os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.h index 5aaa0bf28..1d9033753 100644 --- a/os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.h +++ b/os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.h @@ -328,7 +328,7 @@ typedef uint32_t iopadid_t; *
* @notapi
*/
-#define pal_lld_readport(port) ((port)->IDR)
+#define pal_lld_readport(port) ((ioportmask_t)((port)->IDR))
/**
* @brief Reads the output latch.
@@ -342,7 +342,7 @@ typedef uint32_t iopadid_t; *
* @notapi
*/
-#define pal_lld_readlatch(port) ((port)->ODR)
+#define pal_lld_readlatch(port) ((ioportmask_t)((port)->ODR))
/**
* @brief Writes on a I/O port.
@@ -354,7 +354,7 @@ typedef uint32_t iopadid_t; *
* @notapi
*/
-#define pal_lld_writeport(port, bits) ((port)->ODR = (bits))
+#define pal_lld_writeport(port, bits) ((port)->ODR = (uint32_t)(bits))
/**
* @brief Sets a bits mask on a I/O port.
@@ -393,9 +393,11 @@ typedef uint32_t iopadid_t; *
* @notapi
*/
-#define pal_lld_writegroup(port, mask, offset, bits) \
- ((port)->BSRR.W = ((~(bits) & (mask)) << (16U + (offset))) | \
- (((bits) & (mask)) << (offset)))
+#define pal_lld_writegroup(port, mask, offset, bits) { \
+ uint32_t w = ((~(uint32_t)(bits) & (uint32_t)(mask)) << (16U + (offset))) | \
+ ((uint32_t)(bits) & (uint32_t)(mask)) << (offset); \
+ (port)->BSRR.W = w; \
+}
/**
* @brief Pads group mode setup.
diff --git a/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.h b/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.h index 0980c836f..638c9a81d 100644 --- a/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.h +++ b/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.h @@ -368,7 +368,7 @@ typedef uint32_t iopadid_t; *
* @notapi
*/
-#define pal_lld_readport(port) ((port)->IDR)
+#define pal_lld_readport(port) ((ioportmask_t)((port)->IDR))
/**
* @brief Reads the output latch.
@@ -382,7 +382,7 @@ typedef uint32_t iopadid_t; *
* @notapi
*/
-#define pal_lld_readlatch(port) ((port)->ODR)
+#define pal_lld_readlatch(port) ((ioportmask_t)((port)->ODR))
/**
* @brief Writes on a I/O port.
@@ -394,7 +394,7 @@ typedef uint32_t iopadid_t; *
* @notapi
*/
-#define pal_lld_writeport(port, bits) ((port)->ODR = (bits))
+#define pal_lld_writeport(port, bits) ((port)->ODR = (uint32_t)(bits))
/**
* @brief Sets a bits mask on a I/O port.
@@ -433,9 +433,11 @@ typedef uint32_t iopadid_t; *
* @notapi
*/
-#define pal_lld_writegroup(port, mask, offset, bits) \
- ((port)->BSRR.W = ((~(bits) & (mask)) << (16U + (offset))) | \
- (((bits) & (mask)) << (offset)))
+#define pal_lld_writegroup(port, mask, offset, bits) { \
+ uint32_t w = ((~(uint32_t)(bits) & (uint32_t)(mask)) << (16U + (offset))) | \
+ ((uint32_t)(bits) & (uint32_t)(mask)) << (offset); \
+ (port)->BSRR.W = w; \
+}
/**
* @brief Pads group mode setup.
|