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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-12-12 15:24:17 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-12-12 15:24:17 +0000 |
| commit | d7b170b525754e5fc502c32d796dfa594775fd0e (patch) | |
| tree | 7b6b6050ab0e290134cc45944908395ec36e49de | |
| parent | b96bb4ea7382eb5aeb8a05a7494a580efebd3952 (diff) | |
| download | ChibiOS-d7b170b525754e5fc502c32d796dfa594775fd0e.tar.gz ChibiOS-d7b170b525754e5fc502c32d796dfa594775fd0e.tar.bz2 ChibiOS-d7b170b525754e5fc502c32d796dfa594775fd0e.zip | |
Fixed bug #681.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8586 35acf78f-673a-0410-8e92-d51de3d6d3f4
| -rw-r--r-- | os/hal/ports/STM32/LLD/TIMv1/icu_lld.c | 4 | ||||
| -rw-r--r-- | readme.txt | 2 |
2 files changed, 4 insertions, 2 deletions
diff --git a/os/hal/ports/STM32/LLD/TIMv1/icu_lld.c b/os/hal/ports/STM32/LLD/TIMv1/icu_lld.c index 5959cbda1..4a89f0e03 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/icu_lld.c +++ b/os/hal/ports/STM32/LLD/TIMv1/icu_lld.c @@ -108,7 +108,7 @@ static bool icu_lld_wait_edge(ICUDriver *icup) { /* Polled mode so re-enabling the interrupts while the operation is
performed.*/
- chSysUnlock();
+ osalSysUnlock();
/* Polling the right bit depending on the input channel.*/
if (icup->config->channel == ICU_CHANNEL_1) {
@@ -128,7 +128,7 @@ static bool icu_lld_wait_edge(ICUDriver *icup) { result = (sr & STM32_TIM_SR_UIF) != 0 ? true : false;
/* Done, disabling interrupts again.*/
- chSysLock();
+ osalSysLock();
/* Resetting all flags.*/
icup->tim->SR &= ~(STM32_TIM_SR_CC1IF |
diff --git a/readme.txt b/readme.txt index d3e7fca13..3995ed119 100644 --- a/readme.txt +++ b/readme.txt @@ -137,6 +137,8 @@ - HAL: Updated STM32F0xx headers to STM32CubeF0 version 1.3.0. Added support
for STM32F030xC, STM32F070x6, STM32F070xB, STM32F091xC,
STM32F098xx devices.
+- HAL: Fixed STM32 ICU driver uses chSysLock and chSysUnlock (bug #681)
+ (backported to 3.0.4).
- HAL: Fixed wrong DMA priority assigned to STM32F3 ADC3&4 (bug #680)
(backported to 3.0.4 and 2.6.10).
- HAL: Fixed invalid DMA settings in STM32 DACv1 driver in dual mode
|