aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2015-08-13 09:59:30 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2015-08-13 09:59:30 +0000
commitd676c455717785bee74986038c8b2d0110db1852 (patch)
tree81068ba5b4471cc0ab244aade34fcd297b7e30ff
parentd8b4ba3e592d490fb1572a07b6c48d7ba6c02687 (diff)
downloadChibiOS-d676c455717785bee74986038c8b2d0110db1852.tar.gz
ChibiOS-d676c455717785bee74986038c8b2d0110db1852.tar.bz2
ChibiOS-d676c455717785bee74986038c8b2d0110db1852.zip
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8210 35acf78f-673a-0410-8e92-d51de3d6d3f4
-rw-r--r--os/hal/ports/STM32/LLD/DMAv2/stm32_dma.c19
-rw-r--r--os/hal/ports/STM32/STM32F7xx/hal_lld.c19
2 files changed, 19 insertions, 19 deletions
diff --git a/os/hal/ports/STM32/LLD/DMAv2/stm32_dma.c b/os/hal/ports/STM32/LLD/DMAv2/stm32_dma.c
index 072519e6f..9e8d31bc8 100644
--- a/os/hal/ports/STM32/LLD/DMAv2/stm32_dma.c
+++ b/os/hal/ports/STM32/LLD/DMAv2/stm32_dma.c
@@ -428,25 +428,6 @@ void dmaInit(void) {
DMA1->HIFCR = 0xFFFFFFFFU;
DMA2->LIFCR = 0xFFFFFFFFU;
DMA2->HIFCR = 0xFFFFFFFFU;
-
-#if defined(STM32F7XX)
- /* If the DMA is in use then the DMA-accessible RAM must be programmed as
- Write Through using the MPU, region zero is used with a size of 512kB,
- the sub-regions are programmed as follow:
- - 0..4, enabled, it is the normal, DMA-accessible, RAM.
- - 5..7, disabled, beyond RAM area.
- The system memory layout is used as "background" for the MPU regions.*/
- mpuConfigureRegion(MPU_REGION_0,
- 0x20000000U,
- MPU_RASR_ATTR_AP_RW_RW |
- MPU_RASR_ATTR_CACHEABLE_WT_NWA |
- MPU_RNR_REGION(5) |
- MPU_RNR_REGION(6) |
- MPU_RNR_REGION(7) |
- MPU_RASR_SIZE_512K |
- MPU_RASR_ENABLE);
- mpuEnable(MPU_CTRL_PRIVDEFENA);
-#endif
}
/**
diff --git a/os/hal/ports/STM32/STM32F7xx/hal_lld.c b/os/hal/ports/STM32/STM32F7xx/hal_lld.c
index 5357f1629..4144cab73 100644
--- a/os/hal/ports/STM32/STM32F7xx/hal_lld.c
+++ b/os/hal/ports/STM32/STM32F7xx/hal_lld.c
@@ -128,6 +128,25 @@ void hal_lld_init(void) {
#if defined(STM32_DMA_REQUIRED)
dmaInit();
+
+#if defined(STM32F7XX)
+ /* If the DMA is in use then the DMA-accessible RAM must be programmed as
+ Write Through using the MPU, region zero is used with a size of 512kB,
+ the sub-regions are programmed as follow:
+ - 0..4, enabled, it is the normal, DMA-accessible, RAM.
+ - 5..7, disabled, beyond RAM area.
+ The system memory layout is used as "background" for the MPU regions.*/
+ mpuConfigureRegion(MPU_REGION_0,
+ 0x20000000U,
+ MPU_RASR_ATTR_AP_RW_RW |
+ MPU_RASR_ATTR_CACHEABLE_WT_NWA |
+ MPU_RNR_REGION(5) |
+ MPU_RNR_REGION(6) |
+ MPU_RNR_REGION(7) |
+ MPU_RASR_SIZE_512K |
+ MPU_RASR_ENABLE);
+ mpuEnable(MPU_CTRL_PRIVDEFENA);
+#endif
#endif
/* Programmable voltage detector enable.*/