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authorGiovanni Di Sirio <gdisirio@gmail.com>2019-01-11 10:27:27 +0000
committerGiovanni Di Sirio <gdisirio@gmail.com>2019-01-11 10:27:27 +0000
commitd3ba6ca1bfded2a853292df5df37aa13ddeb9e00 (patch)
tree56acb5cd3a58effd65a2f3b2ad7537af9b236bcc
parentc62c5f50629f340eb3af59b0da2efea0ff7e8af5 (diff)
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Fixed bug #1000.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12538 110e8d01-0319-4d1e-a829-52ad28d1bb01
-rw-r--r--os/hal/ports/STM32/STM32H7xx/hal_lld.h16
-rw-r--r--readme.txt2
2 files changed, 10 insertions, 8 deletions
diff --git a/os/hal/ports/STM32/STM32H7xx/hal_lld.h b/os/hal/ports/STM32/STM32H7xx/hal_lld.h
index fd3f46c5a..926630588 100644
--- a/os/hal/ports/STM32/STM32H7xx/hal_lld.h
+++ b/os/hal/ports/STM32/STM32H7xx/hal_lld.h
@@ -800,7 +800,7 @@
* @note The allowed values are 2..128, odd values not allowed.
*/
#if !defined(STM32_PLL2_DIVP_VALUE) || defined(__DOXYGEN__)
-#define STM32_PLL2_DIVP_VALUE 8
+#define STM32_PLL2_DIVP_VALUE 40
#endif
/**
@@ -860,7 +860,7 @@
* @note The allowed values are 4..512.
*/
#if !defined(STM32_PLL3_DIVN_VALUE) || defined(__DOXYGEN__)
-#define STM32_PLL3_DIVN_VALUE 240
+#define STM32_PLL3_DIVN_VALUE 400
#endif
/**
@@ -876,7 +876,7 @@
* @note The allowed values are 2..128, odd values not allowed.
*/
#if !defined(STM32_PLL3_DIVP_VALUE) || defined(__DOXYGEN__)
-#define STM32_PLL3_DIVP_VALUE 10
+#define STM32_PLL3_DIVP_VALUE 8
#endif
/**
@@ -884,7 +884,7 @@
* @note The allowed values are 1..128.
*/
#if !defined(STM32_PLL3_DIVQ_VALUE) || defined(__DOXYGEN__)
-#define STM32_PLL3_DIVQ_VALUE 10
+#define STM32_PLL3_DIVQ_VALUE 8
#endif
/**
@@ -892,7 +892,7 @@
* @note The allowed values are 1..128.
*/
#if !defined(STM32_PLL3_DIVR_VALUE) || defined(__DOXYGEN__)
-#define STM32_PLL3_DIVR_VALUE 10
+#define STM32_PLL3_DIVR_VALUE 8
#endif
/**
@@ -2399,7 +2399,7 @@
*/
#define STM32_USART6CLK STM32_PCLK2
-#elif STM32_USART1SEL == STM32_USART16SEL_PLL2_Q_CK
+#elif STM32_USART16SEL == STM32_USART16SEL_PLL2_Q_CK
#define STM32_USART1CLK STM32_PLL2_Q_CK
#define STM32_USART6CLK STM32_PLL2_Q_CK
#elif STM32_USART16SEL == STM32_USART16SEL_PLL3_Q_CK
@@ -2579,8 +2579,8 @@
*/
#define STM32_SPI6CLK STM32_PCLK4
-#elif STM32_SPI6SEL == STM32_SPI6SEL_PLL2_P_CK
-#define STM32_SPI6CLK STM32_PLL2_P_CK
+#elif STM32_SPI6SEL == STM32_SPI6SEL_PLL2_Q_CK
+#define STM32_SPI6CLK STM32_PLL2_Q_CK
#elif STM32_SPI6SEL == STM32_SPI6SEL_PLL3_Q_CK
#define STM32_SPI6CLK STM32_PLL3_Q_CK
#elif STM32_SPI6SEL == STM32_SPI6SEL_HSI_KER_CK
diff --git a/readme.txt b/readme.txt
index 8d61897c9..f12f4d415 100644
--- a/readme.txt
+++ b/readme.txt
@@ -196,6 +196,8 @@
- EX: Updated LIS302DL to 1.1.0 (backported to 18.2.1).
- EX: Updated LPS25H to 1.1.0 (backported to 18.2.1).
- EX: Updated LSM303DLHC to 1.1.0 (backported to 18.2.1).
+- HAL: Fixed invalid checks in STM32H7 HAL (bug #1000)
+ (backported to 18.2.2).
- OTH: Fixed problem in STM32H743 GCC linker file (bug #998)
(backported to 18.2.2).
- HAL: Fixed extra parenthesis in STM32F4 registry (bug #997)