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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-06-02 14:49:16 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-06-02 14:49:16 +0000 |
| commit | d08ed6e93cabe4cad4a99de38f75672e16ad1b8f (patch) | |
| tree | 5ede0009d494978cca367b9f3e52d302275a4c9a | |
| parent | 24734a32ef4265716b07675eac24717f7525fca8 (diff) | |
| download | ChibiOS-d08ed6e93cabe4cad4a99de38f75672e16ad1b8f.tar.gz ChibiOS-d08ed6e93cabe4cad4a99de38f75672e16ad1b8f.tar.bz2 ChibiOS-d08ed6e93cabe4cad4a99de38f75672e16ad1b8f.zip | |
Alternate preemption mode added to IAR port too.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3016 35acf78f-673a-0410-8e92-d51de3d6d3f4
| -rw-r--r-- | demos/ARMCM0-LPC1114-LPCXPRESSO/iar/ch.ewp | 2 | ||||
| -rw-r--r-- | os/ports/IAR/ARMCMx/chcore_v6m.h | 18 | ||||
| -rw-r--r-- | os/ports/IAR/ARMCMx/chcoreasm_v6m.s | 39 | ||||
| -rw-r--r-- | os/ports/RVCT/ARMCMx/chcoreasm_v6m.s | 4 |
4 files changed, 52 insertions, 11 deletions
diff --git a/demos/ARMCM0-LPC1114-LPCXPRESSO/iar/ch.ewp b/demos/ARMCM0-LPC1114-LPCXPRESSO/iar/ch.ewp index 49d605d0c..20644e255 100644 --- a/demos/ARMCM0-LPC1114-LPCXPRESSO/iar/ch.ewp +++ b/demos/ARMCM0-LPC1114-LPCXPRESSO/iar/ch.ewp @@ -523,6 +523,7 @@ </option>
<option>
<name>AUserIncludes</name>
+ <state>$PROJ_DIR$\..\</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\LPC11xx</state>
<state>$PROJ_DIR$\..\..\..\boards\EA_LPCXPRESSO_BB_1114</state>
</option>
@@ -1387,6 +1388,7 @@ </option>
<option>
<name>AUserIncludes</name>
+ <state>$PROJ_DIR$\..\</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\LPC11xx</state>
<state>$PROJ_DIR$\..\..\..\boards\EA_LPCXPRESSO_BB_1114</state>
</option>
diff --git a/os/ports/IAR/ARMCMx/chcore_v6m.h b/os/ports/IAR/ARMCMx/chcore_v6m.h index 8ab9ff583..3eed8bf43 100644 --- a/os/ports/IAR/ARMCMx/chcore_v6m.h +++ b/os/ports/IAR/ARMCMx/chcore_v6m.h @@ -45,6 +45,15 @@ /* Port configurable parameters. */
/*===========================================================================*/
+/**
+ * @brief Alternate preemption method.
+ * @details Activating this option will make the Kernel use the PendSV
+ * handler for preemption instead of the NMI handler.
+ */
+#ifndef CORTEX_ALTERNATE_SWITCH
+#define CORTEX_ALTERNATE_SWITCH FALSE
+#endif
+
/*===========================================================================*/
/* Port derived parameters. */
/*===========================================================================*/
@@ -72,6 +81,15 @@ #define CH_CORE_VARIANT_NAME "Cortex-M1"
#endif
+/**
+ * @brief Port-specific information string.
+ */
+#if !CORTEX_ALTERNATE_SWITCH || defined(__DOXYGEN__)
+#define CH_PORT_INFO "Preemption through NMI"
+#else
+#define CH_PORT_INFO "Preemption through PendSV"
+#endif
+
/*===========================================================================*/
/* Port implementation part. */
/*===========================================================================*/
diff --git a/os/ports/IAR/ARMCMx/chcoreasm_v6m.s b/os/ports/IAR/ARMCMx/chcoreasm_v6m.s index ab40c509a..ef72de53c 100644 --- a/os/ports/IAR/ARMCMx/chcoreasm_v6m.s +++ b/os/ports/IAR/ARMCMx/chcoreasm_v6m.s @@ -24,12 +24,11 @@ PRESERVE8
/*
- * Imports the Cortex-Mx parameters header and performs the same calculations
- * done in chcore.h.
+ * Imports the Cortex-Mx configuration headers.
*/
-#include "cmparams.h"
-
-#define CORTEX_PRIORITY_MASK(n) ((n) << (8 - CORTEX_PRIORITY_BITS))
+#define _FROM_ASM_
+#include "chconf.h"
+#include "chcore.h"
EXTCTX_SIZE SET 32
CONTEXT_OFFSET SET 12
@@ -81,13 +80,29 @@ _port_thread_start: * The NMI vector is used for exception mode re-entering after a context
* switch.
*/
- PUBLIC NMIVector
+#if !CORTEX_ALTERNATE_SWITCH
+ PUBLIC NMIVector
NMIVector:
mrs r3, PSP
adds r3, r3, #32
msr PSP, r3
cpsie i
bx lr
+#endif
+
+/*
+ * PendSV vector.
+ * The PendSV vector is used for exception mode re-entering after a context
+ * switch.
+ */
+#if CORTEX_ALTERNATE_SWITCH
+ PUBLIC PendSVVector
+PendSVVector:
+ mrs r3, PSP
+ adds r3, r3, #32
+ msr PSP, r3
+ bx lr
+#endif
/*
* Post-IRQ switch code.
@@ -96,12 +111,18 @@ NMIVector: PUBLIC _port_switch_from_isr
_port_switch_from_isr:
bl chSchDoRescheduleI
+ ldr r2, =SCB_ICSR
movs r3, #128
+#if CORTEX_ALTERNATE_SWITCH
+ lsls r3, r3, #21
+ str r3, [r2, #0]
+ cpsie i
+#else
lsls r3, r3, #24
- ldr r2, =SCB_ICSR
str r3, [r2, #0]
-_waitnmi:
- b _waitnmi
+#endif
+waithere:
+ b waithere
/*
* Reschedule verification and setup after an IRQ.
diff --git a/os/ports/RVCT/ARMCMx/chcoreasm_v6m.s b/os/ports/RVCT/ARMCMx/chcoreasm_v6m.s index a20327c5d..6cfc89410 100644 --- a/os/ports/RVCT/ARMCMx/chcoreasm_v6m.s +++ b/os/ports/RVCT/ARMCMx/chcoreasm_v6m.s @@ -89,8 +89,8 @@ NMIVector PROC #endif
/*
- * NMI vector.
- * The NMI vector is used for exception mode re-entering after a context
+ * PendSV vector.
+ * The PendSV vector is used for exception mode re-entering after a context
* switch.
*/
#if CORTEX_ALTERNATE_SWITCH
|