aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorGiovanni Di Sirio <gdisirio@gmail.com>2017-09-22 12:39:42 +0000
committerGiovanni Di Sirio <gdisirio@gmail.com>2017-09-22 12:39:42 +0000
commitc0a616c52b6c00aeee8917329bf8659d3062a7bc (patch)
tree7d3f3dc45a3182ea25298cebfca23d73bb62c175
parent44754da7e4e395fc41afd87133b34f99ca9ff662 (diff)
downloadChibiOS-c0a616c52b6c00aeee8917329bf8659d3062a7bc.tar.gz
ChibiOS-c0a616c52b6c00aeee8917329bf8659d3062a7bc.tar.bz2
ChibiOS-c0a616c52b6c00aeee8917329bf8659d3062a7bc.zip
More GHS changes, SPC56ECxx demo compiles now.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10678 35acf78f-673a-0410-8e92-d51de3d6d3f4
-rw-r--r--demos/SPC5/RT-SPC56EC-EVB/Makefile_ghs2
-rw-r--r--os/common/ports/e200/compilers/GHS/chcoreasm.s2
-rw-r--r--os/common/startup/e200/compilers/GHS/ld/SPC56EC74.ld130
-rw-r--r--os/common/startup/e200/compilers/GHS/ld/SPC57EM80_HSM.ld28
4 files changed, 131 insertions, 31 deletions
diff --git a/demos/SPC5/RT-SPC56EC-EVB/Makefile_ghs b/demos/SPC5/RT-SPC56EC-EVB/Makefile_ghs
index 87c7b7058..eb5b7e3da 100644
--- a/demos/SPC5/RT-SPC56EC-EVB/Makefile_ghs
+++ b/demos/SPC5/RT-SPC56EC-EVB/Makefile_ghs
@@ -5,7 +5,7 @@
# Compiler options here.
ifeq ($(USE_OPT),)
- USE_OPT = -c99 -Ospeed -Onounroll
+ USE_OPT = -gnu99 -Ospeed -Onounroll
endif
# C specific options here (added to USE_OPT).
diff --git a/os/common/ports/e200/compilers/GHS/chcoreasm.s b/os/common/ports/e200/compilers/GHS/chcoreasm.s
index 36324be2f..9f124d13e 100644
--- a/os/common/ports/e200/compilers/GHS/chcoreasm.s
+++ b/os/common/ports/e200/compilers/GHS/chcoreasm.s
@@ -61,7 +61,7 @@
.vle
- .section .text_vle, "axv"
+ .section .vletext, "axv"
.align 2
.globl _port_switch
diff --git a/os/common/startup/e200/compilers/GHS/ld/SPC56EC74.ld b/os/common/startup/e200/compilers/GHS/ld/SPC56EC74.ld
index e1fe154ed..90b831629 100644
--- a/os/common/startup/e200/compilers/GHS/ld/SPC56EC74.ld
+++ b/os/common/startup/e200/compilers/GHS/ld/SPC56EC74.ld
@@ -24,4 +24,132 @@ MEMORY
ram : org = 0x40000000, len = 256k
}
-INCLUDE rules_z4.ld
+OPTION ("-e=_reset_address")
+
+SECTIONS
+{
+ .boot0 ALIGN(16) :
+ {
+ __ivpr_base__ = .;
+ *(.boot)
+ } > flash
+
+ .boot1 ALIGN(16) :
+ {
+ *(.handlers)
+ *(.crt0)
+ /* The vectors table requires a 2kB alignment.*/
+ . = ALIGN(0x800);
+ *(.vectors)
+ } > flash
+
+ constructors ALIGN(4) :
+ {
+ PROVIDE(__init_array_start = .);
+ "*(.init_array.*)"
+ *(.init_array)
+ PROVIDE(__init_array_end = .);
+ } > flash
+
+ destructors ALIGN(4) :
+ {
+ PROVIDE(__fini_array_start = .);
+ *(.fini_array)
+ "*(.fini_array.*)"
+ PROVIDE(__fini_array_end = .);
+ } > flash
+
+ .vletext ALIGN(16) :
+ {
+ *(.vletext)
+ "*(.vletext.*)"
+ } > flash
+
+ .text ALIGN(16) :
+ {
+ *(.text)
+ "*(.text.*)"
+ } > flash
+
+ .rodata ALIGN(16) :
+ {
+ *(.rodata)
+ "*(.rodata.*)"
+ *(.rodata1)
+ } > flash
+
+ .sdata2 ALIGN(16) :
+ {
+ __sdata2_start__ = . + 0x8000;
+ *(.sdata2)
+ "*(.sdata2.*)"
+ *(.sbss2)
+ "*(.sbss2.*)"
+ } > flash
+
+ .stacks ALIGN(16) :
+ {
+ . = ALIGN(8);
+ __irq_stack_base__ = .;
+ . += __irq_stack_size__;
+ . = ALIGN(8);
+ __irq_stack_end__ = .;
+ __process_stack_base__ = .;
+ __main_thread_stack_base__ = .;
+ . += __process_stack_size__;
+ . = ALIGN(8);
+ __process_stack_end__ = .;
+ __main_thread_stack_end__ = .;
+ } > ram
+
+ .romdatastart ALIGN(16) :
+ {
+ __romdata_start__ = .;
+ } > flash
+
+ .data ALIGN(4) : AT(__romdata_start__)
+ {
+ . = ALIGN(4);
+ __data_start__ = .;
+ *(.data)
+ "*(.data.*)"
+ __sdata_start__ = . + 0x8000;
+ *(.sdata)
+ "*(.sdata.*)"
+ . = ALIGN(4);
+ *(.ramtext)
+ . = ALIGN(4);
+ __data_end__ = .;
+ } > ram
+
+ .sbss ALIGN(4) :
+ {
+ __bss_start__ = .;
+ *(.sbss)
+ "*(.sbss.*)"
+ *(.scommon)
+ } > ram
+
+ .bss ALIGN(4) :
+ {
+ *(.bss)
+ "*(.bss.*)"
+ *(COMMON)
+ __bss_end__ = .;
+ } > ram
+
+ __flash_size__ = SIZEOF(flash);
+ __flash_start__ = ADDR(flash);
+ __flash_end__ = ENDADDR(flash);
+
+ __dataflash_size__ = SIZEOF(dataflash);
+ __dataflash_start__ = ADDR(dataflash);
+ __dataflash_end__ = ENDADDR(dataflash);
+
+ __ram_size__ = SIZEOF(ram);
+ __ram_start__ = ADDR(ram);
+ __ram_end__ = ENDADDR(ram);
+
+ __heap_base__ = __bss_end__;
+ __heap_end__ = __ram_end__;
+}
diff --git a/os/common/startup/e200/compilers/GHS/ld/SPC57EM80_HSM.ld b/os/common/startup/e200/compilers/GHS/ld/SPC57EM80_HSM.ld
deleted file mode 100644
index 8bd3dbbd9..000000000
--- a/os/common/startup/e200/compilers/GHS/ld/SPC57EM80_HSM.ld
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/*
- * SPC57EM80-HSM memory setup.
- */
-MEMORY
-{
- flash : org = 0x0060C000, len = 144k
- dflash0 : org = 0x00680000, len = 16k
- dflash1 : org = 0x00684000, len = 16k
- ram : org = 0xA0000000, len = 40k
-}
-
-INCLUDE rules_z0.ld