diff options
| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-12-04 13:03:14 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-12-04 13:03:14 +0000 |
| commit | bd809f5f652f8f6bbcf7bcc1c68b979245b1b511 (patch) | |
| tree | 34492d55bf4cb1cd9ac799fb8704f185f31a1eb2 | |
| parent | 1c60f17682e5ccfa2c330da98b17985422c35842 (diff) | |
| download | ChibiOS-bd809f5f652f8f6bbcf7bcc1c68b979245b1b511.tar.gz ChibiOS-bd809f5f652f8f6bbcf7bcc1c68b979245b1b511.tar.bz2 ChibiOS-bd809f5f652f8f6bbcf7bcc1c68b979245b1b511.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4869 35acf78f-673a-0410-8e92-d51de3d6d3f4
| -rw-r--r-- | boards/ST_STM32F3_DISCOVERY/board.h | 4 | ||||
| -rw-r--r-- | boards/ST_STM32F3_DISCOVERY/cfg/board.chcfg | 2 | ||||
| -rw-r--r-- | demos/ARMCM4-STM32F303-DISCOVERY/main.c | 29 | ||||
| -rw-r--r-- | os/hal/platforms/STM32/GPIOv2/pal_lld.c | 2 |
4 files changed, 29 insertions, 8 deletions
diff --git a/boards/ST_STM32F3_DISCOVERY/board.h b/boards/ST_STM32F3_DISCOVERY/board.h index c285f0040..41f20b951 100644 --- a/boards/ST_STM32F3_DISCOVERY/board.h +++ b/boards/ST_STM32F3_DISCOVERY/board.h @@ -653,7 +653,7 @@ * PE0 - L3GD20_INT1 (input pullup).
* PE1 - L3GD20_INT2 (input pullup).
* PE2 - LSM303_DRDY (input pullup).
- * PE3 - SPI1_CS (output pushpull minimum).
+ * PE3 - SPI1_CS (output pushpull maximum).
* PE4 - LSM303_INT1 (input pullup).
* PE5 - LSM303_INT2 (input pullup).
* PE6 - PIN6 (input pullup).
@@ -702,7 +702,7 @@ #define VAL_GPIOE_OSPEEDR (PIN_OSPEED_2M(GPIOE_L3GD20_INT1) | \
PIN_OSPEED_2M(GPIOE_L3GD20_INT2) | \
PIN_OSPEED_2M(GPIOE_LSM303_DRDY) | \
- PIN_OSPEED_2M(GPIOE_SPI1_CS) | \
+ PIN_OSPEED_100M(GPIOE_SPI1_CS) | \
PIN_OSPEED_2M(GPIOE_LSM303_INT1) | \
PIN_OSPEED_2M(GPIOE_LSM303_INT2) | \
PIN_OSPEED_2M(GPIOE_PIN6) | \
diff --git a/boards/ST_STM32F3_DISCOVERY/cfg/board.chcfg b/boards/ST_STM32F3_DISCOVERY/cfg/board.chcfg index e08be32ac..0cca69422 100644 --- a/boards/ST_STM32F3_DISCOVERY/cfg/board.chcfg +++ b/boards/ST_STM32F3_DISCOVERY/cfg/board.chcfg @@ -561,7 +561,7 @@ <pin3
ID="SPI1_CS"
Type="PushPull"
- Speed="Minimum"
+ Speed="Maximum"
Resistor="Floating"
Level="High"
Mode="Output"
diff --git a/demos/ARMCM4-STM32F303-DISCOVERY/main.c b/demos/ARMCM4-STM32F303-DISCOVERY/main.c index e64196943..3ff8b8820 100644 --- a/demos/ARMCM4-STM32F303-DISCOVERY/main.c +++ b/demos/ARMCM4-STM32F303-DISCOVERY/main.c @@ -32,11 +32,30 @@ static msg_t Thread1(void *arg) { (void)arg;
chRegSetThreadName("blinker");
while (TRUE) {
- /* TODO */
-// palSetPad(GPIOD, GPIOD_LED3); /* Orange. */
- chThdSleepMilliseconds(500);
-// palClearPad(GPIOD, GPIOD_LED3); /* Orange. */
- chThdSleepMilliseconds(500);
+ palSetPad(GPIOE, GPIOE_LED3_RED);
+ chThdSleepMilliseconds(100);
+ palClearPad(GPIOE, GPIOE_LED3_RED);
+ palSetPad(GPIOE, GPIOE_LED5_ORANGE);
+ chThdSleepMilliseconds(100);
+ palClearPad(GPIOE, GPIOE_LED5_ORANGE);
+ palSetPad(GPIOE, GPIOE_LED7_GREEN);
+ chThdSleepMilliseconds(100);
+ palClearPad(GPIOE, GPIOE_LED7_GREEN);
+ palSetPad(GPIOE, GPIOE_LED9_BLUE);
+ chThdSleepMilliseconds(100);
+ palClearPad(GPIOE, GPIOE_LED9_BLUE);
+ palSetPad(GPIOE, GPIOE_LED10_RED);
+ chThdSleepMilliseconds(100);
+ palClearPad(GPIOE, GPIOE_LED10_RED);
+ palSetPad(GPIOE, GPIOE_LED8_ORANGE);
+ chThdSleepMilliseconds(100);
+ palClearPad(GPIOE, GPIOE_LED8_ORANGE);
+ palSetPad(GPIOE, GPIOE_LED6_GREEN);
+ chThdSleepMilliseconds(100);
+ palClearPad(GPIOE, GPIOE_LED6_GREEN);
+ palSetPad(GPIOE, GPIOE_LED4_BLUE);
+ chThdSleepMilliseconds(100);
+ palClearPad(GPIOE, GPIOE_LED4_BLUE);
}
}
diff --git a/os/hal/platforms/STM32/GPIOv2/pal_lld.c b/os/hal/platforms/STM32/GPIOv2/pal_lld.c index 7f8771b5f..2977d3644 100644 --- a/os/hal/platforms/STM32/GPIOv2/pal_lld.c +++ b/os/hal/platforms/STM32/GPIOv2/pal_lld.c @@ -111,6 +111,8 @@ void _pal_lld_init(const PALConfig *config) { RCC->AHBLPENR |= AHB_LPEN_MASK;
#elif defined(STM32F0XX)
rccEnableAHB(AHB_EN_MASK, TRUE);
+#elif defined(STM32F30X)
+ rccEnableAHB(AHB_EN_MASK, TRUE);
#elif defined(STM32F2XX) || defined(STM32F4XX)
RCC->AHB1ENR |= AHB1_EN_MASK;
RCC->AHB1LPENR |= AHB1_LPEN_MASK;
|