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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-11-09 12:20:06 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-11-09 12:20:06 +0000 |
| commit | bd22f7167292826f39707f10ddd620fc246cd20c (patch) | |
| tree | 96b3755467c316a679cc60e508e3fe5efeceda4a | |
| parent | 9d6eb6ebf4f7fa9aeac7070fd2a8401bf350af38 (diff) | |
| download | ChibiOS-bd22f7167292826f39707f10ddd620fc246cd20c.tar.gz ChibiOS-bd22f7167292826f39707f10ddd620fc246cd20c.tar.bz2 ChibiOS-bd22f7167292826f39707f10ddd620fc246cd20c.zip | |
Fixed some regressions.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12413 110e8d01-0319-4d1e-a829-52ad28d1bb01
| -rw-r--r-- | os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.h | 2 | ||||
| -rw-r--r-- | os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.h | 6 | ||||
| -rw-r--r-- | os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.h | 18 |
3 files changed, 26 insertions, 0 deletions
diff --git a/os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.h b/os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.h index d216c1460..34075c026 100644 --- a/os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.h +++ b/os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.h @@ -257,6 +257,7 @@ /* The following checks are only required when there is a DMA able to
reassign streams to different channels.*/
#if STM32_ADVANCED_DMA
+
/* Check on the presence of the DMA streams settings in mcuconf.h.*/
#if STM32_I2C_USE_I2C1 && (!defined(STM32_I2C_I2C1_RX_DMA_STREAM) || \
!defined(STM32_I2C_I2C1_TX_DMA_STREAM))
@@ -326,6 +327,7 @@ STM32_I2C4_TX_DMA_MSK)
#error "invalid DMA stream associated to I2C4 TX"
#endif
+
#endif /* STM32_ADVANCED_DMA */
#if !defined(STM32_DMA_REQUIRED)
diff --git a/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.h b/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.h index c1cdf3c54..66d805937 100644 --- a/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.h +++ b/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.h @@ -301,6 +301,10 @@ #error "Invalid DMA priority assigned to SPI6"
#endif
+/* The following checks are only required when there is a DMA able to
+ reassign streams to different channels.*/
+#if STM32_ADVANCED_DMA
+
/* Devices with DMAMUX require a different kind of check.*/
#if STM32_DMA_SUPPORTS_DMAMUX
@@ -487,6 +491,8 @@ #endif /* !STM32_DMA_SUPPORTS_DMAMUX */
+#endif /* STM32_ADVANCED_DMA */
+
#if !defined(STM32_DMA_REQUIRED)
#define STM32_DMA_REQUIRED
#endif
diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.h b/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.h index add2a4d8a..1bc048c19 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.h +++ b/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.h @@ -150,6 +150,24 @@ #endif
/**
+ * @brief GPTD21 driver enable switch.
+ * @details If set to @p TRUE the support for GPTD21 is included.
+ * @note The default is @p TRUE.
+ */
+#if !defined(STM32_GPT_USE_TIM21) || defined(__DOXYGEN__)
+#define STM32_GPT_USE_TIM21 FALSE
+#endif
+
+/**
+ * @brief GPTD22 driver enable switch.
+ * @details If set to @p TRUE the support for GPTD22 is included.
+ * @note The default is @p TRUE.
+ */
+#if !defined(STM32_GPT_USE_TIM22) || defined(__DOXYGEN__)
+#define STM32_GPT_USE_TIM22 FALSE
+#endif
+
+/**
* @brief GPTD1 interrupt priority level setting.
*/
#if !defined(STM32_GPT_TIM1_IRQ_PRIORITY) || defined(__DOXYGEN__)
|