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author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2008-08-25 13:00:11 +0000 |
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committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2008-08-25 13:00:11 +0000 |
commit | b689f00e31591e2f3b5b3607b15be428dfeb7e88 (patch) | |
tree | 20ee57099be6cfcead74274f9ca49551dc26341f | |
parent | 5d40605546682121c1220d8e676d4d9bc760b785 (diff) | |
download | ChibiOS-b689f00e31591e2f3b5b3607b15be428dfeb7e88.tar.gz ChibiOS-b689f00e31591e2f3b5b3607b15be428dfeb7e88.tar.bz2 ChibiOS-b689f00e31591e2f3b5b3607b15be428dfeb7e88.zip |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@401 35acf78f-673a-0410-8e92-d51de3d6d3f4
-rw-r--r-- | demos/Win32-MinGW/chcore.h | 1 | ||||
-rw-r--r-- | ports/ARM7/chcore.h | 27 | ||||
-rw-r--r-- | ports/ARM7/chsys.s | 20 | ||||
-rw-r--r-- | ports/ARMCM3/chcore.h | 4 | ||||
-rw-r--r-- | ports/AVR/chcore.h | 2 | ||||
-rw-r--r-- | ports/MSP430/chcore.h | 3 | ||||
-rw-r--r-- | readme.txt | 3 | ||||
-rw-r--r-- | src/chinit.c | 2 | ||||
-rw-r--r-- | src/templates/chcore.h | 5 |
9 files changed, 57 insertions, 10 deletions
diff --git a/demos/Win32-MinGW/chcore.h b/demos/Win32-MinGW/chcore.h index bc0ed3e42..c3c3f3a0b 100644 --- a/demos/Win32-MinGW/chcore.h +++ b/demos/Win32-MinGW/chcore.h @@ -59,6 +59,7 @@ typedef struct { #define chSysLock()
#define chSysUnlock()
+#define chSysEnable()
#define chSysPuts(msg) {}
#define chSysIRQEnterI()
#define chSysIRQExitI()
diff --git a/ports/ARM7/chcore.h b/ports/ARM7/chcore.h index 4f8e187cc..557526863 100644 --- a/ports/ARM7/chcore.h +++ b/ports/ARM7/chcore.h @@ -79,14 +79,33 @@ typedef struct { #ifdef __cplusplus
extern "C" {
#endif
- void chSysLock(void);
- void chSysUnlock(void);
+ uint32_t _lock(void);
+ void _unlock(uint32_t);
+ void _enable(void);
#ifdef __cplusplus
}
#endif
+#ifdef REENTRANT_LOCKS
+#define chSysLock() uint32_t ps = _lock()
+#define chSysUnlock() _unlock(ps)
+#else
+#define chSysLock() _lock()
+#define chSysUnlock() _enable()
+#endif /* !REENTRANT_LOCKS */
+#define chSysEnable() _enable()
#else /* !THUMB */
-#define chSysLock() asm("msr CPSR_c, #0x9F")
-#define chSysUnlock() asm("msr CPSR_c, #0x1F")
+#ifdef REENTRANT_LOCKS
+#define chSysLock() \
+ uint32_t ps; \
+ asm volatile ("mrs %0, CPSR" : "=r" (ps) : ); \
+ asm volatile ("msr CPSR_c, #0x9F");
+#define chSysUnlock() asm volatile ("msr CPSR_c, %0" : : "r" (ps))
+#define chSysEnable() asm volatile ("msr CPSR_c, #0x1F")
+#else
+#define chSysLock() asm volatile ("msr CPSR_c, #0x9F");
+#define chSysUnlock() asm volatile ("msr CPSR_c, #0x1F")
+#define chSysEnable() asm volatile ("msr CPSR_c, #0x1F")
+#endif /* !REENTRANT_LOCKS */
#endif /* THUMB */
#ifdef THUMB
diff --git a/ports/ARM7/chsys.s b/ports/ARM7/chsys.s index d1de7d100..8af9e4b4e 100644 --- a/ports/ARM7/chsys.s +++ b/ports/ARM7/chsys.s @@ -44,19 +44,31 @@ .balign 16
.code 16
.thumb_func
-.global chSysLock
-chSysLock:
+.global _lock
+_lock:
mov r0, pc
bx r0
.code 32
+ mrs r0, CPSR
msr CPSR_c, #MODE_SYS | I_BIT
bx lr
.balign 16
.code 16
.thumb_func
-.global chSysUnlock
-chSysUnlock:
+.global _unlock
+_unlock:
+ mov r1, pc
+ bx r1
+.code 32
+ msr CPSR_c, r0
+ bx lr
+
+.balign 16
+.code 16
+.thumb_func
+.global _enable
+_enable:
mov r0, pc
bx r0
.code 32
diff --git a/ports/ARMCM3/chcore.h b/ports/ARMCM3/chcore.h index 1e451dfc7..0f07ba369 100644 --- a/ports/ARMCM3/chcore.h +++ b/ports/ARMCM3/chcore.h @@ -97,6 +97,10 @@ typedef struct { register uint32_t tmp asm ("r3") = BASEPRI_USER; \ asm volatile ("msr BASEPRI, %0" : : "r" (tmp)); \ } +#define chSysEnable() { \ + register uint32_t tmp asm ("r3") = BASEPRI_USER; \ + asm volatile ("msr BASEPRI, %0" : : "r" (tmp)); \ +} #define chSysSwitchI(otp, ntp) { \ register Thread *_otp asm ("r0") = (otp); \ register Thread *_ntp asm ("r1") = (ntp); \ diff --git a/ports/AVR/chcore.h b/ports/AVR/chcore.h index cb2920a2d..fe0f13e1f 100644 --- a/ports/AVR/chcore.h +++ b/ports/AVR/chcore.h @@ -108,6 +108,8 @@ typedef struct { #define chSysUnlock() asm volatile ("sei")
+#define chSysEnable() asm volatile ("sei")
+
#define chSysIRQEnterI() \
asm ("" : : : "r18", "r19", "r20", "r21", "r22", "r23", "r24", \
"r25", "r26", "r27", "r30", "r31");
diff --git a/ports/MSP430/chcore.h b/ports/MSP430/chcore.h index 3a9d587b8..0d07204d2 100644 --- a/ports/MSP430/chcore.h +++ b/ports/MSP430/chcore.h @@ -81,10 +81,11 @@ typedef struct { #define chSysLock() asm volatile ("dint")
#define chSysUnlock() asm volatile ("eint")
+#define chSysEnable() asm volatile ("eint")
#define chSysIRQEnterI()
#define chSysIRQExitI() { \
- if (chSchRescRequiredI()) \
+ if (chSchRescRequiredI()) \
chSchDoRescheduleI(); \
}
diff --git a/readme.txt b/readme.txt index 89f3f5ec5..203a585bf 100644 --- a/readme.txt +++ b/readme.txt @@ -79,6 +79,9 @@ Win32-MinGW - ChibiOS/RT simulator and demo into a WIN32 process, linux/unix users.
- FIX: Fixed a regression introduced in version 0.6.9, the queues benchmark
test case was missing from the tests list.
+- NEW: Added an option to the ARM7 ports, by specifying -DREENTRANT_LOCKS in
+ the makefile options the chSysLock() and chSysUnlock() become reentrant.
+ The code becomes a bit larger and slower.
*** 0.6.9 ***
- NEW: Added an option to exclude the support for the round robin scheduling,
diff --git a/src/chinit.c b/src/chinit.c index 2aee810a0..243ef2a97 100644 --- a/src/chinit.c +++ b/src/chinit.c @@ -47,7 +47,7 @@ void chSysInit(void) { mainthread.p_state = PRCURR; currp = &mainthread; - chSysUnlock(); + chSysEnable(); /* * The idle thread is created using the port-provided implementation. diff --git a/src/templates/chcore.h b/src/templates/chcore.h index 491aa3fee..c84a237f8 100644 --- a/src/templates/chcore.h +++ b/src/templates/chcore.h @@ -106,6 +106,11 @@ typedef struct { #define chSysUnlock()
/**
+ * Enables the interrupts, it is only invoked once into \p chSysInit().
+ */
+#define chSysEnable()
+
+/**
* IRQ handler enter code.
* @note Usually IRQ handlers function are also declared naked.
* @note On some architectures this macro can be empty.
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